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APS11060LLHALT-2SL

APS11060LLHALT-2SL

  • 厂商:

    ALLEGRO(埃戈罗)

  • 封装:

    SOT23W

  • 描述:

    MAGNETIC SWITCH UNIPOLAR SOT23W

  • 数据手册
  • 价格&库存
APS11060LLHALT-2SL 数据手册
APS11000 and APS11060 Vertical and Planar Hall-Effect Switches 2 - FEATURES AND BENEFITS DESCRIPTION • ASIL A functional safety compliance (pending confirmation) • Planar and vertical Hall-effect sensor ICs • 3.3 to 24 V operation • Automotive-grade ruggedness and fault tolerance □□ Extended AEC-Q100 qualification □□ Internal protection circuits enable 40 V load dump compliance □□ Reverse-battery protection □□ Output short-circuit and overvoltage protection □□ Operation from –40°C to 165°C junction temperature □□ High EMC immunity • Omnipolar and unipolar switch threshold options • Choice of output polarity • Open-drain output • Solid-state reliability The APS11000 and APS11060 families of Hall-effect switches are AEC-Q100 qualified for 24 V automotive applications and compliant with ISO 26262:2011 ASIL A (pending confirmation). These sensors are temperature-stable and suited for operation over extended junction temperature ranges up to 165°C. The APS11000 and APS11060 families are available in several different magnetic sensitivities and polarities to offer flexible options for system design. They are available in active high and active low variants for ease of integration into electronic subsystems. PACKAGES The APS11000 features a Hall-effect element that is sensitive to magnetic flux perpendicular to the face of the IC package. The APS11060 features a vertical Hall-effect sensing element sensitive to magnetic flux parallel to the face of the IC package. Continued on next page... TYPICAL APPLICATIONS Not to scale • • • • • • • 3-pin SOT23W (suffix LH) 3-pin SIP (suffix UA) Gear shift selectors and driver controls (PRNDL) Human-machine interfaces (HMI) and driver controls Open/close sensor for LCD screens/doors/lids/trunks Clutch/brake position sensor Magnetically actuated lighting Wiper home/end position sensor End of travel and index sensors VCC POK Regulator Dynamic Offset Cancellation To All Subcircuits Low-Pass Filter Hall Amp. Schmitt Trigger Sample, Hold & Averaging VOUT Output Control Current Limit GND Figure 1: Functional Block Diagram APS11060-DS, Rev. 4 MCO-0000392 May 12, 2020 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches DESCRIPTION (continued) The devices include on-board reverse-battery and overvoltage protection for operating directly from an automobile battery, as well as protection from shorts to ground by limiting the output current until the short is removed. The device is especially suited for operation from unregulated supplies. Two package styles provide a choice of through-hole or surface mounting. Package type LH is a modified 3-pin SOT23W surface mount package, while package type UA is a 3-pin ultra-mini SIP for through-hole mounting. Both packages are lead (Pb) free, with 100% matte-tin-plated leadframes. Complete Part Number Format Allegro Iden�fier (Device Family) APS – Digital Posi�on Sensor Configura�on Op�ons Planar APS11000 Ver�cal APS11060 E.g. APS11060LLHAXX-XXX APS11060LLHALT - 0 SL RoHS COMPLIANT LLHALT-0SL Allegro Device Number 11000 – Planar Hall-effect Switch 11060 – Ver�cal Hall-effect Switch Output Polarity for B > BOP H – High (Output Off) L – Low (Output On) Opera�ng Mode S – Unipolar South Sensing P – Omnipolar (North and South) Sensing N – Unipolar North Sensing Device Switch Threshold Magnitude 0 – 35 G BOP, 25 G BRP (typ.) 1 – 95 G BOP, 70 G BRP (typ.) 2 – 150 G BOP, 125 G BRP (typ.) 3 – 280 G BOP, 225 G BRP (typ.) Instruc�ons (Packing) LT – 7-in. reel, 3,000 pieces/reel (LH Only) LX – 13-in. reel, 10,000 pieces/reel (LH Only) [blank] – bulk, 500 pieces/bag (UA Only) Package Designa�on LHA – 3-pin SOT23W Surface Mount UAA – 3-pin SIP Through-Hole Ambient Opera�ng Temperature Range L – -40°C to +150°C Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 2 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches SELECTION GUIDE Part Number [1] Packing [2] Mounting Output State for B > BOP Sensing Orientation Operating Mode Z-Axis Unipolar South Z-Axis Omnipolar APS11000LLHALT-0SL 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount Low APS11000LLHALX-0SL 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount Low APS11000LUAA-0SL Bulk, 500 pieces/bag 3-pin SIP through-hole Low APS11000LLHALT-0SH 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount High APS11000LLHALX-0SH 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount High APS11000LUAA-0SH Bulk, 500 pieces/bag 3-pin SIP through-hole High APS11000LLHALT-0PL 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount Low APS11000LLHALX-0PL 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount Low APS11000LUAA-0PL Bulk, 500 pieces/bag 3-pin SIP through-hole Low APS11060LLHALT-0SL 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount Low X-Axis APS11060LLHALX-0SL 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount Low X-Axis APS11060LUAA-0SL Bulk, 500 pieces/bag 3-pin SIP through-hole Low Y-Axis APS11060LLHALT-0SH 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount High X-Axis APS11060LLHALX-0SH 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount High X-Axis APS11060LUAA-0SH Bulk, 500 pieces/bag 3-pin SIP through-hole High Y-Axis APS11060LLHALT-0PL 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount Low X-Axis APS11060LLHALX-0PL 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount Low X-Axis APS11060LUAA-0PL Bulk, 500 pieces/bag 3-pin SIP through-hole Low Y-Axis [1] Contact Allegro [2] Contact Allegro Unipolar South Omnipolar MicroSystems for options not listed in the selection guide. MicroSystems for additional packing options. Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 3 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches ABSOLUTE MAXIMUM RATINGS Characteristic Supply Voltage [1] Symbol Notes Rating Units VCC 40 V VRCC –18 V Voltage [1] VOUT –0.3 to 32 V Output Current [2] IOUT 40 mA Reverse Output Current IROUT –50 mA Magnetic Flux Density [3] B Unlimited G Operating Ambient Temperature TA –40 to 150 °C Maximum Junction Temperature TJ(max) 165 °C Tstg –65 to 170 °C Reverse Supply Voltage [1] Output Storage Temperature Range L [1] This rating does not apply to extremely short voltage transients. Transient events such as Load Dump and/or ESD have individual, specific ratings. short-circuit current limiting device. [3] Guaranteed by design. [2] Through ESD PERFORMANCE [4] Characteristic ESD Voltage [4] ESD Symbol Notes Rating Units VESD(HBM) Human Body Model according to AEC-Q100-002 ±11 kV VESD(CDM) Charged Device Model according to AEC-Q100-011 ±1 kV ratings provided are based on qualification per AEC-Q100 as an expected level of ESD robustness. Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 4 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches PINOUT DIAGRAMS AND TERMINAL LIST GND (View from branded face) 1 VOUT VCC 2 3 VOUT 2 GND 1 VCC 3 3-pin SIP (suffix UA) 3-pin SOT23W (suffix LH) Terminal List Name Description Number LH UA Connects power supply to chip 1 1 VOUT Output from circuit 2 3 GND Terminal for ground connection 3 2 VCC Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 5 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches ELECTRICAL CHARACTERISTICS: Valid over full operating voltage and ambient temperature ranges for TJ < TJ(max) and CBYP = 0.1 µF, unless otherwise specified Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit SUPPLY AND STARTUP Supply Voltage VCC Supply Current ICC Power-On Time [2] tPO Power-On State POS [5] VCC(UV)EN Undervoltage Lockout [3] UVLO Reset Time [3] 3.3 – 24 V APS11000 1 2.2 4 mA APS11060 1 2.5 5 mA VCC ≥ VCC(min) – 180 350 µs 2 – V VCC ≥ VCC(min), t < tPO High – VCC ≥ VCC(min) → VCC < VCC(min) – VCC(UV)DIS VCC < VCC(min) → VCC ≥ VCC(min) – 2.3 – V – 100 – µs tPOR CHOPPER STABILIZATION AND OUTPUT MOSFET CHARACTERISTICS Chopping Frequency fC Output Leakage Current [4] IOUTOFF VOUT(OFF) = 12 V, TA = –40°C to 85°C, output off, VCC ≥ VCC(min), t > tPO Output Leakage Current IOUTOFF VOUT(OFF) = 24 V, output off, VCC ≥ VCC(min), t > tPO Output Leakage Current, Power-On [4][5] – 800 – kHz – – 0.1 µA – – 1 µA IOUTOFF(PO) VCC ≥ VCC(min), t < tPO – – 95 µA Output Saturation Voltage VOUT(SAT) – 100 500 mV Output Off Voltage VOUT(OFF) Output on, IOUT = 5 mA – – 24 V Output Rise Time [6][7] tr CL = 20 pF, RPULL-UP = 4.8 kΩ – 0.2 2 µs Output Fall Time [6][7] tf CL = 20 pF, RPULL-UP = 4.8 kΩ – 0.1 2 µs Output on 15 – 40 mA ON-BOARD PROTECTION Output Short-Circuit Current Limit IOM Output Zener Clamp Voltage VZ(OUT) IOUT = 1.5 mA, TA = 25°C 32 – – V Supply Zener Clamp Voltage VZ ICC = ICC(max) + 3 mA, TA = 25°C 40 – – V Reverse Battery Zener Clamp Voltage VRZ ICC = –5 mA, TA = 25°C – – –18 V Reverse Battery Current IRCC VCC = –18 V, TA = 25°C –5 – – mA [1] Typical data is at TA = 25°C and VCC = 12 V unless otherwise noted. Measured from VCC ≥ 3.3 V to valid output. [3] See Undervoltage Lockout section for operational characteristics. [4] Guaranteed by device design and characterization. [5] See Power-On Behavior section and Figure 4. [6] C = oscilloscope probe capacitance. L [7] See Figure 2 - Definition of Output Rise and Fall Time. [2] VOUT(OFF) 90% VOUT 90% VOUT(SAT) 10% tf 10% tr t Figure 2: Definition of Output Rise and Fall Time Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 6 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches MAGNETIC CHARACTERISTICS: Valid over full operating voltage and ambient temperature ranges for TJ < TJ(max) and CBYP = 0.1 µF, unless otherwise specified Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit [2] -0Px OPTION Operate Point BOPS -0Px Option – 35 70 G BOPN -0Px Option –70 –35 – G BRPS -0Px Option 5 25 – G BRPN -0Px Option – –25 –5 G BHYS -0Px Option 5 15 25 G Operate Point BOPS -0Sx Option ‒ 35 70 G Release Point BRPS -0Sx Option 5 25 ‒ G Hysteresis BHYS -0Sx Option 5 15 25 G Operate Point BOPN -0Nx Option ‒70 ‒35 ‒ G Release Point BRPN -0Nx Option ‒ ‒25 ‒5 G Hysteresis BHYS -0Nx Option 5 15 25 G Release Point Hysteresis -0Sx OPTION -0Nx OPTION [1] Typical data are at TA = 25°C and VCC = 12 V unless otherwise noted. Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and a positive value for south-polarity magnetic fields. BRPN Switch to Off BOPS BRPN VOUT(SAT) VOUT(SAT) Switch to Off VOUT(OFF) B- B+ BHYS BRPN BRPN Switch to Off BHYS 0 VOUT(OFF) BOPN B- Switch to On VOUT(SAT) Unipolar North “-xNH” BRPS BOPS Switch to On Switch to On VOUT(SAT) 0 V+ VOUT VOUT(OFF) 0 Switch to On VOUT(OFF) V+ BHYS Switch to Off Switch to On B- BOPN BOPS VOUT VOUT(SAT) BHYS Switch to On BHYS B+ VOUT(SAT) B+ Omnipolar “-xPH” BOPN 0 BRPS 0 BRPS Unipolar South “-xSH” Switch to Off Inverted Output Polarity 0 BHYS BHYS V+ Switch to Off B- VOUT(OFF) VOUT VOUT(SAT) VOUT(OFF) Switch to Off VOUT(SAT) B+ Unipolar North “-xNL” Switch to On VOUT(OFF) BOPN 0 BRPS 0 VOUT(OFF) Switch to On Standard Output Polarity Switch to Off V+ Omnipolar “-xPL” BOPS Unipolar South “-xSL” VOUT [2] 0 0 BHYS Figure 3: Hall Switch Output State vs. Magnetic Field B- indicates increasing north polarity magnetic field strength, and B+ indicates increasing south polarity magnetic field strength. Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 7 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches MAGNETIC CHARACTERISTICS (continued): Valid over full operating voltage and ambient temperature ranges for TJ < TJ(max) and CBYP = 0.1 µF, unless otherwise specified Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit [2] -1Px OPTION [3] Operate Point BOPS -1Px Option 50 95 135 G BOPN -1Px Option ‒135 ‒95 ‒50 G BRPS -1Px Option 40 70 110 G BRPN -1Px Option ‒110 ‒70 ‒40 G BHYS -1Px Option 10 25 42 G Operate Point BOPS -1Sx Option 50 95 135 G Release Point BRPS -1Sx Option 40 70 110 G Hysteresis BHYS -1Sx Option 10 25 42 G Operate Point BOPN -1Nx Option ‒135 ‒95 ‒50 G Release Point BRPN -1Nx Option ‒110 ‒70 ‒40 G Hysteresis BHYS -1Nx Option 10 25 42 G BOPS -2Px Option 120 150 200 G BOPN -2Px Option ‒200 ‒150 ‒120 G BRPS -2Px Option 110 125 190 G BRPN -2Px Option ‒190 ‒125 ‒110 G BHYS -2Px Option 10 25 42 G Operate Point BOPS -2Sx Option 120 150 200 G Release Point BRPS -2Sx Option 110 125 190 G Hysteresis BHYS -2Sx Option 10 25 42 G Operate Point BOPN -2Nx Option ‒200 ‒150 ‒120 G Release Point BRPN -2Nx Option ‒190 ‒125 ‒110 G Hysteresis BHYS -2Nx Option 10 25 42 G Release Point Hysteresis -1Sx OPTION [3] -1Nx OPTION [3] -2Px OPTION [3] Operate Point Release Point Hysteresis -2Sx OPTION [3] -2Nx OPTION [3] [1] Typical data are at TA = 25°C and VCC = 12 V unless otherwise noted. Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and a positive value for south-polarity magnetic fields. [3] Contact Allegro MicroSystems for availability. [2] Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 8 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches PACKAGE THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information. Characteristic Symbol Test Conditions RθJA Package Thermal Resistance Value Units Package LH, 1-layer PCB with copper limited to solder pads 228 °C/W Package LH, 2-layer PCB with 0.463 in.2 of copper area each side connected by thermal vias 110 °C/W Package UA, 1-layer PCB with copper limited to solder pads 165 °C/W Power Derating Curve Maximum Allowable VCC (V) TJ(m ax) = 165°C; ICC = ICC(m ax), IOUT = 0 mA (Output Off) 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 VCC(max) Package LH, 2-layer PCB (RθJA = 110°C/W) Package UA, 1-layer PCB (RθJA = 165°C/W) Package LH, 1-layer PCB (RθJA = 228°C/W) VCC(min) 25 45 65 85 105 125 145 Temperature (°C) 165 TJ(max) 185 Power Dissipation, PD (mW) Power Dissipation versus Ambient Temperature 1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 Package LH, 2-layer PCB (RθJA = 110°C/W) Package UA, 1-layer PCB (RθJA = 165°C/W) Package LH, 1-layer PCB (RθJA = 228°C/W) 25 45 65 85 105 125 145 165 185 Temperature (°C) Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 9 Average Supply Current versus Ambient Temperature Average Supply Current versus Ambient Temperature (Output Off)Off) (Output Average Supply Current versus Supply Voltage Average Supply Current versus Supply Voltage (Output Off)Off) (Output APS11000 and APS11060 40 40 Vertical and Planar Hall-Effect Switches 35 35 35 35 TAA (°C) TA (°C) IICC (µA) CC (µA) ICC (µA) 25 25 -40 -40 20 20 25 25 15 15 150 150 10 10 5 0 0 ttPERIOD (ms) PERIOD (ms) ICC (mA)(ms) tPERIOD 220 200 180 160 140 120 100 80 60 40 20 0 2 2 6 6 10 10 14 14 VCC V (V) CC (V) -40 -40 25 25 25 150 APS11060 150 150 -40 25 10 10 10 14 14 18 18 18 (V)14(V) V V CC CC VCC (V) 22 22 22 26 26 26 150 Average Output Saturation Voltage versus Supply Voltage Average Output Saturation Voltage versus Supply Voltage for Ifor 5 mA = 5 mA OUTI= OUT OUT VVOUT(SAT) (mV) OUT(SAT) (mV) VOUT(SAT) (mV) 350 350 300 300 250 250 TAA (°C) TA (°C) -40 -40 25 25 200 200 150 150 100 100 150 150 6 6 10 10 14 14 VCC V (V) CC (V) 100 100 120 120 140 140 160 160 6080 80 18 18 22 22 26 26 220 200 180 160 140 120 100 80 60 40 20 0 220 5 200 4.5 180 4 160 3.5 140 1203 100 2.5 802 60 1.5 40 1 20 0.5 0 -60 0-60 -40 -40 -20 -200 -60 -40 -20 VCC (V) APS11000 VCC VCC (V)3.3 CC (V) 3.3 3.3 12 12 1224 APS11060 24 24 3.3 12 100 100 120 120 140 140 160 160 020 2040 4060 6080 80 0 20 40 60 80 100 120 140 160 24 TA (°C) TA (°C) TA (°C) Average Output Saturation Voltage versus Ambient Average Output Saturation Voltage versus Ambient Temperature for Ifor 5 mA = 5 mA Temperature OUTI= OUT OUT 500 500 450 450 400 400 50 50 0 0 2 2 24 24 10 10 Supply Current versus Ambient Temperature Average Sleep Mode Period versus Ambient Temperature Average Sleep Mode Period versus Ambient Temperature (Output Off) TA (°C) APS11000 TAA (°C) TA (°C) -40 6 6 12 12 15 15 TA (°C) TA (°C) Supply Current versus Supply Voltage Average Sleep Mode Period versus Supply Voltage Average Sleep Mode Period versus Supply Voltage (Output Off) 6 3.3 3.3 20 20 5 5 CHARACTERISTIC PERFORMANCE DATA 0 0 Characteristics 18 18 22 22 Electrical 26 26 -60 -60 -40 -40 -20 -200 020 2040 4060 220 5 200 4.5 180 1604 3.5 140 1203 100 2.5 802 60 1.5 40 1 20 0.5 0 2 0 2 2 VCC VCC (V) CC (V) 25 25 ttPERIOD (ms) PERIOD (ms) tIPERIOD (ms) CC (mA) 5 30 30 IICC (µA) CC (µA) ICC (µA) 30 30 500 500 450 450 400 400 VVOUT(SAT) (mV) OUT(SAT) (mV) VOUT(SAT) (mV) 40 40 VCC VCC (V) CC (V) 350 350 300 300 250 250 3.3 3.3 12 12 200 200 150 150 100 100 50 50 0 0 -60 -60 -40 -40 -20 -200 24 24 100 100 120 120 140 140 160 160 020 2040 4060 6080 80 TA (°C) TA (°C) Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 10 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches CHARACTERISTIC PERFORMANCE DATA Magnetic Characteristics Average Operate Point versus Ambient Temperature Average Operate Point versus Supply Voltage 70 TA (°C) BOPS 50 25 10 150 BOPN -10 -30 -40 -50 25 -70 150 2 4 6 8 10 12 14 VCC (V) 16 18 20 22 24 -30 3.3 -50 12 -70 30 0 150 BRPN -10 -20 -40 VCC (V) 18 20 22 24 TA (°C) 80 100 120 140 160 3.3 12 24 0 BRPN -10 3.3 12 -40 -50 24 VCC (V) BRPS 10 26 -60 Average Hysteresis versus Supply Voltage -40 -20 0 20 40 60 TA (°C) 80 100 120 140 160 24 Average Hysteresis versus Ambient Temperature 25 20 22.5 25 150 15 BHYS(N) 12.5 BHYS (G) -40 17.5 VCC (V) BHYS(S) 25 TA (°C) BHYS(S) 22.5 BHYS (G) 60 -30 150 16 40 -20 25 14 20 20 -40 -30 12 0 30 BRP (G) BRP (G) 10 25 10 -20 40 -40 20 8 -40 Average Release Point versus Ambient Temperature 40 6 -60 50 TA (°C) BRPS 4 24 BOPN -10 Average Release Point versus Supply Voltage 2 12 10 26 50 -50 3.3 30 BOP (G) BOP (G) 50 -40 30 VCC (V) BOPS 70 20 3.3 17.5 12 24 15 BHYS(N) 12.5 10 -40 10 3.3 7.5 25 7.5 12 5 150 2 4 6 8 10 12 14 VCC (V) 16 18 20 22 24 26 5 -60 -40 -20 0 20 40 60 TA (°C) 80 100 120 140 160 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 24 11 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches FUNCTIONAL DESCRIPTION Power-On Behavior Undervoltage Lockout Operation Device power-on begins when the supply voltage reaches VCC(min). During the power-on time, tPO, the device output is off with the exception of the leakage current, IOUTOFF(PO). Use of a large pull-up resistor, RPULL-UP (see Figure 6), can influence the Power-On State (POS) voltage level on the output pin during tON. The output voltage level during the POS is a function of the pullup resistor and pull-up voltage. The level can be determined by subtracting the voltage drop created by RPULL-UP and IOUTOFF(PO) from the pull-up voltage. To retain a power-on output voltage level above VPULL-UP/2, a pull-up resistor less than or equal to 20 kΩ is recommended. After power-on is complete and the power-on time has elapsed, the device output will correspond with the applied magnetic field for B > BOP and B < BRP. Powering-on the device in the hysteresis range (less than BOP and higher than BRP) will cause the device output to remain off. A valid output state is attained after the first excursion beyond BOP or BRP. The APS11000 and APS11060 have an internal diagnostic to check the voltage supply (an undervoltage lockout regulator). When the supply voltage falls below the undervoltage lockout voltage threshold, VCC(UV)EN, the device enters reset, where the output state returns to the Power-On State (POS) until VCC is increased to VCC(UV)DIS. Once the VCC(UV)DIS threshold is reached, the power-on sequence begins and the output will correspond with the applied magnetic field for B > BOP and B < BRP after tPOR has elapsed. In the case the supply voltage does not return to these operational levels, or if the applied magnetic field is within the hysteresis range, the output will remain in the poweron state. See Figure 4 for an example of the undervoltage lockout behavior. VPULL-UP (V) Supply Voltage VCC (min) VCC(UV)DIS VCC(UV)EN Power-Off 0 tPO External Supply Glitch POS POS High Output State, “L” Polarity Low Output State Undefined for VCC < VCC (min) Output State, “H” Polarity Low Output State Undefined for VCC < VCC (min) POS B > BOP B < BOP POS POS High Key UVLO Enabled Key POS B > BOP, BRP < B < BOP B < BRP UVLO Enabled RLOAD (kΩ) 1 2.4 4.8 3.3 7.2 9.6 12 14.4 1 2.4 4.8 12 7.2 9.6 12 14.4 1 2.4 4.8 24 7.2 9.6 12 14.4 *VCC ≥ VCC(min) and t < tPO Figure 4: Power-On and Undervoltage Lockout Behavior Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 12 VOUT du POS ( 3.2 3.1 2.9 2.7 2.5 2.3 2.1 11.9 11.8 11.6 11.4 11.2 11.0 10.8 23.9 23.8 23.6 23.4 23.2 23.0 22.8 APS11000 and APS11060 Functional Safety Vertical and Planar Hall-Effect Switches 2 - The APS11000 and APS11060 were designed in accordance with the international standard for automotive functional safety, ISO 26262:2011. These products achieve an ASIL (Automotive Safety Integrity Level) rating of ASIL A (pending confirmation) according to the standard. The APS11000 and APS11060 are both classified as a SEooC (Safety Element out of Context) and can be easily integrated into safety-critical systems requiring higher ASIL ratings that incorporate external diagnostics or use measures such as redundancy. Safety documentation will be provided to support and guide the integration process. For further information, contact your local FAE for A2-SIL™ documentation: www.allegromicro.com/ASIL. Operation The APS11000 and APS11060 are integrated Hall-effect sensor ICs with an open-drain output. Table 1 offers a guide for selecting the output polarity configuration, further explained in the configuration sections below. The open-drain output is an NMOS transistor that actuates in response to a magnetic field. The direction of the applied magnetic field is perpendicular to the branded face for the APS11000, and parallel with the branded face for the APS11060; see Figure 5 for an illustration. The devices are offered in two packages: the UA package, a 3-pin through-hole mounting configuration, or in the LH package, a 3-pin surfacemount configuration. See the Selection Guide for a complete list of available options. Configurations xSL and xSH. The unipolar output of these devices is actuated when a south-polarity magnetic field perpendicular to the Hall element exceeds the operate point threshold, BOPS. When BOPS is exceeded, the xSL output turns on (goes low). The xSH is complementary, in that for this device the output turns off (goes high) when BOPS is exceeded. When the magnetic field is removed or reduced below the release point, BRPS, the device outputs return to their original state—off for the xSL and on for the xSH. See Figure 3 for unipolar south switching behavior. Table 1: Switch Polarity Configuration Options Part Number Suffix Operating Mode xPL Unipolar South Unipolar South Unipolar North Unipolar North Omnipolar xPH Omnipolar xSL xSH xNL xNH Output State for B > BOP Output State for B=0G Power-On State, t < tPO Low High High High Low High Low High High High Low High Low High High High Low High Configurations xPL and xPH. The omnipolar operation of these devices allows actuation with either a north or a south polarity field. The xPL operates using the standard output polarity convention. Fields exceeding the operating points, BOPS or BOPN, will turn the output on (low). When the magnetic field is removed or reduced below the release point, BRPN or BRPS, the device output turns off (goes high). The xPH is complementary, in that for the device, a north or south polarity field exceeding the operate points, BOPS or BOPN, will turn the output off (high). Removal of the field, or reduction below the release point threshold, BRPS or BRPN, will turn the output on (low). See Figure 3 for omnipolar switching behavior. After turn-on, the output transistor is capable of sinking current up to the short circuit current limit, IOM, which is a minimum of 15 mA. The difference in the magnetic operate and release points is the hysteresis, BHYS, of the device. This built-in hysteresis allows clean switching of the output even in the presence of external mechanical vibration and electrical noise. Configurations xNL and xNH. The unipolar output of these devices is actuated when a north-polarity magnetic field perpendicular to the Hall element exceeds the operate point threshold, BOPN. When BOPN is exceeded, the xNL output turns on (goes low). The xNH is complementary, in that for this device the output turns off (goes high) when BOPN is exceeded. When the magnetic field is removed or reduced below the release point, BRPN, the device outputs return to their original state—off for the xNL and on for the xNH. See Figure 3 for unipolar north switching behavior. Figure 5: Magnetic Sensing Orientations APS11000 LH (Panel A), APS11000 UA (Panel B), APS11060 LH (Panel C), and APS11060 UA (Panel D) Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 13 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches Applications It is strongly recommended that an external bypass capacitor be connected (in close proximity to the Hall element) between the supply and ground of the device to guarantee correct performance under harsh environmental conditions and to reduce noise from internal circuitry. As is shown in Figure 6: Typical and Enhanced Protection Application Circuits, a 0.1 µF capacitor is required. Extensive applications information for Hall-effect devices is available in: • Hall-Effect IC Applications Guide, AN27701, • Hall-Effect Devices: Guidelines for Designing Subassemblies Using Hall-Effect Devices AN27703.1 • Soldering Methods for Allegro’s Products – SMD and ThroughIn applications where the APS11000 or APS11060 receives Hole, AN26009 its power from an unregulated source such as a car battery, or where greater immunity is required, additional measures may All are provided on the Allegro website: be employed. Specifications for such transients will vary, so www.allegromicro.com protection circuit design should be optimized for each application. For example, the circuit shown in Figure 6 includes an optional series resistor and output capacitor which improves performance during Powered ESD testing (ISO 10605) and Bulk Current Injection testing (ISO 11452-4). Vertical Hall-Effect Sensor Linear Tools Typical Applications Circuit System design and magnetic sensor evaluation often require an in-depth look at the overall strength and profile generated by a magnetic field input. To aid in this evaluation, Allegro MicroSystems, LLC provides a high-accuracy linear output tool capable of reporting the nonperpendicular magnetic field by means of an vertical Hall-effect sensor IC equipped with a calibrated analog output. For further information, contact your local Allegro field applications engineer or sales representative. VSUPPLY RPULL-UP 4.8 kΩ APS110xx 1 VCC CBYP 0.1 µF VOUT 2 VOUT GND 3 Enhanced Protection Circuit VPULL-UP VSUPPLY RS 100 Ω CBYP 0.1 µF RPULL-UP 4.8 kΩ APS110xx 1 VCC VOUT 2 GND 3 VOUT COUT 4.7 nF Figure 6: Typical and Enhanced Protection Application Circuits Recommended RPULL-UP ≤ 20 kΩ. See Power-On Behavior section. Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 14 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches CHOPPER STABILIZATION A limiting factor for switchpoint accuracy when using Hall-effect technology is the small signal voltage developed across the Hall plate. This voltage is proportionally small relative to the offset that can be produced at the output of the Hall sensor. This makes it difficult to process the signal and maintain an accurate, reliable output over the specified temperature and voltage range. Chopper stabilization is a proven approach used to minimize Hall offset. The technique, dynamic quadrature offset cancellation, removes key sources of the output drift induced by temperature and package stress. This offset reduction technique is based on a signal modulation-demodulation process. Figure 7: Model of Chopper Stabilization Circuit (Dynamic Offset Cancellation) illustrates how it is implemented. The undesired offset signal is separated from the magnetically induced signal in the frequency domain through modulation. The subsequent demodulation acts as a modulation process for the offset causing the magnetically induced signal to recover its original spectrum at baseband while the DC offset becomes a high-frequency signal. Then, using a low-pass filter, the signal passes while the modulated DC offset is suppressed. Allegro’s innovative chopper-stabilization technique uses a high-frequency clock. The high-frequency operation allows a greater sampling rate that produces higher accuracy, reduced jitter, and faster signal processing. Additionally, filtering is more effective and results in a lower noise analog signal at the sensor output. Devices such as the APS11000 and APS11060 that use this approach have an extremely stable quiescent Hall output voltage, are immune to thermal stress, and have precise recoverability after temperature cycling. This technique is made possible through the use of a BiCMOS process which allows the use of low offset and low noise amplifiers in combination with high-density logic and sample-and-hold circuits. Regulator Hall Element Amp Sample and Hold Clock/Logic Low-Pass Filter Figure 7: Model of Chopper Stabilization Circuit (Dynamic Offset Cancellation) Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 15 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches POWER DERATING The device must be operated below the maximum junction temThis provides the allowable increase to TJ resulting from internal perature, TJ(max). Reliable operation may require derating supplied power dissipation. Then, using equation 2 first for the output as power and/or improving the heat dissipation properties of the shown below: application. PD(VOUT) = VOUT × IOUT = 500 mV × 20 mA = 10 mW Thermal Resistance, RθJA (junction to ambient), is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to ambient air. RθJA is dominated by the Effective Thermal Conductivity, K, of the printed circuit board which includes adjacent devices and board layout. Thermal resistance from the die junction to case, RθJC, is a relatively small component of RθJA. Ambient air temperature, TA, and air motion are significant external factors in determining a reliable thermal operating point. Then, for the VCC supply: PD(VCC) = VCC × ICC = 24 V × 5 mA = 120 mW Combine the power dissipated by the device pins: PD(total) = (PD(VOUT) + PD(VCC)) PD(total) = (10 mW + 120 mW) = 130 mW Next, solve for the maximum allowable VCC for the given conditions using equation 1: VCC(est) = PD(total) ÷ (ICC + IOUT) 130 mW ÷ (5 mA + 20 mA) VCC(est) =130 mW ÷ 25 mA = 5.2 V The following three equations can be used to determine operation points for given power and thermal conditions: PD = VIN × IIN (1) ΔT = PD × RθJA (2) TJ = TA + ΔT (3) Determining Junction Temperature For example, given common conditions: TA = 25°C, VCC = 12 V, ICC = 2.5 mA, VOUT(SAT) = 100 mV, IOUT = 5 mA, and RθJA = 165°C/W, then: PD = (VCC × ICC) + (VOUT × IOUT) = (12 V × 2.5 mA) + (100 mV × 5 mA) = 30 mW + 0.5 mW = 30.5 mW ΔT = PD × RθJA = 30.5 mW × 165°C/W = 5°C TJ = TA + ΔT = 25°C + 5°C = 30°C The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤ VCC(est). If the application requires VCC > VCC(est) then RθJA must by improved. This can be accomplished by adjusting the layout, PCB materials, or by controlling the ambient temperature. Determining Maximum TA In cases where the VCC(max) level is known, and the system designer would like to determine the maximum allowable ambient temperature, TA(max), the calculations can be reversed. For example, in a worst-case scenario with conditions VCC(max) = 24 V, ICC(max) = 5 mA, VOUT = 500 mV, IOUT(max) = 15 mA, and RθJA = 228°C/W, for the LH package using equation 1, the largest possible amount of dissipated power is: PD = VIN × IIN Determining Maximum VCC PD = PD(VOUT) + PD(VCC) = 500 mV × 15 mA + 24 V × 5 mA For a given ambient temperature (TA), the maximum allowable PD = 7.5 mW + 120 mW = 127.5 mW power dissipation as a function of VCC can be calculated. PD(max), represents the maximum allowable power level without exceeding Then, by rearranging equation 3: TJ(max), at a selected RθJA and TA. TA(max) = TJ(max) – ΔT Example: VCC estimation using the conditions RθJA = 228°C/W, TA(max) = 165°C – (127.5 mW × 228°C/W) TA(max) = 150°C, TJ(max) = 165°C, VCC(max) = 24 V, ICC(max) = TA(max) = 165°C – 29.1°C = 135.9°C 5 mA, VOUT = 500 mV, and IOUT = 20 mA (output on), calculate the maximum allowable power level, PD(max), first using equaFinally, note that the TA(max) rating of the device is 150°C and tion 3: performance is not guaranteed above this temperature for any ΔT(max) = TJ(max) – TA = 165°C – 150°C = 15°C power level. Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 16 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches Package LH, 3-Pin SMD (SOT23W) APS11000 +0.12 2.98 –0.08 1.49 D 4°±4° 3 A +0.020 0.180–0.053 0.96 D +0.10 2.90 –0.20 +0.19 1.91 –0.06 2.40 0.70 D 0.25 MIN 1.00 2 1 0.55 REF 0.25 BSC 0.95 Seating Plane Gauge Plane 8X 10° REF B PCB Layout Reference View Branded Face 1.00 ±0.13 0.95 BSC 0.40 ±0.10 For Reference Only; not for tooling use (reference DWG-2840) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Active Area Depth, 0.28 mm REF B Reference land pattern layout All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances C Branding scale and appearance at supplier discretion D Hall element, not to scale AAH +0.10 0.05 –0.05 1 C Standard Branding Reference View Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 17 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches Package LH, 3-Pin SMD (SOT23W) APS11060 +0.12 2.98 –0.08 4°±4° 3 +0.020 0.180–0.053 0.96 D +0.10 2.90 –0.20 +0.19 1.91 –0.06 2.40 0.70 D 0.25 MIN 1.00 2 1 0.55 REF A 0.25 BSC 0.95 Seating Plane Gauge Plane 8X 10° REF B PCB Layout Reference View Branded Face 1.00 ±0.13 0.95 BSC A44 +0.10 0.05 –0.05 0.40 ±0.10 For Reference Only; not for tooling use (reference DWG-2840) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Active Area Depth, 1.32 mm B Reference land pattern layout All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances C Branding scale and appearance at supplier discretion D Hall element, not to scale 1 C Standard Branding Reference View Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 18 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches Package UA, 3-Pin SIP APS11000 +0.08 4.09 –0.05 45° B E C 2.04 1.52 ±0.05 +0.08 3.02 –0.05 1.44 E 10° Mold Ejector Pin Indent E Branded Face A 1.02 MAX 45° 0.79 REF AAH 1 1 2 D Standard Branding Reference View 3 +0.03 0.41 –0.06 14.99 ±0.25 +0.05 0.43 –0.07 For Reference Only; not for tooling use (reference DWG-9065) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Dambar removal protrusion (6X) B Gate and tie bar burr area C Active Area Depth, 0.50 mm REF D Branding scale and appearance at supplier discretion E Hall element (not to scale) 1.27 NOM Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 19 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches Package UA, 3-Pin SIP APS11060 +0.08 4.09 –0.05 45° B E 2.04 1.52 ±0.05 +0.08 3.02 –0.05 C E 10° Mold Ejector Pin Indent Branded Face A 1.02 MAX 45° 0.79 REF A44 1 1 2 D Standard Branding Reference View 3 +0.03 0.41 –0.06 14.99 ±0.25 +0.05 0.43 –0.07 For Reference Only; not for tooling use (reference DWG-9065) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Dambar removal protrusion (6X) B Gate and tie bar burr area C Active Area Depth, 1.27 mm D Branding scale and appearance at supplier discretion E Hall element (not to scale) 1.27 NOM Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 20 APS11000 and APS11060 Vertical and Planar Hall-Effect Switches Revision History Number Date Description – March 15, 2018 Initial release 1 July 16, 2018 2 October 22, 2018 Updated TJ(max) to 165°C, Selection Guide (page 3), Absolute Maximum Ratings footnotes (page 4), PowerOn State (page 6), Magnetic Characteristics table (page 8), Package Thermal Characteristics (page 9), Magnetic Characteristic Performance chart labels (page 11), and Power Derating section (page 16). 3 February 7, 2020 Minor editorial updates 4 May 12, 2020 Added APS11000 part option; updated Magnetic Characteristics tables; other minor editorial updates Added “(pending confirmation)” to ASIL references. Copyright 2020, Allegro MicroSystems. Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. Copies of this document are considered uncontrolled documents. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 21
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