APS11200
High-Temperature Precision Hall-Effect Switch
2
-
FEATURES AND BENEFITS
DESCRIPTION
• Unipolar switchpoints
• ASIL A functional safety compliance
• Automotive-grade ruggedness and fault tolerance
□□ Extended AEC-Q100 qualification
□□ Reverse-battery and 40 V load dump protection
□□ Operation from –40°C to 175°C junction temperature
□□ High EMC immunity, ±12 kV HBM ESD
□□ Output short-circuit and overvoltage protection
□□ Superior temperature stability
□□ Resistant to physical stress
• Operation from unregulated supplies, 2.8 to 24 V
• Chopper stabilization
• Solid-state reliability
• Industry-standard packages and pinouts
The APS11200 is a three-wire, planar Hall-effect sensor
integrated circuit (IC). This device was developed in accordance
with ISO 26262 and supports a functional safety level of ASILA.
PACKAGES:
Not to scale
3-pin SIP
(suffix UA)
This Hall-effect switch IC features extended AEC-Q100
qualification and is ideal for high-temperature operation up
to 175°C junction temperatures. In addition, the APS11200
includes a number of features designed specifically to maximize
system robustness such as reverse-battery protection, output
current limiter, overvoltage, and EMC protection.
The single silicon chip includes: a voltage regulator, a Hall
plate, small signal amplifier, chopper stabilization, Schmitt
trigger, and a short-circuit-protected open-drain output. A
south pole of sufficient strength turns the output on. Removal
of the magnetic field—or a north pole—turns the output off.
The devices include on-board transient protection for all pins,
permitting operation directly from a vehicle battery or regulator
with supply voltages from 2.8 to 24 V.
Two package styles provide a choice of through-hole or surface
mounting. Package type LH is a modified SOT23W, surfacemount package, while UA is a three-lead ultra-mini SIP for
through-hole mounting. Both packages are lead (Pb) free and
RoHs compliant with 100% matte-tin leadframe plating.
3-pin SOT23W
(suffix LH)
Functional Block Diagram
VCC
REGULATOR
Hall
Element
DYNAMIC OFFSET
CANCELLATION
TO ALL SUBCIRCUITS
LOW-PASS
FILTER
HALL
AMP.
SAMPLE, HOLD &
AVERAGING
SCHMITT
TRIGGER
VOUT
CONTROL
CURRENT
LIMIT
GND
APS11200-DS, Rev. 2
MCO-0000381
January 22, 2020
APS11200
High-Temperature Precision Hall-Effect Switch
SELECTION GUIDE
Part Number
APS11200LLHALX
Packing [1]
Mounting
Branding
13-in. reel, 10000 pieces/reel
3-pin SOT23W surface mount
A21
7-in. reel, 3000 pieces/reel
3-pin SOT23W surface mount
A21
Bulk, 500 pieces/bag
3-pin SIP through hole
A22
APS11200LLHALT [2]
APS11200LUAA
Ambient, TA
–40°C to 150°C
Switchpoints
(Typ.)
BOP
BRP
35 G
25 G
[1] Contact Allegro
[2] Available
for additional packing options.
through authorized Allegro distributors only.
RoHS
COMPLIANT
ABSOLUTE MAXIMUM RATINGS
Rating
Units
Forward Supply Voltage [1]
Characteristic
VCC
30
V
Voltage [1]
VRCC
–18
V
VOUT
30
V
Reverse Supply
Output Off Voltage [1]
Output
Symbol
Notes
Current [2]
IOUT
60
mA
Reverse Output Current
IROUT
–50
mA
Magnetic Flux Density [3]
B
Unlimited
–
Maximum Junction Temperature
Storage Temperature
ESD Voltage [4]
TJ(max)
For 500 hours
Tstg
165
°C
175
°C
–65 to 170
°C
±12
kV
AEC-Q100, Charged Device Model
±1
kV
ISO 10605, System Level
±15
kV
VESD(HBM)
AEC-Q100, Human Body Model
VESD(CDM)
VESD(SYS)
This rating does not apply to extremely short voltage transients such as load dump and/or ESD. Those events have individual ratings,
specific to the respective transient voltage event.
[2] Through short-circuit current limiting device.
[3] Guaranteed by design.
[4] System level ESD performance based on use with the application circuit shown in Figure 4 and the 2 kΩ / 330 pF ESD discharge
network.
[1]
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
2
High-Temperature Precision Hall-Effect Switch
GND
PINOUT DIAGRAMS AND TERMINAL LIST
1
VCC
2
3
VOUT
2
GND
1
VOUT
3
VCC
APS11200
3-pin SIP
(suffix UA)
3-pin SOT23W
(suffix LH)
Terminal List
Name
Number
Description
LH
UA
Connects power supply to chip
1
1
VOUT
Output from circuit
2
3
GND
Ground
3
2
VCC
VSUPPLY
RLOAD =
1 kΩ
APS11200
1
CBYP =
0.1 µF
VCC
VOUT
2
VOUT
GND
3
Figure 1: Typical Application Circuit
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
3
APS11200
High-Temperature Precision Hall-Effect Switch
ELECTRICAL CHARACTERISTICS: Valid over full operating voltage, ambient temperature range TA = –40°C to 150°C,
and with CBYP = 0.1 µF, unless otherwise specified
Characteristics
Symbol
Test Conditions
Min.
Typ.[1]
Max.
Unit [2]
2.8
–
24
V
1
2
3
mA
ELECTRICAL CHARACTERISTICS
Forward Supply Voltage
VCC
Supply Current
ICC
Output Leakage Current
IOUTOFF
Operating, TJ < 175°C
VOUTOFF = 24 V, B < BRP
–
–
10
µA
Output Saturation Voltage
VOUT(SAT)
IOUT = 20 mA, B > BOP
–
200
500
mV
Output Off Voltage
VOUTOFF
B < BRP
–
–
24
V
VCC ≥ VCC(min), B < BRP(min) – 10 G,
B > BOP(max) + 10 G
–
–
25
µs
Power-On Time
Power-On State, Output [3]
tON
POS
Chopping Frequency
fC
Output Rise Time [4]
tr
Output Fall Time [4]
tf
VCC ≥ VCC(min), t < tON
Low
–
–
800
–
kHz
RLOAD = 1 kΩ, CL = 20 pF
–
0.2
2
µs
RLOAD = 1 kΩ, CL = 20 pF
–
0.1
2
µs
30
–
60
mA
TRANSIENT PROTECTION CHARACTERISTICS
Output Short-Circuit Current Limit
Output Zener Clamp Voltage
Reverse Battery Current
Supply Zener Clamp Voltage
IOM
VZoutput
IRCC
VZ
IOUTOFF = 3 mA; TA = 25°C, Output Off
30
–
–
V
VRCC = –18 V, TA = 25°C
–
–
–5
mA
ICC = ICC(max) + 3 mA, TA = 25°C
30
–
–
V
G
MAGNETIC CHARACTERISTICS
Operate Point
BOP
–
35
50
Release Point
BRP
5
25
–
G
Hysteresis
BHYS
7
10
20
G
(BOP – BRP)
[1] Typical
data are at TA = 25°C and VCC = 12 V.
G (gauss) = 0.1 mT (millitesla).
[3] Guaranteed by device design and characterization.
[4] C = oscilloscope probe capacitance.
L
[2] 1
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
4
APS11200
High-Temperature Precision Hall-Effect Switch
THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information
Characteristic
Symbol
Test Conditions
RθJA
Package Thermal Resistance
Value
Units
Package LH, 1-layer PCB with copper limited to solder pads
228
°C/W
Package LH, 2-layer PCB with 0.463 in.2 of copper area each side
connected by thermal vias
110
°C/W
Package UA, 1-layer PCB with copper limited to solder pads
165
°C/W
Power Derating Curve
Maximum Allowable VCC (V)
TJ(max) = 175°C; ICC = ICC(max), IOUT = 0 mA (Output Off)
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
VCC(max)
Package LH, 2-layer PCB
(RθJA = 110 °C/W)
Package UA, 1-layer PCB
(RθJA = 165 °C/W)
Package LH, 1-layer PCB
(RθJA = 228 °C/W)
VCC(min)
25
45
65
85 105 125 145
Temperature (°C)
165
185
TJ(max)
Power Dissipation, PD (mW)
Power Dissipation versus Ambient Temperature
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
Package LH, 2-layer PCB
(RθJA = 110°C/W)
Package UA, 1-layer PCB
(RθJA = 165°C/W)
Package LH, 1-layer PCB
(RθJA = 228°C/W)
25
45
65
85
105
125
145
165
185
Temperature (°C)
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
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5
APS11200
High-Temperature Precision Hall-Effect Switch
CHARACTERISTIC PERFORMANCE DATA
Average Supply Current versus Ambient Temperature
Average Supply Current versus Supply Voltage
4.0
4.0
3.5
3.5
TA (°C)
ICC (mA)
2.5
-40
2.0
25
1.5
150
1.0
3.0
ICC (mA)
3.0
2.8
2.0
12
1.5
24
1.0
0.5
0.5
0.0
0.0
2
6
10
14
VCC (V)
18
22
26
-40
-20
0
20
40
60
TA (°C)
80
100 120 140 160
500
450
450
400
TA (°C)
300
-40
250
25
200
150
150
100
VOUT(SAT) (mV)
400
350
VCC (V)
350
300
2.8
250
200
12
150
24
100
50
0
-60
Average Low Output Voltage versus Ambient Temperature for I OUT = 20 mA
Average Low Output Voltage versus Supply Voltage for IOUT = 20 mA
500
VOUT(SAT) (mV)
VCC (V)
2.5
50
2
6
10
14
VCC (V)
18
22
26
0
-60
-40
-20
0
20
40
60
TA (°C)
80
100
120
140
Allegro MicroSystems
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160
6
APS11200
High-Temperature Precision Hall-Effect Switch
CHARACTERISTIC PERFORMANCE DATA (continued)
Average Operate Point versus Ambient Temperature
Average Operate Point versus Supply Voltage
50
50
45
45
35
-40
30
25
25
20
BOP (G)
BOP (G)
40
TA (°C)
40
150
15
30
2.8
25
12
20
24
15
10
10
5
VCC (V)
35
5
2
6
10
14
VCC (V)
18
22
26
-60
35
40
60
TA (°C)
80
100
120
140
160
40
-40
30
25
25
20
BRP (G)
BRP (G)
20
45
TA (°C)
40
VCC (V)
35
30
2.8
25
12
20
150
15
24
15
10
10
5
2
6
10
14
VCC (V)
18
22
26
-60
Average Switchpoint Hysteresis versus Supply Voltage
-40
-20
0
20
40
60
TA (°C)
80
100
120
140
160
Average Switchpoint Hysteresis versus Ambient Temperature
20
20
18
18
TA (°C)
14
12
-40
10
8
25
6
150
4
BHYS (G)
16
16
BHYS (G)
0
50
45
VCC (V)
14
12
2.8
10
12
8
24
6
4
2
2
0
-20
Average Release Point versus Ambient Temperature
Average Release Point versus Supply Voltage
50
5
-40
0
2
6
10
14
VCC (V)
18
22
26
-60
-40
-20
0
20
40
60
TA (°C)
80
100
120
140
Allegro MicroSystems
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160
7
APS11200
High-Temperature Precision Hall-Effect Switch
FUNCTIONAL DESCRIPTION
OPERATION
The output of the APS11200 switches low (turns on) when a
south-polarity magnetic field perpendicular to the Hall element
exceeds the operate point threshold, BOP (see Figure 2). After
turn-on, the output voltage is VOUT(SAT). The output transistor is
capable of continuously sinking up to 30 mA. When the magnetic
field is reduced below the release point, BRP, the device output
goes high (turns off) to VOUTOFF.
V+
VOUT(OFF)
BRP
VOUT
VOUT
0
Key
POS
B > BOP
B < BRP, BRP < B < BOP
V
VOUT(SAT)
BOP
0
Powering-on the device in the hysteresis range (less than BOP and
higher than BRP) will give an output state of VOUTOFF. The correct state is attained after the first excursion beyond BOP or BRP .
Switch to Low
Switch to High
VOUTOFF
POWER-ON BEHAVIOR
Device power-on occurs once tON has elapsed. During the
time prior to tON, and after VCC ≥ VCC(min), the output state is
VOUT(SAT). After tON has elapsed, the output will correspond with
the applied magnetic field for B > BOP or B < BRP. See Figure 3
for an example.
VOUT (SAT)
B+
(south)
V
The difference in the magnetic operate and release points is the
hysteresis, BHYS , of the device. This built-in hysteresis allows
clean switching of the output even in the presence of external
mechanical vibration and electrical noise.
VCC
On the horizontal axis, the B+ direction indicates increasing
south polarity magnetic field strength.
POS
t
BHYS
Figure 2: Device Switching Behavior
Output State
Undefined for
VCC< VCC (min)
VCC (min)
0
t ON
t
Figure 3: Power-On Sequence and Timing
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
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8
APS11200
High-Temperature Precision Hall-Effect Switch
Functional Safety
2
-
The APS11200 was designed in accordance with
the international standard for automotive functional safety, ISO 26262. This product achieves
an ASIL (Automotive Safety Integrity Level) rating of ASIL A
according to the standard. The APS11200 is classified as a SEooC
(Safety Element out of Context) and can be easily integrated into
safety-critical systems requiring higher ASIL ratings that incorporate external diagnostics or use measures such as redundancy.
Safety documentation will be provided to support and guide the
integration process. For further information, contact your local
Allegro field applications engineer or sales representative.
Applications
It is strongly recommended that an external bypass capacitor be
connected (in close proximity to the Hall element) between the
supply and ground of the device to guarantee correct performance
under harsh environmental conditions and to reduce noise from
internal circuitry. As is shown in Figure 1: Typical Application
Circuit, a 0.1 µF capacitor is required. In applications where
maximum robustness is required, such as in an automobile, additional measures may be taken. In Figure 4: Enhanced Protection
Circuit, a resistor in series with the VCC pin and a capacitor on
the VOUT pin enhance the EMC immunity of the device. It is
up to the user to fully qualify the Allegro sensor IC in their end
system to ensure they achieve their system requirements.
These devices are sensitive in the direction perpendicular to the
branded package face, and may be configured to sense magnetic
N
S
VPULL-UP
VSUPPLY
RLOAD =
1 kΩ
A
RS =
100 Ω
APS11200
1
VCC
VOUT
VOUT
2
A
CBYP =
0.1 µF
A
GND
3
COUT =
4.7 nF
RS and C OUT are recommended for maximum
robustness in an automotive environment.
Figure 4: Enhanced Protection Circuit
fields in a variety of orientations, such as the ones shown in
Figure 5.
Extensive applications information for Hall-effect devices is
available in:
• Hall-Effect IC Applications Guide, AN27701,
• Hall-Effect Devices: Guidelines for Designing Subassemblies
Using Hall-Effect Devices AN27703.1
• Soldering Methods for Allegro’s Products – SMD and
Through-Hole, AN26009
All are provided on the Allegro website:
www.allegromicro.com
N
S
B
PC
Figure 5: Sensing Configurations
Allegro MicroSystems
955 Perimeter Road
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9
APS11200
High-Temperature Precision Hall-Effect Switch
CHOPPER STABILIZATION
A limiting factor for switchpoint accuracy when using Hall-effect
technology is the small-signal voltage developed across the Hall
plate. This voltage is proportionally small relative to the offset
that can be produced at the output of the Hall sensor. This makes
it difficult to process the signal and maintain an accurate, reliable
output over the specified temperature and voltage range. Chopper
stabilization is a proven approach used to minimize Hall offset.
The Allegro technique, dynamic quadrature offset cancellation,
removes key sources of the output drift induced by temperature
and package stress. This offset reduction technique is based on
a signal modulation-demodulation process. Figure 6: Model of
Chopper Stabilization Circuit (Dynamic Offset Cancellation)
illustrates how it is implemented.
The undesired offset signal is separated from the magnetically
induced signal in the frequency domain through modulation.
The subsequent demodulation acts as a modulation process for
the offset causing the magnetically induced signal to recover its
original spectrum at baseband while the DC offset becomes a
high-frequency signal. Then, using a low-pass filter, the signal
passes while the modulated DC offset is suppressed. Allegro’s
innovative chopper stabilization technique uses a high-frequency
clock. The high-frequency operation allows a greater sampling
rate that produces higher accuracy, reduced jitter, and faster signal processing. Additionally, filtering is more effective and results
in a lower noise analog signal at the sensor output. Devices such
as the APS11200 that use this approach have an extremely stable
quiescent Hall output voltage, are immune to thermal stress,
and have precise recoverability after temperature cycling. This
technique is made possible through the use of a BiCMOS process
which allows the use of low-offset and low-noise amplifiers
in combination with high-density logic and sample-and-hold
circuits.
Regulator
Hall Element
Amp
Sample and
Hold
Clock/Logic
Low-Pass
Filter
Figure 6: Model of Chopper Stabilization Circuit
(Dynamic Offset Cancellation)
Allegro MicroSystems
955 Perimeter Road
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10
APS11200
High-Temperature Precision Hall-Effect Switch
POWER DERATING
The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the
Allegro MicroSystems website.)
The Package Thermal Resistance, RθJA, is a figure of merit summarizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity, K,
of the printed circuit board, including adjacent devices and traces.
Radiation from the die through the device case, RθJC, is relatively
small component of RθJA. Ambient air temperature, TA, and air
motion are significant external factors, damped by overmolding.
The resulting power dissipation capability directly reflects upon
the ability of the device to withstand extreme operating conditions. The junction temperature mission profile specified in the
Absolute Maximum Ratings table designates a total operating life
capability based on qualification for the most extreme conditions,
where TJ may reach 175°C.
The silicon IC is heated internally when current is flowing into
the VCC terminal. When the output is on, current sinking into the
VOUT terminal generates additional heat. This may increase the
junction temperature, TJ, above the surrounding ambient temperature. The APS11200 is permitted to operate up to TJ = 175°C. As
mentioned above, an operating device will increase TJ according
to equations 1, 2, and 3 below. This allows an estimation of the
maximum ambient operating temperature.
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 2 mA, VOUT = 185 mV, IOUT = 20 mA (output
on), and RθJA = 165°C/W, then:
PD = (VCC × ICC) + (VOUT × IOUT) =
(12 V × 2 mA) + (185 mV × 20 mA) =
24 mW + 3.7 mW = 27.7 mW
ΔT = PD × RθJA = 27.7 mW × 165°C/W = 4.6°C
TJ = TA + ΔT = 25°C + 4.6°C = 29.6°C
A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding
TJ(max), at a selected RθJA.
For example, given the conditions RθJA = 228°C/W, TJ(max) =
175°C, VCC(max) = 24 V, ICC(max) = 4 mA, VOUT = 500 mV,
and IOUT = 25 mA (output on), the maximum allowable operating
ambient temperature can be determined.
The power dissipation required for the output is shown below:
PD(VOUT) = VOUT × IOUT = 500 mV × 25 mA = 12.5 mW
The power dissipation required for the IC supply is shown below:
PD(VCC) = VCC × ICC = 24 V × 4 mA = 96 mW
Next, by inverting using equation 2:
ΔT = PD × RθJA = [PD(VOUT) + PD(VCC)] × 228°C/W =
(12.5 mW + 96 mW) × 228°C/W =
108.5 mW × 228°C/W = 24.7°C
Finally, by inverting equation 3 with respect to voltage:
TA(est) = TJ(max) – ΔT = 175°C – 24.7°C = 150.3°C
(1) In the above case, there is sufficient power dissipation capability
to operate up to TA(est).The example indicates that TA(max) can
ΔT = PD × RθJA
(2) be as high as 150.3°C without exceeding TJ(max). However, the
TA(max) rating of the device is 150°C; the APS11200 perforTJ = TA + ΔT (3) mance
is not guaranteed above TA = 150°C.
PD = VIN × IIN
Allegro MicroSystems
955 Perimeter Road
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11
APS11200
High-Temperature Precision Hall-Effect Switch
Package LH, 3-Pin (SOT-23W)
+0.12
2.98 –0.08
1.49 D
4°±4°
3
A
+0.020
0.180–0.053
0.96 D
+0.10
2.90 –0.20
+0.19
1.91 –0.06
2.40
0.70
D
0.25 MIN
1.00
2
1
0.55 REF
0.25 BSC
0.95
Seating Plane
Gauge Plane
8X 10° REF
B
PCB Layout Reference View
C
Standard Branding Reference View
Branded Face
1.00 ±0.13
0.95 BSC
A21
+0.10
0.05 –0.05
0.40 ±0.10
1
For Reference Only; not for tooling use (reference dwg. 802840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Active Area Depth, 0.28 mm REF
B
Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C
Branding scale and appearance at supplier discretion
D
Hall element, not to scale
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
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12
APS11200
High-Temperature Precision Hall-Effect Switch
Package UA, 3-Pin SIP
+0.08
4.09 –0.05
45°
B
E
C
2.04
1.52 ±0.05
+0.08
3.02 –0.05
1.44
E
10°
Mold Ejector
Pin Indent
E
Branded
Face
A
1.02
MAX
45°
0.79 REF
A22
1
1
2
D Standard Branding Reference View
3
+0.03
0.41 –0.06
14.99 ±0.25
+0.05
0.43 –0.07
For Reference Only; not for tooling use (reference DWG-9065)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Dambar removal protrusion (6X)
B
Gate and tie bar burr area
C
Active Area Depth, 0.50 mm REF
D
Branding scale and appearance at supplier discretion
E
Hall element (not to scale)
1.27 NOM
Allegro MicroSystems
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13
APS11200
High-Temperature Precision Hall-Effect Switch
Revision History
Number
Date
Description
–
February 23, 2018
Initial release
1
January 16, 2019
Minor editorial updates
2
January 22, 2020
Minor editorial updates
Copyright 2020, Allegro MicroSystems.
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