ATS685LSH Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
Features and Benefits
• Fully optimized differential digital gear tooth sensor IC • Running Mode Lockout • Unique algorithms for increased vibration immunity • AGC and reference adjust circuit • Air gap independent switchpoints • Digital output representing gear profile • Precise duty cycle throughout operating temperature range • Large operating air gap range • Short power-on time • True zero-speed operation • Undervoltage lockout (UVLO) • Wide operating voltage range • Internal current regulator for two-wire operation • Single-chip sensing IC for high reliability • Robust test coverage capability using Scan Path and IDDQ measurement
Description
The ATS685LSH is an optimized Hall-effect sensing integrated circuit and rare-earth pellet combination that provides a user-friendly solution for true zero-speed digital gear-tooth sensing in two-wire applications. The sensor IC consists of a single-shot molded plastic package that includes a samarium cobalt pellet, a pole piece, and a Hall Effect IC that has been optimized to the magnetic circuit. This small package can be easily assembled and used in conjunction with a wide variety of gear shapes and sizes. The single integrated circuit incorporates a dual element Hall-effect sensor IC and signal processing circuitry that switches in response to differential magnetic signals created by ferromagnetic targets. The device contains a sophisticated compensating circuit to eliminate magnetic and system offsets. Digital tracking of the analog signal is used to achieve true zero speed operation. Advanced calibration algorithms are used to adjust the device gain and offset at power-up, resulting in air gap independent switchpoints, which greatly improves output accuracy. In addition, advanced algorithms mitigate the effect of system anomalies such as target vibration and sudden changes in air gap. The regulated current output is configured for two-wire operation. This sensor IC is ideal for obtaining edge and duty cycle information in gear-tooth–based applications such as transmission speed.
Package: 4-pin SIP (suffix SH)
Not to scale
The ATS685 is provided in a 4-pin SIP package that is lead (Pb) free, with 100% matte tin leadframe plating.
Functional Block Diagram
VCC Voltage Regulator
PDAC Hall Amp Offset Adjust AGC NDAC Reference Generator and Lockout
Synchronous Digital Controller TEST Multiplexor
GND
ATS685LSH-DS
ATS685LSH
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
Selection Guide
Part Number Packing*
ATS685LSHTN-T 13-in. reel, 800 pieces per reel *Contact Allegro® for additional packing options
Absolute Maximum Ratings
Characteristic Supply Voltage Reverse Supply Voltage Operating Ambient Temperature Maximum Junction Temperature Storage Temperature Symbol VCC VRCC TA TJ(max) Tstg Range L, refer to Power Derating Curve Notes Rating 26.5 –18 –40 to 150 165 –65 to 170 Units V V ºC ºC ºC
Pin-out Diagram
Terminal List Table
Number 1 2 3 4 Name VCC NC TEST GND Supply voltage No connection (float or tie to GND) Test (float or tie to GND) Ground Function
1234
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
OPERATING CHARACTERISTICS VCC and TA within specification, unless otherwise noted
Characteristics Electrical Characteristics Supply Voltage3 Undervoltage Lockout Reverse Supply Current4 Supply Zener Clamp Voltage Supply Zener Current Supply Current Supply Current Ratio Test Pin Zener Clamp Voltage5 Power-On State Characteristics Power-On Time6 Power-On State7 Output Stage Output Slew Rate8,9 Performance Characteristics Operating Frequency Analog Signal Bandwidth Operate Point Release Point Running Mode Lockout Enable Threshold Running Mode Lockout Release Threshold Calibration Start Mode Hysteresis Initial Calibration10 POHYS CALI Rising output (current) edges, fOP < 200 Hz – – VLOR(RM) – – 3 mV edges fOP BW BOP BRP VLOE(RM) VLOR(RM) % of peak-to-peak BSIG , AGOP within specification % of peak-to-peak BSIG , AGOP within specification At peak-to-peak VPROC < VLOE(RM) , output switching disables At peak-to-peak VPROC > VLOR(RM) , output switching enables 0 16 – – – – – 20 70 30 170 200 12 – – – – – kHz kHz % % mV mV di / dt Δi / Δt from 90% to 10% ICC level RSENSE = 100 Ω, CLOAD = 10 pF, no CBYPASS 7 14 – mA/μs tPO POS VCC > VCC (min), fOP < 100 Hz t > tPO – – 1 ICC(High) 2 – ms A VCC VCC(UV) IRCC VZ IZ ICC(Low) ICC(High) ICC(High) / ICC(Low) VZTEST Operating, TJ < TJ (max), ICC within specification VCC 0 → 5 V or 5 → 0 V VCC = –18 V ICC = ICC (max) + 3 mA, TA = 25°C TA = 25°C, VCC = 28 V Low-current state High-current state Ratio of high current to low current 4.0 – – 28 – 4 12 1.85 – – 3.5 – – – 6 14 – 6 24 3.95 –10 – 19 8 16 3.05 – V V mA V mA mA mA – V Symbol Test Conditions Min. Typ.1 Max. Unit2
Continued on the next page…
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
OPERATING CHARACTERISTICS (continued) VCC and TA within specification, unless otherwise noted
Characteristics Functional Characteristics Operating Signal Range11 Extended Operating Signal Range Operational Air Gap Range Extended Operational Air Gap Range Allowable User-Induced Differential Offset Duty Cycle Variation12 Maximum Sudden Signal Amplitude Change
1Typical 21
Symbol
Test Conditions Differential magnetic signal, duty cycle within specification Differential magnetic signal, output switching (no missed edges), duty cycle not guaranteed Using Allegro Reference Target 60-0, duty cycle within specification Using Allegro Reference Target 60-0, output switching (no missed edges), duty cycle not guaranteed Operation within specification Wobble < 0.5 mm, AG within specification Instantaneous symmetric magnetic signal amplitude change, measured as a percentage of peak-to-peak BSIG, fOP < 500 Hz
Min.
Typ.1
Max.
Unit2
BSIG BSIGEXT AGOP AGEXT BDIFFEXT ΔD BSIG(INST)
50 30 0.5 – ±60 – –
– – – – – – 45
1500 – 2.5 3.0 – ±10 –
GPK-PK GPK-PK mm mm G % %
values are at TA = 25°C and VCC = 12 V. Performance may vary for individual units, within the specified maximum and minimum limits. G (gauss) = 0.1 mT (millitesla). 3Maximum voltage must be adjusted for power dissipation and junction temperature; see Power Derating section. 4Negative current is defined as conventional current coming out of (sourced from) the specified device terminal. 5Sustained voltages beyond the clamp voltage may cause permanent damage to the IC. 6Measured from V CC ≥ VCC (min) to the time when the device is able to switch the output signal in response to a magnetic stimulus. 7Please refer to the Functional Description, Power-On section. 8di is the difference between 10% of I CC(Low) and 90% of ICC(High) . dt is the time period between those two points. 9C LOAD is the probe capacitance of the oscilloscope used to make the measurement. 10For power-on frequency, f OP < 200 Hz. Higher power-on frequencies may result in more input magnetic cycles until full output edge accuracy is achieved, including the possibility of missed output edges. 11AG OP is dependent on the available magnetic field. The available field is dependent on target geometry and material, and should be independently characterized. The field available from the reference target is given in the Reference Target table. 12Target rotation from pin 4 to pin 1.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Reference Target 60-0 (60 Tooth Target) Characteristics
Outside Diameter Face Width Angular Tooth Thickness Angular Valley Thickness Tooth Whole Depth Material
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
Symbol
Do F t tv ht Low Carbon Steel
Test Conditions
Outside diameter of target Breadth of tooth, with respect to branded face Length of tooth, with respect to branded face Length of valley, with respect to branded face
Typ.
120 6 3 3 3 –
Units
mm mm deg. deg. mm –
Air Gap
Symbol Key
ØDO
ht
Branded Face of Package
F
Reference Gear Magnetic Gradient Amplitude versus Air Gap
Reference Target 60-0, Hall element spacing 2.20 mm
1200
Peak-to-Peak Differential B (G)
1000
800
600
400
200
Branded Face of Package
0 1 2 3
0
Air Gap (mm)
Reference Target 60-0
Reference Gear Magnetic Profile
Reference Target 60-0, Hall element spacing 2.20 mm
600
t
Air Gap (mm)
0.50 0.75
400
Differential B (G)
tV
1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00
200
0
200
400
3.00 mm AG 0.50 mm AG
0 2 4 6 8 10 12 14 16 18 20
600
Gear Rotation (°)
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
Thermal Characteristics may require derating at maximum conditions, see Power Derating section
Characteristic
Package Thermal Resistance
Symbol
RθJA
Test Conditions*
Single layer PCB, with copper limited to solder pads Single layer PCB, with copper limited to solder pads and 3.57 cm2) copper area each side in.2 (23.03
Value
126 84
Unit
ºC/W ºC/W
*Additional thermal information available on the Allegro website
Power Derating Curve
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 20 At maximum supply current, ICC = ICC(High)(max) VCC(max)
Maximum Allowable VCC (V)
(R θJA = 84 °C/W) (R θJA = 126 °C/W)
VCC(min)
40
60
80
100
120
140
160
180
Temperature (°C)
Power Dissipation versus Ambient Temperature
2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 20 40 60 80 100 120 140 Temperature,TA (°C) 160 180
R
JA
At maximum supply current, ICC = ICC(High)(max)
Power Dissipation, PD (m W)
R
JA
= 84 ºC/W
= 126 ºC/W
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
Functional Description
Sensing Technology The ATS685 sensor IC contains a single-chip differential Halleffect circuit, a samarium cobalt pellet, and a flat ferrous pole piece (a precisely-mounted magnetic field concentrator that homogenizes the flux passing through the Hall chip). As shown in figure 1, the circuit supports two Hall elements, which sense the
magnetic profile of the ferromagnetic gear target simultaneously, but at different points (spaced at a 2.2 mm pitch), generating a differential internal analog voltage, VPROC , that is processed for precise switching of the digital output signal. The Hall IC is self-calibrating and also integrates a temperature compensated amplifier and offset cancellation circuitry. Its voltage regulator provides supply noise rejection throughout the operating voltage range. Changes in temperature do not greatly affect this device due to the stable amplifier design and the offset rejection circuitry. The Hall transducers and signal processing electronics are integrated on the same silicon substrate, using a proprietary BiCMOS process. Target Profiling During Operation Under normal operating conditions, the IC is capable of providing digital information that is representative of the mechanical features of a rotating gear. The waveform diagram in figure 2 presents the automatic translation of the mechanical profile, through the magnetic profile that it induces, to the digital output signal of the ATS685. No additional optimization is needed and minimal processing circuitry is required. This ease of use reduces design time and incremental assembly costs for most applications. Diagnostics The regulated current output is configured for two-wire applications, requiring one less wire for operation than do switches with the traditional open-collector output. Additionally, the system designer inherently gains diagnostics because there is always output current flowing, which should be in either of two narrow ranges, shown in figure 3 as ICC(HIGH) and ICC(LOW). Any current level not within these ranges indicates a fault condition. If ICC > ICC(HIGH)(max), then a short condition exists, and if ICC < ICC(LOW)(min), then an open condition exists. Any value of ICC between the allowed ranges for ICC(HIGH) and ICC(LOW) indicates a general fault condition.
+mA
Target (Gear) Element Pitch Hall Element 2 South Pole North Pole (Pin 4 Side) Hall Element 1 Hall IC Pole Piece (Concentrator) Back-biasing Rare-earth Pellet Case (Pin 1 Side)
Dual-Element Hall Effect Device
Figure 1. Relative motion of the target is detected by the dual Hall elements mounted on the Hall IC.
Mechanical Position (Target moves past sensor pin 1 to pin 4)
This tooth sensed earlier
Target (Gear)
This tooth sensed later
Target Magnetic Profile
+B
Device Package Orientation to Target
Device Branded Face
Element Pitch Hall Element 1 IC
(Pin 1 Side) (View of Side Away from Pins)
Hall Element 2
(Pin 4 Side)
Device Internal Differential Analog Signal, VPROC BOP(#1)
BOP(#2) BRP(#1)
+t
ICC(HIGH)(max) ICC(HIGH)(min) ICC(LOW)(max)
Short
Device Internal Switch State Off On Device Output Signal, ICC
Off
On
Fault
Range for Valid ICC(HIGH)
ICC(LOW)(min)
+t
Open
Range for Valid ICC(LOW)
0 Figure 3. Diagnostic characteristics of supply current values.
Figure 2. The magnetic profile reflects the geometry of the target, allowing the ATS685 to present an accurate digital output response.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
Determining Output Signal Polarity In figure 2, the top panel, labeled Mechanical Position, represents the mechanical features of the target gear and orientation to the device. The bottom panel, labeled Device Output Signal, displays the square waveform corresponding to the digital output signal (current amplitude) that results from a rotating gear configured as shown in figure 3. Referring to the target side nearest the face of the sensor IC, the direction of rotation is: perpendicular to the leads, across the face of the device, from the pin 1 side to the pin 4 side. In order to read the output signal as a voltage, VSENSE , a sense resistor, RSENSE , can be placed on either the VCC signal or on the GND signal. As shown in figure 4, when RSENSE is placed on the GND signal, the output signal voltage, VSENSE(LowSide) , is in phase with ICC . When RSENSE is placed on the VCC signal, the output signal voltage, VSENSE(HighSide) , is inverted relative to ICC .
Output Polarity States RSENSE Location High side (VCC pin side) Low side (GND pin side) ICC State High Low High Low VSENSE State Low High High Low
VCC ICC 1 VCC ATS685 ICC 1
VCC RSENSE VSENSE(HighSide)
VCC ATS685
GND 4 VSENSE(LowSide) RSENSE
GND 4
Rotating Target
Branded Face of Package
I+
ICC
V+
VSENSE(LowSide)
V+
VSENSE(HighSide)
Pin 1
Pin 4
Figure 4. Alternative Polarity Configurations Using Two-Wire Sensing. The Output Polarity States table provides the permutations of output voltage relative to ICC, given alternative locations for RSENSE. Panel A shows the low-side, VSENSE(LowSide) , sensing configuration, and panel B shows the high-side, VSENSE(HighSide) , configuration. As shown in panel C, VSENSE(LowSide) is in phase with ICC , and VSENSE(HighSide) , is inverted.
Figure 3. This figure depicts left-to-right (pin 1 to pin 4) direction of target rotation.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Continuous Update of Switchpoints Switchpoints are the threshold levels of the differential internal analog signal, VPROC , at which the device changes output signal state. The value of VPROC is directly proportional to the magnetic flux density, B, induced by the target and sensed by the Hall elements. As VPROC rises through a certain limit, referred to as the operate point, BOP , the output state changes from high to low. As VPROC falls below BOP to a certain limit, the release point, BRP , the output state changes from low to high.
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
As shown in figure 5, threshold levels for the switchpoints are established as a function of the peak input signal levels. The device incorporates an algorithm that continuously monitors the input signal and updates the switching thresholds accordingly with limited inward movement of VPROC. The switchpoint for each edge is determined by the detection of the previous two signal edges. In this manner, variations are tracked in real time.
(A) TEAG varying; cases such as eccentric mount, out-of-round region, normal operation position shift
(B) Internal analog signal, VPROC, typically resulting in the IC
V+
Smaller TEAG
Larger TEAG
Smaller TEAG
Target
Target
VPROC (V)
IC
Smaller TEAG
IC
Larger TEAG 0
Hysteresis Band (Delimited by switchpoints) Target Rotation (°) 360
(C) Internal analog signal, VPROC, representing magnetic field for digital output
V+
BOP VPROC (V)
BOP
BOP
BOP
BOP
BOP
BRP
BRP
BRP
BRP
BRP
Figure 5. The Continuous Update algorithm allows the Allegro IC to interpret and adapt to variances in the magnetic field generated by the target as a result of eccentric mounting of the target, out-of-round target shape, and similar dynamic application problems that affect the TEAG (Total Effective Air Gap). As shown in panel A, the variance in the target position results in a change in the TEAG. This affects the IC as a varying magnetic field, which results in proportional changes in the internal analog signal, VPROC, shown in panel B. The Continuous Update algorithm is used to establish switchpoints based on the fluctuation of VPROC, as shown in panel C.
VOUT (V)
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Power-On The ATS685 is guaranteed to power-on in the high current state, ICC(High) . When power (VCC > VCC (min) ) is applied to the device, a short period of time is required to power the various portions of the circuit. During this period, the ATS685 will power-on in the high current state, ICC(High) . Initial Edge Detection The device self-calibrates using the initial teeth sensed, and then
Target
(Gear)
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
enters running mode. This results in reduced accuracy for a brief period, CALI . However, this period allows the device to optimize for running mode operation. As shown in figure 6, the first three high peak signals corresponding to rising output edges are used to calibrate AGC (Automatic Gain Control). There is a slight variance in the duration of initialization, depending on what target feature is opposite the sensor IC when power-on occurs. Also, a high speed of target rotation at power-on may increase the quantity required in the CALI period.
Device Position
1
2
3
4
VPR
Start Mode Hysteresis Overcome
AGC Calibration
VPR
Running Mode
Power-on 1 opposite tooth
OC
OC
ICC Power-on at falling 2 mechanical edge
Start Mode Hysteresis Overcome
ICC
OC
VPR
AGC Calibration
ICC Power-on opposite 3 valley
Start Mode Hysteresis Overcome
VPR
Running Mode
OC
ICC
OC
VPR
AGC Calibration
VPR
Running Mode
OC
ICC Power-on 4 at rising mechanical edge
Start Mode Hysteresis Overcome
ICC
OC
VPR
AGC Calibration
VPR
Running Mode
OC
ICC
ICC
Figure 6. Power-On Initial Edge Detection. This figure demonstrates four typical power-on scenarios. All of these examples assume that the target is moving relative to the sensor IC in the direction indicated (from pin 1 to pin 4) and the voltage output is configured for low-side sensing, VOUT(Low). The length of time required to overcome Start Mode Hysteresis, as well as the combined effect of whether it is overcome in a positive or negative direction plus whether the next edge is in that same or opposite polarity, affect the point in time when AGC calibration begins. Three high peaks are always required for AGC calibration when fOP ≤ 200 Hz, and more may be required at greater speeds.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
Start Mode Hysteresis This feature helps to ensure optimal self-calibration by rejecting electrical noise and low-amplitude target vibration during initialization. This prevents AGC from calibrating the device on such spurious signals. Calibration can be performed using the actual target features.
A typical scenario is shown in figure 7. The hysteresis, POHYS , is a minimum level of the peak-to-peak amplitude of the internal analog electrical signal, VPROC , that must be exceeded before the ATS685 starts to compute switchpoints.
Target, Gear
Target Magnetic Profile
IC Position Relative to Target Differential Signal, VPROC Start Mode Hysteresis, POHYS
1
2
3
4
BOP(initial) BRP BOP BRP BRP(initial)
Output Signal, ICC
If exceed POHYS on high side If exceed POHYS on low side
Figure 7. Operation of Start Mode Hysteresis
• At power-on (position 1), the ATS685 begins sampling VPROC . • At the point where the Start Mode Hysteresis, POHYS, is exceeded, the device establishes an initial switching threshold, by using the Continuous Update algorithm. If VPROC is rising through the limit on the high side (position 2), the switchpoint is BOP , and if VPROC is falling through the limit on the low side (position 4), it is BRP . After this point, Start Mode Hysteresis is no longer a consideration. Note that a valid VPROC value exceeding the Start Mode Hysteresis can be generated either by a legitimate target feature or by excessive vibration. • In either case (BOP or BRP), because the switchpoint is immediately passed as soon as it is established, the ATS685 enables switching: ▫ If on the high side, at BOP (position 2) the output would switch from low to high. However, because output is already high, no output switching occurs. At the next switchpoint, where BRP is passed (position 3), the output switches from high to low. ▫ If on the low side, at BRP (position 4) the output switches from high to low.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
Undervoltage Lockout When the supply voltage falls below the minimum operating voltage, VCC(UV) , ICC goes high and remains high regardless of the state of the magnetic gradient from the target. This lockout feature prevents false signals, caused by undervoltage conditions, from propagating to the output of the device. Because VCC is below the VCC(min) specification during lockout, the ICC levels may not be within specification. Power Supply Protection The device contains an on-chip regulator and can operate over a wide VCC range. For devices that need to operate from an unregulated power supply, transient protection must be added externally. For applications using a regulated line, EMI/RFI protection may still be required. Contact Allegro for information on the circuitry needed for compliance with various EMC specifications. Refer to figure 8 for an example of a basic application circuit. Automatic Gain Control (AGC) This feature allows the device to operate with an optimal internal electrical signal, regardless of the air gap (within the AG specification). At power-on, the device determines the peak-to-peak amplitude of the signal generated by the target. The gain is then automatically adjusted. Figure 9 illustrates the effect of this feature. Running Mode Gain Adjust The ATS685 has a feature during Running mode to compensate for dynamic air gap variation. If the system increases the mag-
netic input drastically, the device will gradually readjust the gain downwards, allowing the chip to regain the optimum internal electrical signal with the new, larger, magnetic signal. Dynamic Offset Cancellation (DOC) The offset circuitry when combined with AGC automatically reduces the effects of chip, magnet, and installation offsets. This circuitry is continuously active, including both Power-on mode and Running mode, compensating for any offset drift (within Allowable User-Induced Differential Offset). Continuous operation also allows it to compensate for offsets induced by temperature variations over time. Running Mode Lockout The ATS685 has a Running mode lockout feature to prevent switching on small signals that are characteristic of vibration signals. The internal logic of the chip evaluates small signal amplitudes below a certain level to be vibration. In that event, the output is blanked (locked-out) until the amplitude of the signal returns to normal operating levels. Watchdog The ATS685 employs a watchdog circuit to prevent extended loss of output switching during sudden impulses and vibration in the system. If the system changes the magnetic input drastically such that target feature detection is terminated, the device will fully reset itself, allowing the chip to recalibrate properly on the new magnetic input signal.
V CC 1
Ferrous Target Mechanical Profile
V+ Internal Differential Analog Signal Response, without AGC
2
ATS685
3
AGLarge
0.01 F (optional) CBYPASS
AGSmall
4
V+
RSENSE 100
CLOAD
Internal Differential Analog Signal Response, with AGC
AGSmall AGLarge
Figure 8. Typical circuit for proper device operation.
Figure 9. Automatic Gain Control (AGC). The AGC function corrects for variances in the air gap. Differences in the air gap cause differences in the magnetic field at the device, but AGC prevents that from affecting device performance, as shown in the lowest panel.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
Power Derating
The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro website.) The Package Thermal Resistance, RJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RJC, is relatively small component of RJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD. PD = VIN × IIN T = PD × RJA TJ = TA + ΔT For example, given common conditions such as: TA= 25°C, VCC = 12 V, ICC = 6 mA, and RJA = 126 °C/W, then: PD = VCC × ICC = 12 V × 6 mA = 72 mW T = PD × RJA = 72 mW × 126 °C/W = 9.1°C TJ = TA + T = 25°C + 9.1°C = 34.1°C A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RJA and TA. (1) (2) (3)
Example: Reliability for VCC at TA = 150°C, package SH, using a single-layer PCB. Observe the worst-case ratings for the device, specifically: RJA = 126 °C/W, TJ(max) = 165°C, VCC(max) = 28 V, and ICC(max) = 16 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: Tmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = Tmax ÷ RJA = 15°C ÷ 126 °C/W = 119 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) ÷ ICC(max) = 119 mW ÷ 16 mA = 7.4 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤ VCC(est). Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced RJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
Package SH, 4-Pin SIP
F
1.10 1.10 F
5.50±0.05
E B
8.00±0.05 LLLLLLL NNN 5.80±0.05
E1 E2
Branded Face
YYWW
1.70±0.10 5.00±0.10 4.00±0.10 1 2 3 4 A 0.60±0.10 0.71±0.05
D
Standard Branding Reference View = Supplier emblem L = Lot identifier N = Last three numbers of device part number Y = Last two digits of year of manufacture W = Week of manufacture
For Reference Only, not for tooling use (reference DWG-9003) Dimensions in millimeters 24.65±0.10 A Dambar removal protrusion (16X)
B Metallic protrusion, electrically connected to pin 4 and substrate (both sides) C Thermoplastic Molded Lead Bar for alignment during shipment D Branding scale and appearance at supplier discretion E Active Area Depth 0.43 mm REF F
1.00±0.10 13.10±0.10
+0.06 0.38 –0.04
Hall elements (E1, E2); not to scale
A 1.0 REF 1.60±0.10
C
1.27±0.10 5.50±0.10
0.71±0.10
0.71±0.10
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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ATS685LSH
Two-Wire, Zero Speed Differential Gear Tooth Sensor IC
Copyright ©2011, Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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