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DATA SHEET
HSCDTD008A
□Electronic Compass function
Head office 1-7,Yukigaya-otsukamachi, Ota-ku, Tokyo, 145-8501, JAPAN
Phone+81 3-3726-1211 FAX+81 3-3728-1741
Nagaoka Plant 1-3-5, Higashitakamimachi, Nagaoka-city, Niigata-pref.940-0006, JAPAN
Phone+81 258-24-4111 FAX+81 258-24-4110
This specification is subject to change without notice.
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OVERVIEW
HSCDTD series is three axis terrestrial magnetism sensor of the digital output.
A high sensitivity magnetic sensor that detects the terrestrial magnetism element is mounted.
It provides with the drive circuit, the signal processing circuit, and the serial interface.
The electronic compass function is achieved by combining with our software.
FEATURES
- 3-Axis magnetic sensor with 0.15µT/LSB resolution
- Output, x, y, z axis magnetic field strength.
- Serial interface
I2C slave interface (SS、FS、FS+、HS) PhilipsI2C revision .2.1 and
NXP UM10204 I2C-bus specification and user manual Rev.03-19 June 2007 is supported.
-8 pin, FLGA package
- Package size : 1.6mm x 1.6mm x t0.7mm
- Low current consumption
- Lead free, RoHS instruction, Halogen free conforming
- Function
- Initialization Function (Power on reset)
Stand-by Mode
- Functional Mode
Active Mode
- Measurement
Force State
Normal State (Data Rate 0.5,10,20,100Hz Selectable)
- Temperature Compensation Function
- Offset Calibration Function
- Data Ready Function
- Offset Drift Function
- Self Test Function
- FIFO Function (8 depth )
- Supply Voltage- Analog
- Digital
1.7 to 3.6 V
1.65V to AVDD
- Operating Temperature
-40 to +85℃
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HSCDTD008A
ABSOLUTE MAXIMUM RATINGS
Characteristics
Analog Supply Voltage
Digital Supply Voltage
Input Voltage
Strage Temperature
Symbol
AVDD
DVDD
VIN
Tstg
Min.
-0.3
-0.3
-0.3
-40
Typ.
-
Max.
+5.0
+5.0
+5.0
+125
Unit
V
V
V
℃
ELECTRICAL / MAGNETIC CHARACTERISTICS
Unless otherwise specified: AVDD = 2.5V, DVDD_IO = 1.8V, Ta = 25℃
Typ.
Max.
Unit
Characteristics
Symbol Min.
AVDD
1.7
2.5
3.6
V
Analog Supply Voltage
DVDD
1.65
1.8
AVDD
V
Digital Supply Voltage
Supply Current Consumption (Total)
IDD
3
10
µA
Stand-by Mode
IDD
60
85
µA
Active Mode, Average (ODR = 10Hz)
IDD
mA
2.5
3
Active Mode, Maximum
℃
Ta
-40
+85
Operating Temperature
+7.2
-7.2
mT
Measurement Range (*1)
+2
-2
%FS
Measurement Nonlinearity (±1.2mT)
µT/LSB
0.150
Measurement Sensitivity
VIH
DVDD
V
0.8 x DVDD
Input Voltage High
VIL
V
Low
0
0.2 x DVDD
VOH 0.9 x DVDD
V
DVDD
Output Voltage High
VOL
V
0
0.1 x DVDD
Low
ODR
Hz
0.5
100
Output Data Rate (Normal State)
15
bit
Output Resolution
5
msec
Measurement Time
Control Timing
3
Turn On Time (Off to Stand-by Mode)
msec
5
Turn On Time (Stand-by to Active Mode)
µsec
µsec
Turn Off Time (Active to Stand-by Mode)
5
*1. "Measurement range : ±7.2" is total value of 3-Axis measurement. One axis is ±2.4mT.
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HSCDTD008A
BLOCK DIAGRAM
REG
A/D
Converter
3 axis
Sensor
Compensation
OSC
DVDD
VSS
PreAmp
MUX
AVDD
I2C
SDA
Function
SCL
Temp Sensor
Register
Drive Generator
Controller
OTPROM
TEST1
TEST0
DRDY
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HSCDTD008A
FUNCTIONAL SPECIFICATIONS
Function List
Name
Description
Initialization
Power on reset is performed by turning on the power.
All circuits and registers are set to default and mode is
set to stand-by mode automatically by POR.
Software reset is performed by writing to control register.
All register is reloaded form OTP and internal compensation table is reloaded.
Self test confirm the operation on sensor by register command
This sensor has stand-by mode and active mode for power control.
There are two states in active mode.
The sensor is not active when AVDD and/or DVDD_IO are disable.
Self Test
Functional Modes
Off mode
Stand-by Mode
Active Mode
Force State
Normal State
Data Ready Function
Offset Calibration Function
Offset Drift Function
Temperature Measurement
Function
Temperature Compensation
Function
Low power waiting state. Stand-by mode can access to register.
Reading/Writing register is enable on stand-by mode.
Change from stand-by to active mode by register command
to control register.
Start to measure and output data by register command.
Force state is default.
Perform to measure and output data by using the internal
timer trigger.
Informs when new measured results are updated.
It is possible that data ready inform the signal to the DRDY pin when
updated output data.
Sensor offset can be canceled by using internal DAC circuit and digital
compensation function when the register command is set.
When magnetic field strength have offset drift, output data values can be
compensated by writing in the offset value registers.
Retrieve temperature data from internal temperature sensor.
Temperature data is used for internal compensation for output data.
Compensate gain in digital circuit by temperature measurement results.
This products have 8 depth FIFO memory
FIFO Function
OCL
meas.
PC = 1
OCL=1
FS = 0
OCL=0
OFF
mode
Stand-by
mode
Force
State
Normal
State
TCS=1
FS = 1
PC = 0
TCS
meas.
TCS=0
Active
State Machine
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FUNCTIONAL SPECIFICATIONS (Continued)
Initialization
- All internal circuits and all register values are initialized with POR (Power On Reset) after power-on.
- After initialization, the functional mode move to standby mode automatically.
- The software reset set by the register command SRST=1 makes all register value to defaults and reload
the compensation values for internal sensor calculation.
Selftest
-Selftest confirm with the inner I/F and the digital logic.
-Selftest is performed with reading the STB register and setting the register
command CTRL3 STC bit to Hi.
-The following chart show the procedure of selftest .
-The value of response register STB is back to 55h after reading it.
The flow chart of selftest
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FUNCTIONAL SPECIFICATIONS (Continued)
Modes
OFF mode
-The sensor is not active when AVDD and/or DVDD_IO are disable.
-The following table show the each status of off mode.
AVDD
DVDD
Operation State
Sensor
is
not
active,
There
are no inference on the interface bus.
0V
0V
Sensor
is
not
active,
There
are no inference on the interface bus.
0V
1.65V to 3.6V
Sensor is not active, There are no inference on the interface bus.
1.7V to 3.6V
0V
Stand-by mode
-After loading the POR (Power On Reset), internal state is moved to the standby mode automatically.
-Read and Write access function is limitative as follows at the stand-by mode.
-Write: (CTRL3) FORCE, TCS and STC are disable
-Read: All resister can be read.
-Register is cahnged form the Active mode to the Stand-by mode by set PC=0(CNTL1) as follows.
Active mode
-At active mode, each function can be performed by setting control register 3(CTRL3).
-To transfer to active mode, it sets the PC=1(CTRL1).
-There are two types of measurement state. One is periodical measurement "Normal state " controlled
by inner timer. and the other is "Force state" controlled by register command form outside.
-The measurement state is selectable with FS bit on control register 1(CTRL1)
-The default of measurement state is the force state (FS=1) after POR or reset running.
AVDD=OFF
and/or
DVDD=OFF
CTRL3:SRST
AVDD=ON and
DVDD=ON
AVDD=OFF or
DVDD=OFF
Stand-by mode
OFF mode
CTRL1:PC=1
CTRL1:PC=0
AVDD=OFF or
DVDD=OFF
Active mode
CTRL3:SRST
The diagram on mode transfer
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FUNCTIONAL SPECIFICATIONS (Continued)
Contorol function for Data Ready terminal with CTRL2 register
CNRL2 bit
Bit Name
Default Condition
4
DEN
0
Output control on DRDY PIN
0 = Disable
1 = Enable
3
DRP
1
The polarity setting on DRDY PIN
0 = Active Low
1 = Active High
Data ready function
-This function is used for notice that output data was updated.
-Data ready output is enable on the outside terminal (DRDY PIN), when the data was updated.
- Information of dada ready can be red with the status register (STAT).
-DRDY is changed to LOW after reading data on the output register.
- Conditions of data ready function can be set on the control register (CTRL2).
/CTRL. FORCE
or Internal trigger
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FUNCTIONAL SPECIFICATIONS (Continued)
Offset calibration function
-This function is enable when the control register (CNTL3:OCL) was set to Hi during the Force State.
-The offset value for inner ADC output is calculated with the measured sensor offset, and then
set compensation values for the amplitude offset and also the digital offset automatically.
-The OCL bit is changed to be low after updating the compensation offset value, and then the status
is back to before measurement.
Offset drift function
-This function can make the digital compensation output that is add with values wrote by
the host CPU on the offset drift register (OFFX,OFFY,OFFZ).
-Offset drift values can be set with 15bit signed value.
offset drift value
Sensor
Output
センサ出力値
+
value
+
オフセットドリフト値
オフセットドリフト値
Sensor
Output
センサ出力値
value
Temperature Measurement and Compensation Function
- The temperature measurement function will be executed when the register command TCS is set "1"
during the Force State. After measurement, TCS bit change to "0" and back to before measurement.
-The measurement result is wet on the temperature value register (TEMP).
-Sensor output values are compensated with the temperature value register(TEMP)
-After temperature measurement, the status register TRDY (STAT1) change to"1". This register is
cleared by reading the TEMP register. And the status of temperature measurement Active/inactive can be
output on the external DRDY Pin with setting the bit DRTS at the control register CTRL2.
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FUNCTIONAL SPECIFICATIONS (Continued)
FIFO Function
- This products have 8 depth FIFO memory.
- This mode is performed when the control register /CTRL2.FF(1Ch) is set to Hi.
- Data is stored in FIFO and FIFO pointer is shown in /FFPT.FP(19h).
- /STAT.FFU(18h) is performed when /FFPT.FP = 8.
- /STAT.DOR(18h) is performed when new data is stored and oldest data is cleared during FP=8.
- In case of FP=1,2,3,4,5,6,7,8 , DRDY =1(/CNTL2.DEN=1).
Figure. FIFO Structure
Figure. FIFO Event (DRDY , DOR , FFU)
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FUNCTIONAL SPECIFICATIONS (Continued)
FIFO Function
- When CTRL2.FCO is set to "1", Data is stored in the following manner.
- The data is set to FIFO only if the distance of maesurement data against the all data in FIFO
is over the "ITHR(26h-27h)" distance.
- When CNTL2.FCO is set to "1" and CNTL2.AOR is set to "0",
if there is one axis over the distance, the data is set to FIFO. ("OR" condition)
- When CNTL2.FCO is set to "1" and CNTL2.AOR is set to "1",
only if all axes over the distance, the data is set to FIFO. ("AND" condition)
DF(axis) = ABS(/MEAS(axis) - /FIFO(axis))
Figure. Multiple comparison task subprocess
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HSCDTD008A
CONTROL TIMING SPECIFICATIONS
POWER SUPPLY SEQUENCE
AVDD
VHav
VHdv
GND
DVDD
VHdv
GND
ton
tsa
tof
Active
OFF mode
POR
Stand-by
OFF mode
CTRL1/PC→1
AVDD
VHav
VHdv
GND
DVDD
VHdv
VLdv
GND
ton
tsa
tas
tof
Active
POR Stand-by
Stand-by
OFF mode
OFF mode
CTRL1/PC→1
CTRL1/PC→0
Parameters on Supply voltage sequence (All Condition)
Transition
Symbol
Typ.
OFF→Stand-by
ton
Stand-by→Active
tsa
Active→Stand-by
tas
Active or Stand-by→OFF
tof
Parameters on Supply voltage sequence (All Condition)
Characteristics
Symbol
Min.
Max.
AVDD ON
VHav
1.53
AVDD OFF
VLav
0.17
1.53
DVDD ON
VHdv
DVDD OFF
VLdv
0.17
Max.
3
5
5
10
Unit
ms
μs
μs
ms
Unit
V
V
V
V
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HSCDTD008A
CONTROL TIMING SPECIFICATIONS (Continued)
Note
No limitation in the turn on timing of the AVDD and the DVDD_IO voltage.
Case 1:
When the DVDD_IO voltage turns on initially,
After the DVDD_IO voltage has risen (reached VHdv)
the AVDD's voltage rising slope must rise (reach 0.9*AVDD) within 1.5 [msec].
0.1*AVDD0.9*AVDD
AVDD
0.9*AVDD
0.1*AVDD
GND
DVDD
This AVDD's voltage rising time needs to be ≦1.5[msec].
VHdv
VLdv
GND
When the DVDD_IO voltage turns on initially
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HSCDTD008A
CONTROL TIMINGS (Continued)
Force state
- Force state is used for synchronous measurement
(selected from register CTRL3, bit FRC), and measurement starts after forced
register command to register via bus.
- Functional mode changes from Stand-by mode to Active mode by setting register
(Control1: bit PC) to "1".
- Force state is set by control register (CNTL1: bit FS) "1".
- Acquired data stored to output register (OUTX, OUTY, OUTZ), and status register
(STAT: bit DRDY) is set to "1" and output signal (DRDY PIN) are set to active.
-Output on external DRAY PIN is set by control register (CNTL2)
-During reading data, out put register is not updating. After reading is complete, reading data is updated.
- Change of state from Normal to Force is valid after measurement if control register is
set during the Active measuring in Normal state.
MODE
STAND-BY
MODE
STATE
ACTIVE MODE
FORCE STATE
REGISTER COMMAND
CNTL1:PC → 1
CNTL1:FS = 1
CNTL3:FORCE → 1
ACTIVE MEASUREMENT TIME
INACTIVITY TIME
< 5ms
FORCE STATE
MEASUREMENT
STATUS
STAT:DRDY
OUTPUT SIGNAL
DRDY
DATA OUTPUT REGISTER READ
Measurement control timing (Force state)
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HSCDTD008A
CONTROL TIMINGS (Continued)
Normal state
- Normal state is continuous measurement state, and when Normal state is set by
setting “0” to control register (CNTL1: bit FS), channels measurement is started.
- Measurement time and interval are managed with internal clock.
- Functional mode changes from Stand-by mode to Active mode by setting register
(CNTL1: bit PC) to "1".
- Output data rate (ODR) is selectable with 0.5Hz or 100Hz by register (CNTL1: bit ODR).
- Acquired data are stored to register (OUTX, OUTY, OUTZ), status register
(STAT: bit DRDY) is set to "1" and output PIN signal are control with (CNTL2:bit DEN).
MODE
STAND-BY
MODE
STATE
ACTIVE MODE
NORMAL STATE
REGISTER COMMAND
CNTL1:PC → 1
CNTL1:FS → 0
INTERNAL TRIGGER
ACTIVE MEASUREMENT TIME
< 5ms
INACTIVITY TIME
NORMAL STATE
MEASUREMENT
STATE
READ MARGIN
STAT:DRDY
OUTPUT SIGNAL
DRDY
SCL
DATA READ
Note: READ MARGIN is need more than "0msec" in normal state.
.
DATA READ Time should be set less than 1msec including clock starch.
Minimum case is happen in ODR=11(100Hz) on measurement function.
Measurement control timing (Normal state)
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CONTROL INTERFACE CONNECTIONS
Symbol
VSS
Pin Number
Analog and Digital Ground
1
Detail
AVDD
2
Terminal for analog supply voltage
DVDD
3
Terminal for digital supply voltage
DRDY
4
TEST0
5
TEST1
6
SCL
7
Output terminal for data ready signal
The active level is selectable with LOW or HIGH.
The output is selectable with enable or disable for external terminal.
The internal circuit is pull down after initializing.
It is used for only test on product line.
Connect this terminal to the GND or NC at using sensor.
It is used for only test on product line.
Do not connect it to any more at using sensor.
Clock bus line under using I2C interface
SDA
8
Data bus line under using I2C interface
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INTERFACE SPECIFICATIONS
I2C SLAVE INTERFACE
- Conformable to Philips I2C-Bus Specification Version 2.1 and
NXP UM10204 I2C-bus specification and user manual Rev.03-19 June 2007
- Slave address is fixed '0001100'. (7bit device adressing) *1
- Support Stabderd mode, Fast mode , Fast mode Plus and Hi speed mode.
- It is seemless change from Fast mode to Hi speed mode to use the master code (00001XXX)
- Support Multiple Read and Write mode.
- Clock stretch function is not available.
Note:*1 LSB 2bit adress can be chage on only the products process.
I2C bus interface timing diagram 1
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INTERFACE SPECIFICATIONS
I2C SLAVE INTERFACE
I2C bus interface timing diagram 2
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INTERFACE SPECIFICATIONS (Continued)
- Data transfers follow the combined format with 7-bit addressing of I2C interface.
- Data is transferred with the most significant bit (MSB) first and little endian.
- Auto-increment of previous accessed register address is available when the internal register
address is written during the first data byte. Data then can be transferred continuously.
Bus protocol definitions
Read Formats
Write Format
HS mode data trasfer
HS mode is enable after writeing Mcode.
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REGISTER DEFINITIONS
- Register addresses and definitions are as follows.
- Sensor output values are signed integer (2's compliment) presentation and little Endian order.
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REGISTER DESCRIPTIONS
Self Test Response Register (STB)
Address : 0Ch, Self Test Response (Read Only)
Bit
Name
Description
7:0
STB 7:0
Self test starts by STC bit (CNTL3 register).
AAh is stored when CNTL3: bit STC sets to 1.
55h is stored after STB register is read.
Information Registers
Address : 0Dh, "More Info version" (Read Only)
Bit
Name
Description
7:0
INFO1 7:0
Information Value1 (11h)
Address : 0Eh, "More Info ALPS" (Read Only)
Bit
Name
Description
7:0
INFO2 7:0
Information Value2 (15h)
Address : 0Fh, "Who Am I" Value (Read Only)
Bit
Name
Description
7:0
WIA 7:0
Identify byte (49h)
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REGISTER DESCRIPTIONS (Continued)
Output Data Register (OUTX, OUTY, OUTZ)
- 14bit integer and 1FFFh (+8191d) ~ E000h (-8192d)
- 15bit integer and 3FFFh (+16383d) ~ C000h (-16384d)
Address : 10h, X-axis Output Data LSB (Read Only)
Bit
Name
Description
7:0
OUTX 7:0
X-axis Output Data, Signed Integer.
Address : 11h, X-axis Output Data MSB (Read Only)
Bit
Name
Description
7:0
OUTX 15:8
X-axis Output Data, Signed Integer.
Address : 12h, Y-axis Output Data LSB (Read Only)
Bit
Name
Description
7:0
OUTY 7:0
Y-axis Output Data, Signed Integer.
Address : 13h, Y-axis Output Data MSB (Read Only)
Bit
Name
Description
7:0
OUTY 15:8
Y-axis Output Data, Signed Integer.
Address : 14h, Z-axis Output Data LSB (Read Only)
Bit
Name
Description
7:0
OUTZ 7:0
Z-axis Output Data, Signed Integer.
Address : 15h, Z-axis Output Data MSB (Read Only)
Bit
Name
Description
7:0
OUTZ 15:8
Z-axis Output Data, Signed Integer.
Note:
MSB, bit7 ( and MSB, bit6 used under 14bit output ) is copied
signed value "0": Positive or "1":Nagative.
Status Register (STAT)
Address : 18h, Status (Read Only)
Bit
Name
Description
7
X
Not Used
6
DRDY
Data Ready Detection
0 = Not Detected, 1 = Detected
5
DOR
Data Overrun Detection
0 = Not Detected, 1 = Detected
Note: if Read Output Data Register.
4:3
X
Not Used
2
FFU
FIFO full alarm
0 = not Full(Default), 1 = Full
1
TRDY
Must be use Default setting.
0 = (Default) ※
0
ORDY
Must be use Default setting.
0 = (Default) ※
※. The change of this bit is prohibited.
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REGISTER DESCRIPTIONS (Continued)
FIFO Pointer Status Register (FFPT)
Address : 19h, FIFO Pointer Status (Read Only)
Description
Bit
Name
7:4
X
Not Used (Read Only)
3:0
FP
Number of data in FIFO : 0 - 8
Control 1 Register (CTRL1)
Address : 1Bh, Control 1 (Write/Read)
Bit
Name
Description
7
PC
Power Mode Control
0 = Stand-by Mode (Default), 1 = Active Mode
6:5
X
Not Used (Read Only)
4:3
ODR 1:0 Output Data Rate Control in Normal State
00 = 0.5 Hz
01 = 10Hz (Default)
10 = 20Hz
11 = 100Hz
2
X
Not Used (Read Only)
1
FS
State Control in Active Mode
0 = Normal State
1 = Force State (Default)
0
X
Not Used (Read Only)
Control 2 Register (CTRL2)
- When a CTRL2 register value was changed during the measurement,
The contents of the change are reflected after measurement.
Address : 1Ch, Control 2 (Write/Read)
Bit
Name
Description
7
AVG
Must be use Default setting.
0 = (Default) ※
6
FCO
Data storage method at FIFO.
0 = Direct (Default) , 1 = Comparison
Note: Enabled if FIFO
5
AOR
Choice of method of data Comparison at FIFO.
0 = OR(Default) , 1 = AND
Note: Enabled if FIFO
4
FF
FIFO Enable
0 = Disable (Default) , 1 = Enable
3
DEN
2
DRP
1
DTS
Data Ready Function Control Enable
0 = Disabled (Default), 1 = Enabled
DRDY signal active level control
0 = ACTIVE LOW, 1 = ACTIVE HIGH (Default)
Must be use Default setting.
0 = (Default) ※
0
DOS
Must be use Default setting.
0 = (Default) ※
※. The change of this bit is prohibited.
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HSCDTD008A
REGISTER DESCRIPTIONS (Continued)
Control 3 Register (CTRL3)
- Bit control at the same time is prohibited.
- Priority of this register is MSB.
Address : 1Dh, Control 3 (Write/Read)
Bit
Name
Description
7
SRST
Soft Reset Control Enable
0 = No Action (Default), 1 = Soft Reset
Note: return to zero after soft reset.
6
FRC
Start to Measure in Force State
0 = No Action (Default), 1 = Measurement Start
Note: return to zero after measurement.
5
X
Not Used (Read Only)
4
STC
Self Test Control Enable
0 = No Action (Default)
1 = Set parameters to Self Test Response (STB) register.
Note: return to zero immediately.
3:2
X
Not Used (Read Only)
1
TCS
Start to Measure Temperature in Active Mode
0 = No Action (Default), 1 = Measurement Start
0
OCL
Start to Calibrate Offset in Active Mode
0 = No Action (Default), 1 = Action
Control 4 Register (CTRL4)
- When a CTRL4 register value was changed during the measurement,
The contents of the change are reflected after measurement.
Address : 1Eh, Control 4 (Write/Read)
Description
Bit
Name
7:6
MMD
Must be use Default setting.
10 = (Default) ※
5
X
Not Used (Read Only)
4
RS
Set Dynamic range of output data.
0 = 14 bit signed value (-8192 to +8191) (Default)
1 = 15 bit signed value (-16384 to +16383)
3
AS
Must be use Default setting.
0 = (Default) ※
2:0
X
Not Used (Read Only)
※. The change of this bit is prohibited.
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REGISTER DESCRIPTIONS (Continued)
Offset Drift Value Register (OFFX, OFFY, OFFZ)
- Data is 14bit integer and 1FFFh (8191d) ~ E000h (-8192d)
Address : 20h, 14 bits X-axis Offset Drift Value LSB (Write/Read)
Bit
Name
Description
7:0
OFFX 7:0
X-axis Offset Drift Value, Signed Integer.
Address : 21h, 14 bits X-axis Offset Drift Value MSB (Write/Read)
Bit
Name
Description
7
X
Not Used (Read Only)
6:0
OFFX 14:8
X-axis Offset Drift Value, Signed Integer.
Address : 22h, 14 bits Y-axis Offset Drift Value LSB (Write/Read)
Bit
Name
Description
7:0
OFFY 7:0
Y-axis Offset Drift Value, Signed Integer.
Address : 23h, 14 bits Y-axis Offset Drift Value MSB (Write/Read)
Bit
Name
Description
7
X
Not Used (Read Only)
6:0
OFFY 14:8
Y-axis Offset Drift Value, Signed Integer.
Address : 24h, 14 bits Z-axis Offset Drift Value LSB (Write/Read)
Bit
Name
Description
7:0
OFFZ 7:0
Z-axis Offset Drift Value, Signed Integer.
Address : 25h, 14 bits Z-axis Offset Drift Value MSB (Write/Read)
Bit
Name
Description
7
X
Not Used (Read Only)
6:0
OFFZ 14:8
Z-axis Offset Drift Value, Signed Integer.
Address : 26h-27h, ITHR : Interrupt Threshold (Write/Read)
Bit
Name
Description
15:14
X
Not Used (Read Only)
13:0
ITHR
Comparison value
Note: Enabled if CTRL2.FCO
Temperature Data Register (TEMP)
- Temperature measurement is performed by setting register command (CNTL3 : bit TCS)
when in the active mode
- Result is stored to temperature register (TEMP)
-Sensor output value are compensated with the temperature value stored TEMP register.
Address : 31h, Temperature Data (Read Only)
Bit
Name
Description
7:0
TEMP7:0
Temperature Data, Signed Integer.
LSB = 1℃
1000 0000 = -128℃
0000 0000 = 0℃
0111 1111 = 127℃
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HSCDTD008A
PIN CONFIGURATION
1
Symbol
VSS
Type
Power
Ground pin.
Connect Pin
GND
2
AVDD
Power
Analog power supply pin.
AVDD
3
DVDD
Power
Digital power supply pin.
DVDD
4
DRDY
Output, CMOS
Data Ready output pin.
DRDY / NC
5
TEST0
Intput, CMOS
Test pin
NC / GND
6
TEST1
Intput, CMOS
Test pin
NC *1
7
SCL
Input, CMOS
Control data clock
SCL
8
SDA
Input / Output
CMOS / Open drain
Control data input/output pin.
SDA
Pin
Notes
Description
- Test pin uses only the Manufacturing test.
Top view
3
5
1
7
Index Mark
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HSCDTD008A
PACKAGE DIMENSIONS
Ref
D
E
D1
D2
E1
E2
A
A2
Dimension in millimeters
Min.
Nom.
1.5
1.6
1.5
1.6
0.37
0.40
0.17
0.20
0.37
0.40
0.17
0.20
0.60
0.65
0.14
0.19
Top view
Max.
1.7
1.7
0.43
0.23
0.43
0.23
0.70
0.24
Side view
Ref
T1
T2
T3
T4
P1
P2
P3
G1
G2
G3
G4
Dimension in millimeters
Min.
Nom.
--0.35
--0.20
--1.19
--1.19
0.57
0.60
0.57
0.60
0.07
0.10
0.2
--0
----0.067
--0.067
Max.
--------0.63
0.63
0.13
--0.1
-----
Bottom view
Z
Z part enlarged picture
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HSCDTD008A
PACKAGE DIRECTIONS
- X, Y, Z presents measurement directions of 3 axis sensor.
- Output value of each axis is positive when turned toward magnetic north.
TOP VIEW
Y+
X-
X+
Index Mark
YSIDE VIEW
Z+
Z-
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HSCDTD008A
CONNECTION EXAMPLE
DVDD
POWER 1.65-3.6V
AVDD
POWER 1.7-3.6V
Host CPU
C1
Power for
i/f
Interrupt
5
TEST0
AVDD
TEST1
VSS
Rp
SDA
C2
SCL
Rp
DVDD
DRDY
3
1
7
I2C i/f
Connection ie at I2C Interface
Notes
- Capaciter recommendation :
C1, C2 = 0.1µF
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RECOMMENDED LAND PATTERN
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Asking that exports this product
1. For the export of products which are controlled items subject to foreign and domestic
export laws and regulations, you must obtain approval and/or follow the formalities of
such laws and regulations.
2. Products must not be used for military and/or antisocial purposes such as terrorism,
and shall not be supplied to any party intending to use the products for such
3. Unless provided otherwise, the products have been designed and manufactured for
application to equipment and devices which are sold to end-users in the market, such
as AV (audio visual) equipment, home electric equipment, office and commercial
electronic equipment, information and communication equipment or amusement
equipment. The products are not intended for use in, and must not be used for, any
application of nuclear equipment, driving control equipment for aerospace or any other
unauthorized use.
With the exception of the above mentioned banned applications, for applications
involving high levels of safety and liability such as medical equipment, burglar alarm
equipment, disaster prevention equipment and undersea equipment, please contact
an Alps sales representative and/or evaluate the total system on the applicability.
Also, implement a fail-safe design, protection circuit, redundant circuit, malfunction
protection and/or fire protection into the complete system for safety and reliability of
4. Before using products which were not specifically designed for use in automotive
applications, please contact an Alps sales representative.
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History of revision
Revision
1.0
1.1
1.2
Date
16.Mar.2012
24.Apr.2012
15.Jun.2012
1.3
1.4
1.5
1.6
1.7
18.Jun.2012
21.Jun.2012
10.Jul,2012
9.Aug,2012
25.Oct.2012
1.8
1.9
14.Dec.2012
7.Mar.2013
2.0
2.1
7.Jun,2013
5.Jul.2013
2.4
9.Apr,2015
2.5
31.Aug,2016
Page
Note
First edition
P.2,3,7,26 DVDD Range 2.0-3.6 to 1.8-3.6 [V]
P.3,10,18 Show TBD value
20,21,22
P.25
Addition of dimension "G1".
P.25, 28 Change PAD Size/Layout
P.10
tof, Vhdv, Vhav Min. value change
P.10
Vhav Min. value change
P.20
Add 15 bit output value
P.25
Deleate A1 spec.
P.20
Add Definition on bit7 (bit6) of MSB
P.3
Change Measurement Range : ±2.4 to ±7.2 [mT]
P.10
Supply voltage sequence AVDD ON : 1.75 to 1.53 [V]
P.13
Add read Margin
P.2/3/7
AVDD min. 1.8 V -> 1.7 V
P23
Correction of errors
P.2,5,10,11Add FIFO
P.20,22,23
P.25
P.29
AVDD min. 1.8 V -> 1.7 V
All
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