AS6C8016A-55BIN

AUGUST 2010 AS6C8016A 512K X 16 BIT LOW POWER CMOS SRAM FEATURES GENERAL DESCRIPTION • • • • • • The AS6C8016A is fabricated by Alliance ' s advanced full CMOS process technology. The families support industrial temperature range and Chip Scale Package for user flexibility of system design. The families also support low data retention voltage for battery backup operation with low data retention current. Process Technology : 0.15μm Full CMOS Organization : 512K x 16 bit Power Supply Voltage : 2.7V ~ 3.6V Low Data Retention Voltage : 1.5V(Min.) Three state output and TTL Compatible Package Type : 48-FPBGA, 44-TSOP2 PRODUCT FAMILY Power Dissipation Product Family Operating Temperature Vcc Range Speed Standby (ISB1, Typ.) Operating (ICC1.Max.) AS6C8016A KGD Industrial (-40 ~ 85oC) AS6C8016A-55BIN 2.7 ~ 3.6 V 2 μA1) 55 ns 4 mA 48-FPBGA 44-TSOP2 AS6C8016A-55ZIN 1. Typical values are measured at Vcc=3.3V, TA=25oC and not 100% tested. FUNCTIONAL BLOCK DIAGRAM Pre-charge Circuit A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 Row Select VCC DQ0 ~ DQ7 Data Cont Data Cont DQ8 ~ DQ15 VSS Memory Array 2048 x 4096 I/O Circuit Column Select A11 A12 A13 A14 A15 A16 A17 A18 WE OE UB LB CS PKG Type Control Logic 1 AUGUST 2010 AS6C8016A 512K X 16 BIT LOW POWER CMOS SRAM Low Power, 512Kx16 SRAM EM681FV16B Family PIN CONFIGURATIONS FPBGA-48 : Top view(ball down) A 44 - TSOP2 : Top view 1 2 3 4 5 6 LB OE A0 A1 A2 NC B DQ8 UB A3 A4 CS DQ0 C DQ9 DQ10 A5 A6 DQ1 DQ2 D VSS DQ11 A17 A7 DQ3 VCC E VCC DQ12 NC A16 DQ4 VSS F DQ14 DQ13 A14 A15 DQ5 DQ6 G DQ15 NC A12 A13 WE DQ7 H A18 A8 A9 A10 A11 NC A4 A3 1 2 44 43 A2 A1 A0 3 4 5 6 7 8 9 10 11 12 42 41 40 39 38 37 36 35 34 33 UB LB DQ15 DQ14 DQ13 DQ12 VSS VCC WE A18 13 14 15 16 17 18 32 31 30 29 28 27 DQ11 DQ10 DQ9 DQ8 A8 A9 A17 A16 A15 A14 19 20 21 22 26 25 24 23 A10 A11 A12 A13 CS DQ0 DQ1 DQ2 DQ3 VCC VSS DQ4 DQ5 DQ6 DQ7 44 - TSOP2 A5 A6 A7 OE PIN DESCRIPTION Name Function Name Function CS Chip Select input VCC Power Supply OE Output Enable input VSS Ground WE Write Enable input UB Upper Byte (DQ8~DQ15) Address inputs LB Lower Byte (DQ0~DQ7) Data inputs/outputs NC No Connection A0~A18 DQ0~DQ15 2 AUGUST 2010 AS6C8016A 512K X 16 BIT LOW POWER CMOS SRAM Low Power, 512Kx16 SRAM EM681FV16B Family ABSOLUTE MAXIMUM RATINGS1) Parameter Symbol Ratings VIN, VOUT -0.2 to 4.0 V Voltage on Vcc supply relative to Vss VCC -0.2 to 4.0 V Power Dissipation PD 1.0 W Operating Temperature TA -40 to 85 Voltage on Any Pin Relative to Vss Unit o C 1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability. FUNCTIONAL DESCRIPTION CS OE WE LB UB DQ0~7 DQ8~15 Mode Power H X X X X High-Z High-Z Deselected Stand by X X X H H High-Z High-Z Deselected Stand by L H H L X High-Z High-Z Output Disabled Active L H H X L High-Z High-Z Output Disabled Active L L H L H Data Out High-Z Lower Byte Read Active L L H H L High-Z Data Out Upper Byte Read Active L L H L L Data Out Data Out Word Read Active L X L L H Data In High-Z Lower Byte Write Active L X L H L High-Z Data In Upper Byte Write Active L X L L L Data In Data In Word Write Active NOTE : X means don’t care. (Must be low or high state) 3 AUGUST 2010 AS6C8016A 512K X 16 BIT LOW POWER CMOS SRAM Low Power, 512Kx16 SRAM EM681FV16B Family RECOMMENDED DC OPERATING CONDITIONS 1) Parameter Symbol Min Typ Max Unit Supply voltage VCC 2.7 3.3 3.6 V Ground VSS 0 0 0 V Input high voltage VIH 2.2 - VCC + 0.22) V Input low voltage VIL -0.23) - 0.6 V 1. 2. 3. 4. TA= -40 to 85oC, otherwise specified Overshoot: VCC +2.0 V in case of pulse width < 20ns Undershoot: -2.0 V in case of pulse width < 20ns Overshoot and undershoot are sampled, not 100% tested. CAPACITANCE1) (f =1MHz, TA=25oC) Item Symbol Test Condition Min Max Unit Input capacitance CIN VIN=0V - 8 pF Input/Ouput capacitance CIO VIO=0V - 10 pF 1. Capacitance is sampled, not 100% tested DC AND OPERATING CHARACTERISTICS Parameter Symbol Test Conditions Min Typ Max Unit Input leakage current ILI VIN=VSS to VCC -1 - 1 μA Output leakage current ILO CS=VIH or OE=VIH or WE=VIL or LB=UB=VIH VIO=VSS to VCC -1 - 1 μA Operating power supply ICC IIO=0mA, CS=VIL, WE=VIH, VIN=VIH or VIL - - 2 mA ICC1 Cycle time=1μs, 100% duty, IIO=0mA, CS