ASM2I20807AG-20-DT

June 2005 rev 0.2 2.5V CMOS 1-TO-10 CLOCK DRIVER Features • High frequency > 150MHz • Guaranteed low skew < 150pS (max.) between any two outputs • Very low duty cycle distortion < 300pS • High speed: propagation delay < 3nS • Very low CMOS power levels • TTL compatible inputs and outputs • 1:10 fanout • Maximum output rise and fall time < 1.25nS (max.) • Low input capacitance: 3pF (typ) • 2.5V Supply Voltage • Available in SSOP and QSOP Packages ASM2P20807A Product Description The ASM2P20807A is a 2.5V compatible, high speed, low noise, 1:10 fanout, non-inverting clock buffer. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Providing output to output skew as low as 150pS, the ASM20807A is an ideal clock distribution device for synchronous systems. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. Block Diagram O1 O2 O3 O4 O5 IN O6 O7 O8 O9 O10 Alliance Semiconductor 2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. June 2005 rev 0.2 Pin Configuration IN GND O1 VCC O2 GND O3 VCC O4 GND 1 2 3 4 5 6 7 8 9 10 SSOP/ QSOP PACKAGE TOP VIEW 20 VCC O10 O9 GND O8 VCC O7 GND 06 O5 ASM2P20807A A S M 2 P 2 0 8 0 7 A 19 18 17 16 15 14 13 12 11 Pin Description Pin # 1 3,5,7,9,11,12,14,16,18,19 2,6,10,13,17 4,8,15,20 Pin Names IN O1-O10 GND VCC Description Clock Input Clock Outputs Ground Power supply Capacitance (TA = +25°C, f = 1.0MHz) Symbol CIN Parameter1 Input Capacitance Conditions VIN = 0V Typ 3 Max 4 Unit pF NOTE:1. This parameter is measured at characterization but not tested. Absolute Maximum Ratings1 Symbol VTERM 2 Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max -0.5 to +4.6 -0.5 to +5.5 -0.5 to VCC+0.5 -65 to +150 -60 to +60 Unit V V V °C mA VTERM3 4 VTERM TSTG IOUT NOTES: 1. These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. 2. VCC terminals. 3. Input terminals. 4. Outputs and I/O terminals. 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 2 of 11 June 2005 rev 0.2 Power Supply Characteristics Symbol ICCL ICCH ∆ICC ASM2P20807A Parameter Quiescent Power Supply Current TTL Inputs HIGH Power Supply Current per Input HIGH Dynamic Power Supply Current per Output3 Total Power Current4 Supply Test Conditions1 VCC= Max VIN = GND or VCC VCC= Max VIN = VCC -0.6V VCC= 2.7V and 15 pF load 150 MHz VCC= Max. CL= 12pF All outputs toggling fi = 150MHz VIN= VCC VIN= GND VIN= VCC –0.6V VIN= GND Min - Typ2 0.1 Max 20 Unit µA - 45 300 µA ICCD - 40 - µA /MHz IC - 65 90 mA - 75 100 NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 2.5V, +25°C ambient. 3. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 4. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input (VIN = VCC -0.6V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fi = Input Frequency 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 3 of 11 June 2005 rev 0.2 DC Electrical Characteristics Over Operating Range Following Conditions Apply Unless Otherwise Specified Industrial: TA = -40°C to +85°C, VCC = 2.5V ± 0.2V ASM2P20807A Symbol VIH VIL IIH IIL VIK IODH Parameter Input HIGH Level Input LOW Level Input HIGH (Input pins) Input LOW (Input pins) Current Current Test Conditions1 Min 1.7 - Typ2 -0.7 -45 Max 0.7 ±1 ±1 -1 -100 Unit V V mA mA V mA VCC= Max, VI = VCC VCC= Max, VI = GND VCC= Min, IIN = -18mA VCC= 2.5V, VIN = VIH or VIL VO = 1.25V3 VCC= 2.5V, VIN = VIH or VIL VO = 1.25V3 VCC= Min VIN = VIH or VIL IOH = -1mA IOH = -8mA -25 Clamp Diode Voltage Output HIGH Current IODL Output LOW Current Output HIGH Voltage 20 VCC–0.2 1.85 -25 55 -60 120 0.4 0.6 -135 mA VOH VOL V Output LOW Voltage VCC= Min VIN = VIH or VIL VCC= Max., VO = GND3 IOL = 1mA IOL = 8mA V mA IOS Short Circuit Current4 NOTES: 1. For conditions shown as Max or Min, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 2.5V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = Vcc - 0.6V at rated current. 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 4 of 11 June 2005 rev 0.2 Switching Characteristics Over Operating Range1,2 Following Conditions Apply Unless Otherwise Specified Industrial: TA = -40°C to +85°C, VCC = 2.5V ± 0.2V ASM2P20807A Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(PP) Parameter Propagation Delay Conditions3 CL= 22pF 100 MHz Min - Typ 3 1 1 100 250 400 Max 3.5 1.25 1.25 150 300 600 Unit nS nS nS pS pS pS Output Rise Time Output Fall Time Same Device Output Pin-to-Pin Skew4 Pulse Skew 5 6 Part-to-Part Skew - Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(PP) Parameter Propagation Delay Conditions3,7 CL= 12pF 150 MHz Min - Typ 2.4 1 1 100 250 400 Max 2.7 1.2 1.2 150 300 600 Unit nS nS nS pS pS pS Output Rise Time Output Fall Time Same Device Output Pin-to-Pin Skew4 Pulse Skew 5 6 Part-to-Part Skew - NOTES: 1. tPLH and tPHL are production tested. All other parameters guaranteed but not production tested. 2. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew. 3. See test circuits and waveforms. 4. Skew measured between all outputs under identical transitions and load conditions. 5. Skew measured is difference between propagation delay times tPHL and tPLH of same output under identical load conditions. 6. Part to part skew for all outputs given identical transitions and load conditions at identical VCC levels and temperature. 7. Airflow of 1m/s is recommended for frequencies above 133MHz. 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 5 of 11 June 2005 rev 0.2 Test Circuits and Waveforms VCC O ASM2P20807A VIN Pulse Generator D.U.T VOUT CL CL = Load Capacitance: Includes Jig and Capacitance probe 2.5V 1.25V INPUT tPLH tPLH OV VOH 1.7 V OUTPUT tR tF 0.7 V 1.25 V VOL Propagation Delay 2.5V 1.25V INPUT tPLH tPLH VOH OV 1.25 V OUTPUT tSK(p) =[ tPHL – tPLH ] VOL Pulse Skew - tSK(P) 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 6 of 11 June 2005 rev 0.2 2.5V 1.25V INPUT tPLH tPLHL 1 OV ASM2P20807A VOH 1.25 V OUTPUT 1 tSK(O) tSK(O) VOL VOH 1.25 V OUTPUT 2 tPLH2 tPHL2 VOL tSK(O) =[ tPLH2 – tPLH 1 ] or [tPHL2 - tPHL1 ] Output Skew - tSK(O) 2.5V 1.25V INPUT tPLH 1 tPLHL OV 1 VOH 1.25 V DEVICE 1 OUTPUT tSK(t) tSK(t) VOL VOH 1.25 V DEVICE 2 OUTPUT tPLH2 tPHL2 VOL DEVICE 2 OUTPUT tSK(t) =[ tPLH2 – tPLH 1 ] or [tPHL2 - tPHL1 ] NOTE: Device 1 and device 2 are same package type and speed grade. Part-to-Part Skew - tSK(PP) Test Conditions Symbol CL VCC = 2.5V ±0.2V 221 122 pF Unit RT t R / tF Z OUT of pulse generator 1.25 1.2 1 2 Ω nS DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. tR / tF = Rise/Fall time of the input stimulus from the Pulse Generator. NOTES: 1. Test conditions at 100MHz. 2. Test conditions at 150MHz. 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 7 of 11 June 2005 rev 0.2 Package Information 20-lead SSOP ( 150 mil ) Package ASM2P20807A Dimensions Symbol A A1 A2 D c E E1 L L1 b R1 a e Inches Min Max 0.053 0.004 …. 0.337 0.007 0.228 0.150 0.016 0.203 0.003 0° 0.069 0.010 0.059 0.344 0.012 0.244 0.157 0.035 0.325 …. 8° Millimeters Min Max 1.346 0.102 …. 8.560 0.178 5.791 3.810 0.406 0.008 0.08 0° 1.753 0.254 1.499 8.738 0.274 6.198 3.988 0.890 0.014 ….. 8° 0.010 BASIC 0.254 BASIC 0.025 BASIC 0.635 BASIC 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 8 of 11 June 2005 rev 0.2 20-lead QSOP Package ASM2P20807A Dimensions Symbol A A1 b c D E e H h L S a Inches Min Max 0.060 0.004 0.009 0.007 0.337 0.150 0.230 0.010 0.016 0.056 0° 0.068 0.008 0.012 0.010 0.344 0.157 0.244 0.016 0.035 0.060 8° Millimeters Min Max 1.52 0.10 0.23 0.18 8.56 3.81 5.84 0.25 0.41 1.42 0° 1.73 0.20 0.30 0.25 8.74 3.99 6.20 0.41 0.89 1.52 8° 0.025 BSC 0.64 BSC 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 9 of 11 June 2005 rev 0.2 Ordering Information Part Number ASM2P20807A-20-AR ASM2P20807A-20-AT ASM2P20807A-20-DR ASM2P20807A-20-DT ASM2I20807AG-20-AR ASM2I20807AG-20-AT ASM2I20807AG-20-DR ASM2I20807AG-20-DT ASM2P20807A Marking 2P20807A 2P20807A 2P20807A 2P20807A 2I20807AG 2I20807AG 2I20807AG 2I20807AG Package Type 20-Pin SSOP, TAPE & REEL 20-Pin SSOP, TUBE 20-Pin QSOP, TAPE & REEL 20-Pin QSOP, TUBE 20-Pin SSOP, TAPE & REEL, Green 20-Pin SSOP, TUBE, Green 20-Pin QSOP, TAPE & REEL, Green 20-Pin QSOP, TUBE, Green Temperature Commercial Commercial Commercial Commercial Industrial Industrial Industrial Industrial Device Ordering Information ASM2P20807AG-20-AR R = Tape & reel, T = Tube or Tray O = SOT S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Reserved 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70 ALLIANCE SEMICONDUCTOR MIXED SIGNAL PRODUCT Licensed under US patent Nos 5,488,627 and 5,631,920. 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 10 of 11 June 2005 rev 0.2 ASM2P20807A Alliance Semiconductor Corporation 2595, Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Copyright © Alliance Semiconductor All Rights Reserved Advance Information Part Number: ASM2P20807A Document Version: v0.2 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003 © Copyright 2003 Alliance Semiconductor Corporation. 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