ASM3P2108AF-08-TT

July 2005 rev 0.3 Peak EMI Reducing Solution Features FCC approved method of EMI attenuation. Generates a 1X low EMI spread spectrum clock of the input frequency. Input frequency range: 25MHz to 45MHz. Internal loop filter minimizes external components and board space. Frequency deviation: - 1.3%( Typ) @32MHz. Low cycle-to-cycle jitter. 5.0V ± 5% operating voltage range. TTL or CMOS compatible outputs. Available in 8-pin SOIC and TSSOP Packages. ASM3P2108A savings by reducing the number of circuit board layers ferrite beads, shielding and other passive components that are traditionally required to pass EMI regulations. The ASM3P2108A uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method. The ASM3P2108A modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation’. Product Description The ASM3P2108A is a versatile spread spectrum frequency modulator designed specifically for input clock frequencies from 25MHz to 45MHz. The ASM3P2108A can generate an EMI reduced clock from crystal, ceramic resonator, or system clock. The ASM3P2108A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream clock and data dependent signals. The ASM3P2108A allows significant system cost Applications The ASM3P2108A is targeted towards EMI management for high speed digital applications such as PC peripheral devices, consumer electronics and embedded controller systems. Block Diagram VDD Modulation XIN Crystal Oscillator XOUT Frequency Divider Feedback Divider Phase Detector Loop Filter PLL VCO Output Divider CLOCKOUT GND Alliance Semiconductor 2575 Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. July 2005 rev 0.3 Pin Configuration ASM3P2108A XIN / CLKIN XOUT GND NC 1 2 3 4 8 NC NC VDD CLOCKOUT ASM3P2108A 7 6 5 Pin Description Pin# 1 2 3 4 5 6 7 8 Pin Name XIN/CLKIN XOUT GND NC CLOCKOUT VDD NC NC Type I O P O P - Description Crystal connection or external reference frequency input. This pin has dual functions. It can be connected to either an external crystal or an external reference clock. Crystal connection. If using an external reference, this pin must be left unconnected. Ground to entire chip. No connect. Spread spectrum low EMI output. Power supply for the entire chip (5V). No connect. No connect. Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 2 of 7 July 2005 rev 0.3 Absolute Maximum Ratings Symbol VDD, VIN TSTG TA Ts TJ TDV Storage temperature Operating temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B) ASM3P2108A Parameter Voltage on any pin with respect to Ground Rating -0.5 to +7.0 -65 to +125 0 to 70 260 150 2 Unit V °C °C °C °C KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. DC Electrical Characteristics Symbol VIL VIH IIL IIH IXOL IXOH VOL VOH ICC IDD VDD tON ZOUT Input low voltage Input high voltage Input low current Input high current XOUT output low current (@ 0.4, VDD = 5V) XOUT output high current (@2.5V, VDD = 5V) Output low voltage (VDD = 5V, IOL = 20mA) Output high voltage (VDD = 5V, IOH = 20mA) Dynamic supply current normal mode (5V, 32MHz and 15pF loading) Static supply current standby mode Operating voltage Power up time (first locked clock cycle after power up) Clock out impedance Parameter Min GND – 0.3 2.0 2.5 4.75 - Typ 44 66 3 3 40 40 5.0 0.18 50 Max 0.8 VDD + 0.3 0.4 5.25 - Unit V V µA µA mA mA V V mA µA V mS Ω AC Electrical Characteristics Symbol fIN MODOUT fd tLH* tHL* tJC tD Input frequency Output frequency Input Frequency =25MHz Frequency Deviation Input Frequency =45MHz Output rise time (measured at 0.8V to 2.0V) Output fall time (measured at 2.0V to 0.8V) Jitter (cycle to cycle) Output duty cycle Parameter Min 25 25 45 Typ -1.98 -0.60 440 300 50 Max 45 45 360 55 Unit MHz MHz % pS pS pS % * VDD = +5V, Input Frequency = 32MHz, tLH and tHL are measured into a capacitive load of 15pF Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 3 of 7 July 2005 rev 0.3 Package Information ASM3P2108A 8-Pin SOIC Package E H D A2 A θ e B A 1 C L D Dimensions Symbol Min A1 A A2 B C D E e H L θ Inches Max 0.010 0.069 0.059 0.020 0.010 0.004 0.053 0.049 0.012 0.007 Millimeters Min Max 0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0° 1.27 8° 0.25 1.75 1.50 0.51 0.25 0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0° 0.050 8° Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 4 of 7 July 2005 rev 0.3 ASM3P2108A 8-Pin TSSOP Package H E D A2 A θ e B A1 L C Dimensions Symbol Min A A1 A2 B c D E e H L θ 0.020 0° …… 0.002 0.033 0.008 0.004 0.114 0.169 0.026 BSC 0.252 BSC 0.028 8° 0.50 0° Inches Max 0.043 0.006 0.037 0.012 0.008 0.122 0.177 Millimeters Min ….. 0.05 0.85 0.19 0.09 2.90 4.30 0.65 BSC 6.40 BSC 0.70 8° Max 1.10 0.15 0.95 0.30 0.20 3.10 4.50 Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 5 of 7 July 2005 rev 0.3 Ordering Codes Part Number ASM3P2108AF-08-SR ASM3P2108AF-08-ST ASM3P2108AF-08-TR ASM3P2108AF-08-TT ASM3P2108AG-08-SR ASM3P2108AG-08-ST ASM3P2108AG-08-TR ASM3P2108AG-08-TT ASM3P2108A-08-SR ASM3P2108A-08-ST ASM3P2108A-08-TR ASM3P2108A-08-TT ASM3P2108A Marking 3P2108AF 3P2108AF 3P2108AF 3P2108AF 3P2108AG 3P2108AG 3P2108AG 3P2108AG 3P2108A 3P2108A 3P2108A 3P2108A Package 8-PIN SOIC, TAPE AND REEL, Pb Free 8-PIN SOIC, TUBE, Pb Free 8-PIN TSSOP, TAPE AND REEL, Pb Free 8-PIN TSSOP, TUBE, Pb Free 8-PIN SOIC, TAPE AND REEL, Green 8-PIN SOIC, TUBE, Green 8-PIN TSSOP, TAPE AND REEL, Green 8-PIN TSSOP, TUBE, Green 8-PIN SOIC, TAPE AND REEL 8-PIN SOIC, TUBE 8-PIN TSSOP, TAPE AND REEL 8-PIN TSSOP, TUBE Temperature Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Device Ordering Information ASM3P2108AG-08-ST R = Tape & reel, T = Tube or Tray O = SOT S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Reserved 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70 ALLIANCE SEMICONDUCTOR MIXED SIGNAL PRODUCT Licensed under US patent #5,488,627, #6,646,463 and #5,631,920. Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 6 of 7 July 2005 rev 0.3 ASM3P2108A Alliance Semiconductor Corporation 2575 Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Copyright © Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: ASM3P2108A Document Version: v0.3 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003 © Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 7 of 7