P1822G-08TR

Production March 2003 ® P1818/19/20/21/22 Low Power Mobile VGA EMI Reduction IC Features • • • • FCC approved method of EMI attenuation Provides up to 15 dB EMI reduction Generates a low EMI spread spectrum clock and a non-spread reference clock of the input frequency Optimized for frequency range from 10 MHz to 160 MHz P1818: 10 to 20 MHz P1819: 20 to 40 MHz P1820: 40 to 80 MHz P1821: 10 to 40 MHz P1822: 80 to 160 MHz Internal loop filter minimizes external components and board space • • • • • • • • • • Selectable spread options: Down Spread and Center Spread Low inherent cycle-to-cycle jitter Eight spread % selections: +/-0.625% to –3.5% 3.3V operating voltage CMOS/TTL compatible inputs and outputs Low power CMOS design Supports notebook VGA and other LCD timing controller applications Power down function for mobile application Products are available for industrial temperature range. Available in 8-pin SOIC and TSSOP • Product Description The P18xx is a versatile spread spectrum frequency modulator designed specifically for a wide range of input clock frequencies from 10 to 160 MHz (see Input Frequency and Modulation Rate Selections). The P18xx can generate an EMI reduced clock from crystal, ceramic resonator, or system clock. The P18xx-A to P18xx-H offer various combinations of spread options and percentage deviations (see Spread Deviation Selections). These combinations include Down Spread, Center Spread and percentage deviation range from ±0.625% to -3.50%. The P18xx reduces electromagnetic interference (EMI) at the clock source, allowing a system wide EMI reduction for all the down stream clocks and data dependent signals. The P18xx allows significant system cost savings by reducing the number of circuit board layers, ferrite beads, shielding, and other passive components that are traditionally required to pass EMI regulations. The P18xx modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, thereby decreasing the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most clock generators. Lowering EMI by increasing a signal’s bandwidth is called “spread spectrum clock generation”. The P18xx uses the most efficient and optimized modulation profile approved by the FCC and is implemented by using a proprietary all-digital method. Applications The P18xx is targeted toward EMI management for memory and LVDS interfaces in mobile graphic chipsets and high-speed digital applications such as PC peripheral devices, consumer electronics, and embedded controller systems. Alliance Semiconductor 2575 Augustine Drive • Santa Clara, CA 95054 • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. P1818/19/20/21/22 ® Pin Diagrams X IN 1 VSS SRS M odO ut 2 3 4 P 1 8 2 1 A /B /C /D X IN 1 VSS SRS M odO ut 2 3 4 P 1 8 1 8 A /B /C /D P 1 8 1 9 A /B /C /D P 1 8 2 0 A /B /C /D 8 7 6 5 XOUT VDD PD# REF 8 7 6 5 XOUT VDD FRS REF X IN 1 VSS D_C M odO ut 2 3 4 P 1 8 1 8 E /F /G /H P 1 8 1 9 E /F /G /H P 1 8 2 0 E /F /G /H 8 7 6 5 XOUT VDD PD# REF X IN 1 VSS SRS M odO ut 2 3 4 P1822A 8 7 6 5 MRS VDD SSON# SR0 Block Diagram D_C PD# MRS FRS SRS VDD Modulation XIN XOUT Feedback Divider Crystal Oscillator Frequency Divider PLL Phase Detector Loop Filter VCO Output Divider ModOUT REF P1818/19/20/21/22 Block Diagram VSS March 2003 Low Power Mobile VGA EMI Reduction IC Notice: The information in this document is subject to change without notice. 2 of 8 P1818/19/20/21/22 ® Input Frequency and Modulation Rate Part number P1818 P1819 P1820 FRS=0 P1821 P1822 FRS=1 Input frequency range 10 MHz to 20 MHz 20 MHz to 40 MHz 40 MHz to 80 MHz 10 MHz to 20 MHz 20 MHz to 40 MHz 80 MHz to 160 MHz Output frequency range 10 MHz to 20 MHz 20 MHz to 40 MHz 40 MHz to 80 MHz 10 MHz to 20 MHz 20 MHz to 40 MHz 80 MHz to 160 MHz Modulation rate Input frequency / 256 Input frequency / 512 Input frequency / 2048 Input frequency / 256 Input frequency / 512 Input frequency / 3584 Spread Deviation Selections Part number1 P18182/19/20/21A P1818/19/20/21B P1818/19/20/21C P1818/19/20/21D P1818/19/20E P1818/19/20F P1818/19/20G P18182/19/20H SRS 0 1 0 1 0 1 0 1 N/A N/A N/A N/A 0 0 1 1 0 0 1 1 SR0 N/A N/A N/A N/A N/A N/A N/A N/A 0 1 0 1 0 1 0 1 D_C N/A N/A N/A N/A 0 1 0 1 0 1 0 1 N/A Spread deviation -2.50% (Down) -3.50% (Down) -1.25% (Down) -1.75% (Down) +/-1.25% (Center) +/-1.75% (Center) +/-0.625% (Center) +/-0.875% (Center) -1.25% (Down) +/-0.625% (Center) -2.5% (Down) +/-1.25% (Center) -1.75% (Down) +/-0.875% (Center) -3.5% (Down) +/-1.75% (Center) -1.25% (Down) -2.50% (Down) -1.75% (Down) -3.50% (Down) +/-0.625% (Center) +/-1.25% (Center) +/-0.875% (Center) +/-1.75% (Center) P1822A N/A P1822B 1. A through H represents various combinations of spread deviations, options, and modulation rates. 2. Refer to Frequency vs. Deviation (P1818A and P1818H). March 2003 Low Power Mobile VGA EMI Reduction IC Notice: The information in this document is subject to change without notice. 3 of 8 P1818/19/20/21/22 ® Frequency vs. Deviation (P1818A and P1818H) Deviation in P1818A Frequency SRS = 1 10 MHz 15 MHz 20 MHz -4.4% -1.8% -0.8% SRS = 0 -3.3% -1.26% -0.6% D_C = 1 -4.4% -1.8% -0.8% D_C = 0 ±2.2% ±0.9% ±0.4% Deviation in P1818H Pin Description Pin number 1 2 3 Name XIN VSS SRS Type I P I Description Connect to externally generated clock signal or crystal. Ground Connection. Connect to system ground. Spread Range Select. Digital logic input used to select frequency deviation (see Spread Deviation Selections). This pin has an internal pullup resistor. Digital logic input used to select Down (LOW) or Center (HIGH) Spread Options (see Spread Deviation Selections). This pin has an internal pull-up resistor. Spread Spectrum clock output (see Input Frequency and Modulation Rate Selections and Spread Deviation Selections). Non-modulated reference output clock of the input frequency. Frequency Range Select. Digital logic input used to select input frequency range (see Input Frequency and Modulation Rate Selections). This pin has an internal pull-up resistor. Power-Down control pin. Pull LOW to enable Power-Down mode. This pin has an internal pull-up resistor. Connect to +3.3V Connect to crystal. No connect if externally generated clock signal is used. Modulation Rate Select. Digital logic input used to select Modulation Rate (see Spread Deviation Selections). This pin has an internal pullup resistor. 31 D_C I 4 5 5/61 ModOut REF FRS O O I 61 7 8 81 PD# VDD XOUT MRS I P I I 1. Please refer to Figure 1 for pin assignment. March 2003 Low Power Mobile VGA EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 8 P1818/19/20/21/22 ® Absolute Maximum Ratings Symbol VDD, VIN TSTG TA Parameter Voltage on any pin with respect to GND Storage temperature Operating temperature Rating -0.5 to +7.0 -65 to +125 0 to +70 Unit V ºC ºC DC Electrical Characteristics 3.3 V, 25° C Symbol VIL VIH IIL IIH IXOL IXOH VOL VOH IDD ICC Parameter Input low voltage Input high voltage Input low current (inputs D_C, PD#, MRS, FRS, SRS) Input high current XOUT output low current (@ 0.4 V, VDD = 3.3 V) XOUT output high current (@ 2.5 V, VDD = 3.3 V) Output low voltage (VDD=3.3 V, IOL = 20 mA) Output high voltage (VDD=3.3 V, IOH = 20 mA) Static supply current Standby mode Dynamic supply current Normal mode (3.3 V and 25 pF probe loading) Operating voltage Power up time (first locked clock cycle after power up) Clock output impedance Min GND – 0.3 2.00 -60.0 – 2.00 – – – – 7.1 fIN-min – – Typ – – – – – – – – 4.5 – Max 0.8 VDD + 0.3 -20.00 1.00 12.00 12.00 0.4 2.8 – 26.9 fIN-max – – Unit V V µA µA mA mA V V mA mA VDD tON 3.3 0.18 V mS ZOUT – 50 – Ω March 2003 Low Power Mobile VGA EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 8 P1818/19/20/21/22 ® AC Electrical Characteristics 3.3 V, 25° C Symbol fIN fOUT tLH1 tHL1 tJC tD Parameter Input frequency Output frequency Output rise time (measured at 0.8 V to 2.0 V) Output fall time (measured at 2.0 V to 0.8 V) Jitter (cycle to cycle) at 20 MHz Output duty cycle Min 10 10 – – -200 45 Typ – – 0.66 0.65 – 50 Max 160 160 – – 200 55 Unit MHz MHz ns ns ps % 1. tLH and tHL are measured into a capacitive load of 15 pF March 2003 Low Power Mobile VGA EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 8 P1818/19/20/21/22 ® Mechanical Package Outline (8-Pin SOIC) Inches Symbol C Millimeters Max 0.071 0.010 0.069 0.020 0.01 0.202 0.164 Min 1.45 0.10 1.35 0.31 0.10 4.72 3.75 Nor 1.63 0.18 1.55 0.41 0.15 4.92 3.95 1.27 BSC 5.70 0.30 0° 6.00 0.50 5° 6.30 0.70 8° Max 1.80 0.25 1.75 0.51 0.25 5.12 4.15 Min L Nor 0.064 0.007 0.061 0.016 0.006 0.194 0.156 A A1 0.057 0.004 0.053 0.012 0.004 0.186 0.148 P18xxx LOT NUMBER YYWW H E A2 B C a D E e D 0.050 BSC 0.224 0.012 0° 0.236 0.020 5° 0.248 0.028 8° A2 A H L B e A1 a Note: Controlling dimensions are millimeters. SOIC: 0.074 grams unit weight. Mechanical Package Outline (8-Pin TSSOP) Inches Symbol C Millimeters Max 0.047 0.006 0.041 0.012 0.008 0.122 0.177 Min – 0.05 0.80 0.19 0.09 2.90 4.30 Nor – – 1.00 – – 3.00 4.40 0.65 BSC 6.20 0.45 0° 6.40 0.60 – 6.60 0.75 8° Max 1.10 0.15 1.05 0.30 0.20 3.10 4.50 Min L Nor – – 0.039 – – 0.118 0.173 A A1 – 0.002 0.031 0.007 0.004 0.114 0.169 Lot # YYWW P 18xxx H E A2 B C a D E D A2 A e H 0.026 BSC 0.244 0.018 0° 0.252 0.024 – 0.260 0.030 8° B e A1 L a Note: Controlling dimensions are millimeters. TSSOP: 0.034 grams unit weight. March 2003 Low Power Mobile VGA EMI Reduction IC Notice: The information in this document is subject to change without notice. 7 of 8 P1818/19/20/21/22 ® Ordering Information X 1 18XX 2 X 3 -08 4 XX 5 1. Flow prefix: I = industrial temperature range (-40° C to 85° C) P = commercial temperature range (0° C to 70° C) 2. Device number 3. Deviation (%) and spread option identifier 4. Device pin count 5. Package identifier: ST = SOIC in tube SR = SOIC in tape and reel TT = TSSOP in tube TR = TSSOP in tape and reel Example: Input frequency (MHz) 10 – 20 10 – 20 10 – 20 10 – 20 Frequency deviation (%) -2.5, -3.5 -2.5, -3.5 -2.5, -3.5 -2.5, -3.5 Ordering number P1818A-08ST P1818A-08SR P1818A-08TT P1818A-08TR Marking P1818A P1818A P1818A P1818A Package type 8 PIN SOIC, TUBE 8 PIN SOIC, TAPE & REEL 8 PIN TSSOP, TUBE 8 PIN TSSOP, TAPE & REEL Qty. / reel Temp1 0°C to 70°C 2,500 0°C to 70°C 0°C to 70°C 2,500 0°C to 70°C 1. Products are available for industrial temperature range operation. Please contact factory for more information. Licensed under U.S. patent numbers 5,488,627 and 5,631,920. © Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights, mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. March 2003 Low Power Mobile VGA EMI Reduction IC Notice: The information in this document is subject to change without notice. 8 of 8