AM29LV008T-90FIB

PRELIMINARY Am29LV008T/Am29LV008B 8 Megabit (1,048,576 x 8-Bit) CMOS 3.0 Volt-only, Sectored Flash Memory 3.0 V-only Flash DISTINCTIVE CHARACTERISTICS s Single power supply operation — Extended voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — Standard voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors s High performance — Extended voltage range: access times as fast as 100 ns — Standard voltage range: access times as fast as 90 ns s Ultra low power consumption — Automatic Sleep Mode: 200 nA typical — Standby mode: 200 nA typical — Read mode: 2 mA/MHz typical — Program/erase mode: 20 mA typical s Flexible sector architecture — One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64 Kbyte sectors — Supports control code and data storage on a single device — Sector Protection features: A hardware method of locking a sector to prevent any program or erase operations within that sector Temporary Sector Unprotect feature allows code changes in previously locked sectors s Top or bottom boot block configurations available s Embedded Algorithms — Embedded Erase algorithms automatically preprogram and erase the entire chip or any combination of designated sectors — Embedded Program algorithms automatically write and verify bytes or words at specified addresses s Minimum 100,000 write cycle guarantee per sector s Package option — 40-pin TSOP s Compatibility with JEDEC standards — Pinout and software compatible with singlepower supply Flash — Superior inadvertent write protection s Data Polling and toggle bits — Provides a software method of detecting program or erase operation completion s Ready/Busy pin — Provides a hardware method of detecting program or erase cycle completion s Erase suspend/resume feature — Provides the ability to suspend the erase operation in any sector, read data from or program data to any other sector, then return to the original sector and complete the initial erase operation s Hardware reset pin (RESET) — Hardware method to reset the device to the read mode GENERAL DESCRIPTION The Am29LV008 is an 8 Mbit, 3.0 Volt-only Flash memory organized as 512 Kbytes of 8 bits each. For flexible erase and program capability, the 512 Kbits of data is divided into 19 sectors of one 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64 Kbytes. The data appears on DQ0–DQ7. The Am29LV008 is offered in a 40-pin TSOP package. This device is designed to be programmed in-system with the standard system 3.0 volt VCC supply. The device can also be reprogrammed in standard EPROM programmers. The Am29LV008 provides two levels of performance. The first level offers access times as fast as 100 ns with a VCC range as low as 2.7 volts, which is optimal for battery powered applications. The second level offers a Publication# 20511 Rev: C Amendment/+1 Issue Date: May 1997 This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice. PRELIMINARY 90 ns access time, optimizing performance in systems where the power supply is in the regulated range of 3.0 to 3.6 volts. To eliminate bus contention, the device has separate chip enable (CE), write enable (WE), and output enable (OE) controls. The Am29LV008 is entirely command set-compatible with the JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices. The Am29LV008 is programmed by executing the program command sequence. This invokes the Embedded Program Algorithm, which is an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. The device is erased by executing the erase command sequence. This invokes the Embedded Erase Algorithm, which is an internal algorithm that automatically preprograms the array, if it is not already programmed, before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin. This device also features a sector erase architecture. This allows for sectors of memory to be erased and reprogrammed without affecting the data contents of other sectors. A sector is typically erased and verified within 1.0 second. The Am29LV008 is fully erased when shipped from the factory. The Am29LV008 device also features hardware sector protection, implemented via external programming equipment, which disables both program and erase operations in any combination of the memory sectors. The Erase Suspend feature enables the user to pause the erase operation, for any period of time, to read data from or program data to a sector that was not being erased. Thus, true background erase can be achieved. The device features 3.0 volt, single-power-supply operation for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. A low VCC detector automatically inhibits write operations during power transitions. The end of program or erase is detected by the RY/BY pin. Data Polling of DQ7, or by the Toggle Bit (DQ6). Once the end of a program or erase cycle has been completed, the device automatically resets to the read mode. The Am29LV008 also has a hardware RESET p in. When this pin is driven low, execution of any Embedded Program or Erase Algorithm will be terminated. The internal state machine is then be reset into the read mode. Resetting the device will enable the system’s microprocessor to read the boot-up firmware from the Flash memory. AMD’s Flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The Am29LV008 memory electrically erases all bits within a sector simultaneously via FowlerNordheim tunneling. The bytes are programmed one byte at a time using the EPROM programming mechanism of hot electron injection. 2 Am29LV008T/Am29LV008B PRELIMINARY PRODUCT SELECTOR GUIDE Family Part Number Ordering Part Number: VCC = 3.0–3.6 V VCC = 2.7–3.6 V Max access time (ns) CE access time (ns) OE access time (ns) 90 90 40 -90R -100 100 100 40 -120 120 120 50 -150 150 150 55 Am29LV008T/Am29LV008B 3.0 V-only Flash BLOCK DIAGRAM RY/BY VCC VSS RESET Sector Switches DQ0–DQ7 Erase Voltage Generator State Control Command Register Input/Output Buffers WE BYTE PGM Voltage Generator Chip Enable Output Enable Logic STB Data Latch CE OE STB VCC Detector Timer Address Latch Y-Decoder Y-Gating X-Decoder Cell Matrix A0–A19 20511C-1 Am29LV008T/Am29LV008B 3 PRELIMINARY CONNECTION DIAGRAMS A16 A15 A14 A13 A12 A11 A9 A8 WE RESET NC RY/BY A18 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Standard 40-Pin TSOP 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A17 VSS NC A19 A10 DQ7 DQ6 DQ5 DQ4 VCC VCC NC DQ3 DQ2 DQ1 DQ0 OE VSS CE A0 A17 VSS NC A19 A10 DQ7 DQ6 DQ5 DQ4 VCC VCC NC DQ3 DQ2 DQ1 DQ0 CE VSS CE A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Reverse 40-Pin TSOP 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A16 A15 A14 A13 A12 A11 A9 A8 WE RESET NC RY/BY A18 A7 A6 A5 A4 A3 A2 A1 20511C-2 4 Am29LV008T/Am29LV008B PRELIMINARY PIN CONFIGURATION A0–A19 DQ0–DQ7 CE OE WE RESET RY/BY VCC = 20 addresses = 8 data inputs/outputs = Chip enable = Output enable = Write enable = Hardware reset pin, active low = Ready/Busy output = Standard voltage range (3.0 V to 3.6 V) for -90R Extended voltage range (2.7 to 3.6 V) for -100, -120, -150 VSS NC = Device ground = Pin not connected internally LOGIC SYMBOL 20 A0–A19 DQ0–DQ7 3.0 V-only Flash 8 CE (E) OE (G) WE (W) RESET RY/BY 20511C-3 Am29LV008T/Am29LV008B 5 PRELIMINARY ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below. Am29LV008 T -90R E C OPTIONAL PROCESSING Blank = Standard Processing B = Burn-in TEMPERATURE RANGE C = Commercial (0°C to +70°C) I = Industrial (–40°C to +85°C) E = Extended (–55°C to +125°C) PACKAGE TYPE E = 40-Pin Thin Small Outline Package (TSOP) Standard Pinout (TS 040) F = 40-Pin Thin Small Outline Package (TSOP) Reverse Pinout (TSR040) SPEED OPTION -xxx = 2.7 to 3.6 V VCC -xxR = 3.0 to 3.6 V VCC See Product Selector Guide and Valid Combinations BOOT CODE SECTOR ARCHITECTURE T = Top Sector B = Bottom Sector DEVICE NUMBER/DESCRIPTION Am29LV008 8 Megabit (1 M x 8-Bit) CMOS Flash Memory 3.0 Volt-only Program and Erase Valid Combinations Am29LV008T-90R, Am29LV008B-90R VCC = 3.0–3.6 V Am29LV008T-100, Am29LV008B-100 Am29LV008T-120, Am29LV008B-120 Am29LV008T-150, Am29LV008B-150 EC, EI, EE, EEB, FC, FI, FE, FEB EC, EI, FC, FI Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. 6 Am29LV008T/Am29LV008B PRELIMINARY Table 1. Operation Autoselect, Manufacturer Code (Note 1) Autoselect, Device Code (Note 1) Read Standby Output Disable Write Enable Sector Protect (Note 3) Verify Sector Protect (Note 4) Temporary Sector Unprotect Reset CE L L L H L L L L X X Am29LV008 User Bus Operations OE L L L X H H VID L X X WE H H H X H L Pulse/H H X X A0 L H A0 X X A0 L L X X A1 L L A1 X X A1 H H X X A6 L L A6 X X A6 L L X X A9 VID VID A9 X X A9 VID VID X X DQ0–DQ7 Code Code RD HIGH Z HIGH Z PD (Note 2) Code Code X HIGH Z RESET 3.0 V-only Flash H H H H H H H H VID L Legend: L = VIL, H = VIH, VID = 12.0 V ± 5%, X = Don’t care. See “DC Characteristics” on page 26 for voltage levels. PD = program data, RD = read data. Refer to Table 3 on page 10 for more information. Notes: 1. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 5 on page 13. 2. Refer to Table 5 for valid PD during a write operation. 3. Set VCC = 3.0 volts ± 10%. 4. Refer to “Sector Protection” on page 12. Am29LV008T/Am29LV008B 7 PRELIMINARY USER BUS OPERATIONS Read Mode The Am29LV008 has three control functions which must be satisfied in order to obtain data at the outputs: s CE is the power control and should be used for device selection (CE = VIL) s OE is the output control and should be used to gate data to the output pins if the device is selected (OE = VIL) s WE remains at VIH Address access time (TACC) is equal to the delay from stable addresses to valid output data. The chip enable access time (TCE) is the delay from stable addresses and stable CE to valid data at the output pins. The output enable access time (TOE) is the delay from the falling edge of OE t o valid data at the output pins (assuming the addresses have been stable at least TACC – TOE time). Deselecting CE (CE and RESET = VCC ± 0.3 V) puts the device into the ICC3 standby mode. If the device is deselected during an Embedded Algorithm operation, it continues to draw active power (ICC2) prior to entering the standby mode, until the operation is complete. When the device is again selected (CE = VIL), active operations occur in accordance with the AC timing specifications. Automatic Sleep Mode Advanced power management features such as the automatic sleep mode minimize Flash device energy c o n s u m p t i o n . T h i s i s ex t r e m e l y i m p o r t a n t i n battery-powered applications. The Am29LV008 automatically enables the low-power, automatic sleep mode when addresses remain stable for 200 ns. Automatic sleep mode is independent of the CE, WE, and OE control signals. Typical sleep mode current draw is 200 nA (for CMOS-compatible operation). Standard address access timings provide new data when addresses are changed. While in sleep mode, output data is latched and always available to the system. Standby Mode T he Am29LV008 is designed to accommodate low standby power consumption by applying the following voltages to the CE and RESET pins: ICC3 for CMOS compatible I/Os (current consumption