ATTM01

AME, Inc. ATTM01/ATTM02 1. General Description The ATTM01/ATTM02 are precision remote diode temperature sensors with a 2-wire System Management Bus (SMBus) serial interface. The ATTM01/ATTM02 measure: (1) Local temperature and (2) the temperature of a remote diode based transistor from Computer Processor Unit (CPU), Graphic Processor Unit (GPU) or other ASICs. The ATTM01/ATTM02 provide two system alarms: ALERT# and OVERT#. (1) ALERT# event occurs when any temperature goes outside the value that setup by preprogrammed HIGH and LOW temperature limit registers. (2) OVERT# event occurs when any temperature exceeds the OVERT# programmed limit. ATTM02 has a different SMBus address to the ATTM01. The SMBus address of the ATTM01 is 0x90 and ATTM02 is 0x94. Processor Thermal Monitor 2. Features l Remote and Local Temperature Sensing. l ± ℃ Accuracy. 1 l Programmable HIGH/LOW Alarm Temperature Thresholds. l ALERT# Output Supports SMBus Protocol. l OVERT# Output Useful for System Shutdown. l SMBus-compatible interface. l SMBus timeout support. l Packages: SOP-8 and MSOP-8 3. Pin Configuration/ Top Side Mark VDD D+ DOVERT# 1 Product Name XXXX (Data code) XXXXXXX_XX (Lot NO_IID) 8 7 6 5 SMBCLK SMBDATA ALERT# GND 2 3 4 Figure1. ATTM01/ATTM02 Pin Diagram (Top View) Rev. B.01 1 AME, Inc. ATTM01/ATTM02 ※ Ordering Information Part number ATTM01 ATTM01G ATTM01M ATTM01MG ATTM02 ATTM02G ATTM02M ATTM02MG Processor Thermal Monitor Package SOP-8 SOP-8, Green MSOP-8 MSOP-8, Green SOP-8 SOP-8, Green MSOP-8 MSOP-8, Green SMBus address 0x90 0x90 0x90 0x90 0x94 0x94 0x94 0x94 Marking TM01 TM01G TM01M TM01MG TM02 TM02G TM02M TM02MG 4. Pin Description Pin Type Description OD - Open-drain output IN - Input pin AIN - Analog input. I/OD - Bi-directional with open-drain output. Pin No. 1 2 3 4 5 6 7 8 Pin Name VDD D+ DOVERT# GND ALERT# SMBDATA SMBCLK I/O Type Power AIN AIN OD Ground OD I/OD IN 3.3V Power Input. Function Thermal diode anode Input Thermal diode cathode Input. Power supply shutdown control. Ground pin. SMBus alert (interrupt) Output. SMBus bi-directional data line. SMBus clock Input. 2 Rev. B.01 AME, Inc. ATTM01/ATTM02 n Typical Application 3.3Vsb Processor Thermal Monitor 3.3V C3 10u VCORE U2 4.7k C6 R6 2.2n 4.7k 3 4 R4 0 ATTM01/ATTM02 1 2 VDD D+ D OVERT# SMBCLK SMBDATA ALERT# GND 8 7 6 5 SCLK SDA C4 47p C5 47p 4.7k C2 0.1u C1 100p R1 R2 South bridge 3.3V Shutdown circuit THERMTRIP# CPU R7 4.7k Rev. B.01 3 AME, Inc. ATTM01/ATTM02 6. Electrical Specifications (These specifications apply for VCC = 3.3V and T A = +25oC, unless otherwise noted.) (Note 1) Parameter Supply Voltage Temperature Resolution V CC = 3.3V, TA = +25°C to +100°C, V CC V CC TRJ = +60°C to +100°C = 3.3V, TA = +25°C to +100°C, TRJ = 0°C to +100°C = 3.3V, TA = +25°C to +100°C, TRJ = 0°C to +125°C V CC = 3.3V, Local Temperature Error TA = +60°C to +100°C V CC = 3.3V, TA = 0°C to +100°C Supply Sensitivity of Temperature Error UVLO Hysteresis UVLO Threshold Power-On-Reset (POR) Threshold Power-On-Reset (POR) Hysteresis Standby Supply Current Operating Current Conversion Time Conversion Time Error Remote-Diode Source Current ALERT, OVERT Output Low Voltage Output High Leakage Current SMBus-COMPATIBLE INTERFACE (SMBCLK AND SMBDATA) Logic Input Low Voltage Logic Input High Voltage Input Leakage Current Output Low-Sink Current Input Capacitance 4 Processor Thermal Monitor Symbol V CC Test Conditions Min 3 0.5 Typ Max Units 3.6 V °C 9 -1.0 -3.0 -5.0 -2.0 -3.0 ±0.2 120 Falling edge Rising edge 2.62 2.74 120 SMBus static During conversion t CONV From stop bit to conversion completion 95 -25 IRJ High level Low level 75 7.5 100 10 7.8 0.53 125 156 +25 140 14 + 1.0 + 3.0 + 5.0 2.0 3.0 Bits °C °C °C °C °C °C/V mV V V mV µA mA ms % µA Remote Temperature Error ISINK = 1mA ISINK = 4mA V OH = 5.5V 0.4 0.6 1 V V µA V IL V IH ILEAK ISINK CIN V CC = 3.0V V CC = 5.5V V IN = GND or VCC V OL = 0.6V 2.2 2.6 -1 6 5 0.8 V V V 1 µA mA pF Rev. B.01 AME, Inc. ATTM01/ATTM02 6. Electrical Specifications Parameter SMBus-COMPATIBLE TIMING (Note 2) Serial Clock Frequency Bus Free Time Between STOP and START Condition START Condition Setup Time Repeat START Condition Setup Time START Condition Hold Time STOP Condition Setup Time Clock Low Period Clock High Period Data Setup Time Receive SMBCLK/SMBDATA Rise Time Receive SMBCLK/SMBDATA Fall Time Pulse Width of Spike Suppressed SMBus Timeout tSU:STA tHD:STA tSU:STO tLOW tHIGH tHD:DAT tR tF tSP tTIMEOUT SMBDATA low period for interface reset 0 25 37 90% to 90% 10% of SMBDATA to 90% of SMBCLK 90% of SMBCLK to 90% of SMBDATA 10% to 10% 90% to 90% (Note 4) fSMBCLK tBUF (Note 3) 4.7 4.7 50 4 4 4.7 4 250 1 300 60 45 100 kHz µs µs ns µs µs µs µs µs µs ns ns ms Symbol Test Conditions Min Typ Max Units Processor Thermal Monitor Note 1: All parameters tested at a single temperature. Specifications over temperature are guaranteed by design. Note 2: Timing specifications guaranteed by design. Note 3: The serial interface resets when SMBCLK is low for more than t TIMEOUT. Note 4: A transition must internally provide at least a hold time to bridge the undefined region (300ns max) of SMBCLK’s falling edge. Rev. B.01 5 AME, Inc. ATTM01/ATTM02 7. Hardware Monitor Block Processor Thermal Monitor Control Register SMBCLK Remote Data Control Logic DXP SMBus Codec Sigma-Delta ADC Control DXN SMBDATA Status Register Local Data Control Logic ALERT _N OVER _N Hardware Monitor Interface This chip is using the 2-wire SMBus serial interface to control the hardware monitor function. The major function of the hardware monitor is monitored the remote diode and local diode temperature. It also using the trimmed mechanism to control the accuracy of the temperature sensor under ± 1 ℃. It also uses the 2-wire SMBus serial interface. The two interrupt outputs ALERT# and OVER# are active low at default state and can change these outputs to active high when set bit 1 of register address 8’h31 to logic one. The slave address of SMBus can select by initial state of ALERT# when power on or access the command index 8’h42. This chip provides two slave address 7 ’ h1001000 and 7’h1001010 to avoid conflict with other devices. 6 Rev. B.01 AME, Inc. ATTM01/ATTM02 8. SMBus Protocol In this chip it supports the write byte and read byte mode protocol. The following is SMBus read/write data format. Write Byte Format: START 1 bit Slave Address 7 bits WR 1 bit ACK 1 bit COMMAND 8 bits ACK 1 bit DATA 8 bits ACK 1 bit STOP 1 bit Processor Thermal Monitor The COMMAND Byte is selects that register you are writing to. The DATA Byte is data goes into the register set by the command byte (to set thresholds, configuration, and update rate). Read Byte Format: S 1 bit Address 7 bits WR 1 bit ACK 1 bit COMMAND 8 bits ACK 1 bit S 1 bit Address1 8 bits RD 1 bit ACK 1 bit DATA 8 bits NAK 1 bit STOP 1 bit The S denotes Start Bit. Address represents slave address. The COMMAND Byte is selects that register you are reading from. The Address1 is due to change in data flow direction. The DATA Byte is reads from the register set by the command byte. The in above table the red color denotes Slaver transmission. SMBus Write Timing Diagram: SMBCLK A B C D EF G H I J K L M SMBDATA A = START CONDITION B = MSB OF ADDRESS CLCOKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = R/W_ BIT CLOCKED INTO SLAVE E = SLAVE PULL SMBDATA BUS LOW F = ACKNOWLEDGE BIT CLOCKED INTO MASTER G = MSB OF DATA CLOCKED INTO SLAVE H = LSB OF DATA CLOCKED INTO SLAVE I = SLAVE PULLS SMBDATA BUS LOW J = ACKNOWLEDGE BIT CLOCKED INTO MASTER K = ACKNOWLEDGE CLEAR PULSE L = STOP CONDITION DATA EXECUTED BY SLAVE M = NEW START CONDITION Rev. B.01 7 AME, Inc. ATTM01/ATTM02 SMBus Read Timing Diagram: SMBCLK A B C D EF G H I J K L M Processor Thermal Monitor SMBDATA A = START CONDITION B = MSB OF ADDRESS CLOCKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = R/W_ BIT CLOCKED INTO SLAVE E = SLAVE PULLS SMBDATA BUS LOW F = ACKNOWLEDGE BIT CLOCKED INTO MASTER G = MSB OF DATA CLOCKED INTO MASTER H = LSB OF DATA CLOCKED INTO MASTER I = MASTER PULLS DATA BUS INTO LOW J = ACKNOWLEDGE BIT CLOCKED INTO SLAVE K = ACKNOWLEDGE CLEAR PULSE L = STOP CONDITION, DATA EXECUTED BY SLAVE M = NEW START CONDITION 8 Rev. B.01 AME, Inc. ATTM01/ATTM02 9. Hardware Monitor Register The following registers define the temperature sensor control and status registers, data registers and SMBus slave address register. 9.1 Local Diode Higher Byte Temperature Register, Access Address: “Command Index = 0h” Field ADCLOCA_DATA Type RO Position [7:0] Bits 8 I 0 Function Local diode higher byte temperature data. Bit 7 denotes the sign bit. The LSB represents 1℃. Processor Thermal Monitor 9.2 Remote Diode Higher Byte Temperature Register, Access Address: “Command Index = 1h” Field ADCREMOTE_DATA Type RO Position [7:0] Bits 8 I 0 Function Remote diode higher byte temperature data. The bit 7 denotes the sign bit. The LSB represents the 1 ℃. 9.3 Temperature Sensor Status Register, Access Address: “Command Index = 2h” Field BUSY Type RO Position [7] Bits 1 I 0 ADC converting data. The ADC measure the temperature of local diode that exceed the alerting high limit. When software reading this register it will reset to zero if active condition no more satisfy. The ADC measure the temperature of local diode that below the alerting low limit. W hen software reading this register it will reset to zero if active condition no more satisfy. The ADC measure the temperature of remote diode that exceed the alerting high limit. When software reading this register it will reset to zero if active condition no more satisfy. The ADC measure the temperature of remote diode that below the alerting low limit. W hen software reading this register it will reset to zero if active condition no more satisfy. The ADC detects the DXP and DXN pins disconnect to remote diode. The ADC measure the temperature of remote diode that exceed the remote diode critical limit. When software reading this register it will reset to zero if active condition no more satisfy. The ADC measure the temperature of local diode that exceed the local diode critical limit. When software reading is register it will reset to zero if active condition no more satisfy. 9 Function LTHOT_REG RC [6] 1 0 LTCOOL_REG RC [5] 1 0 RTHOT_REG RC [4] 1 0 RTCOOL_REG RC [3] 1 0 DIODE_OPEN RO [2] 1 0 RCRITI_REG RC [1] 1 0 LCRITI_REG RC [0] 1 0 Rev. B.01 AME, Inc. ATTM01/ATTM02 Processor Thermal Monitor 9.4 ADC Configuration Register, Access Address: “Command Index = 3h” Field ALERT_MASK STOP Reserved CRITI_MASK Reserved FAULT_QUEUE Type RO RO NA RO NA RO Position [7] [6] [5] [4] [3:1] [0] Bits 1 1 1 1 3 1 I 0 0 0 0 0 0 Function ALERT# mask. When set to “1” ALERT# interrupts are masked. When set to “1” the ADC will be terminated. Reserved. Not implemented. OVER# mask. When set to “1” OVER# interrupts is masked. Reserved. Not implemented. When set to “1” denotes three consecutive remote temperature measurement outside the Alerting, Critical limit. 9.5 ADC Conversion Rate Register, Access Address: “Command Index = 4h” Field Reserved UPDATE_RATE Type NA RO Position [7:5] [4:0] Bits 3 5 I 0 0 Function Reserved. Not implemented. ADC measure temperature value rate. 9.6 Local Diode Alerting High Limit Register, Access Address: “Command Index = 5h” Field LALERT_HIGH Type RO Position [7:0] Bits 8 I 8’ h50 Function Local diode alerting high limit register. The default is set to 80 ℃. The LSB denotes 1 ℃. 9.7 Local Diode Alerting Low Limit Register, Access Address: “Command Index = 6h” Field LALERT_LOW Type RO Position [7:0] Bits 8 I 0 Function Local diode alerting low limit register. The default is set to 0 ℃. The LSB denotes 1 ℃. 9.8 Remote Diode Alerting High Limit Register, Access Address: “Command Index = 7h” Field RALERT_HIGH Type RO Position [7:0] Bits 8 I 8’ h50 Function Remote diode alerting high limit register. The default is set to 80℃. The LSB denotes 1 ℃ 9.9 Remote Diode Alerting Low Limit Register, Access Address: “Command Index = 8h” Field RLAERT_LOW Type RO Position [7:0] Bits I 0 Function Remote diode alerting low limit. The default value is set to 0 ℃. The LSB represents 1 ℃. 10 Rev. B.01 AME, Inc. ATTM01/ATTM02 Processor Thermal Monitor 9.10 Temperature sensor Configuration Register, Access Address: “Command Index = 9h” Field ALERT_MASK STOP Reserved CRITI_MASK Reserved Type WO WO NA WO NA Position [7] [6] [5] [4] [3:0] Bits 1 1 1 1 4 I 0 0 0 0 0 Function When set to “1” ALERT# interrupt is masked. When set to “1” then the ADC will be terminated. Reserved. Not implemented. When set to “1” the Remote/Local diodes exceed the critical set point will no activated the OVER# pin.. Reserved. Not implemented. 9.11 ADC Conversion Rate Register, Access Address: “Command Index = Ah ” Field Reserved Type N/A Position [7:4] Bits 4 I 0 Function Reserved. Not implemented. Control the ADC value update to SMBus register. The variable rate control can be used to reduce supply current in portable equipment application. 4’ conversion rate is 16 Hz (default value), 4’ h8: h7: conversion rate is 8 Hz, 4’ conversion rate is 4 h6: Hz, 4’ conversion rate is 2 Hz, 4’ conversion h5: h4: rate is 1 Hz, 4’ conversion rate is 0.5 Hz, 4’ h3: h2: conversion rate is 0.25 Hz, 4’ conversion rate is h1: 0.125 Hz, 4’ conversion rate is 0.0625 Hz, other h0: values are reserved. CONVERSIO_RATE WO [3:0] 4 4’ h8 9.12 Local Diode Alerting High Limit Register, Access Address: “Command Index = Bh” Field LALERT_HIGH Type WO Position [7:0] Bits 8 I 8’ h50 Function Setting the local diode alerting high limit register. The default value is 80 ℃ and the LSB denotes 1 ℃. 9.13 Local Diode Alerting Low Limit Register, Access Address: “Command Index = Ch” Field LAERT_LOW Type WO Position [7:0] Bits 8 I 0 Function Setting the local diode alerting low limit register. The default value is 0 ℃ and the LSB represents 1 ℃. 9.14 Remote Diode Alerting High Limit Temperature Register, Access Address: “Command Index = Dh ” Field RHIGH_DATA Type W/O Position [7:0] Bits 8 I 8’ h50 Function Host set the remote diode high limit temperature value. The default value set to 80 ℃ and LSB denotes 1 ℃. Rev. B.01 11 AME, Inc. ATTM01/ATTM02 Processor Thermal Monitor 9.15 Remote Diode Alerting Low Limit Temperature Register, Access Address: “Command Index = Eh” Field RLOW_DATA Type W/O Position [7:0] Bits 8 I 0 Function Host set the remote diode low limit temperature value. The default value is 0 ℃ and LSB represents 1 ℃. 9.16 One Shot Register, Access Address: “Command Index = Fh” Field Reserved Type NA Position [7:1] Bits 7 I 0 Function Reserved. Not implemented. When want to reduce the supply current it can set bit 6 of register 9 configuration register to “1” and also set this bit to “1” and then write to “0”, i.e., create a one shot pulse. The ADC will be ceased operation after measure one cycle per each remote/local diode. ONESHOT_ADC WO [0] 1 0 9.17 Remote Diode Lower Byte Temperature Register, Access Address: “Command Index = 10h” Field Reserved ADCREMOTE_DATA Type NA RO Position [7:1] [0] Bits 7 1 I 0 0 Function Reserved. Not implemented. The remote diode lower byte temperature data. The LSB denotes 0.5 ℃. 9.18 Remote Diode Temperature Offset Register, Access Address: “Command Index = 11h” Field Type Position Bits I Function Remote diode temperature offset register to adjust the decimated filter because of the PCB placement, routing, and different thermal diode. Two’ complement format. s ROFFSET_DATA W/R [7:0] 8 0 9.19 Remote Diode Critical Temperature Limit Register, Access Address: “Command Index = 19h” Field RCRITI_DATA Type W/R Position [7:0] Bits 8 I 8’ h6E Function Remote diode critical temperature registers. The default value is 110 ℃ and the LSB denotes 1 ℃. 9.20 Local Diode Critical Temperature Limit Register, Access Address: “Command Index = 20h” Field LCRITI_DATA Type W/R Position [7:0] Bits 8 I 8’ h55 Function Local diode critical temperatures register. The default is 85 ℃ and the LSB denotes 1 ℃. 12 Rev. B.01 AME, Inc. ATTM01/ATTM02 Processor Thermal Monitor 9.21 Remote Diode Critical Hysteresis Temperature Register, Access Address: “Command Index = 21h” Field Reserved Type NA Position [7:5] Bits 3 I 0 Function Reserved. Not implement. Hysteresis the remote diode temperature registers. The default value is 10 ℃ and LSB denotes 1 ℃. When temperature exceed the critical temperature limit the OVER# pin will be activate and the OVER# pin will be deactivate when temperature below the critical temperature limit minus this register value (CRITI_HYSTE). CRITI_HYSTE W/R [4:0] 5 8’ hA 9.22 Local Diode Lower Byte Temperature Register, Access Address: “Command Index = 30h” Field Reserved ADCLOCAL_DATA Type NA RO Position [7:1] [0] Bits 7 1 I 0 0 Function Reserved. Not implemented. The local diode temperature data. The LSB denotes 0.5 ℃. 9.23 Thermal Sensor Control Register, Access Address: “Command Index = 31h” Field CLEAR_REG EN_DIRECT EN_RADC_DIR Type WR WR WR Position [7] [5] [4] Bits 1 1 1 I 0 0 0 Clear the ADC data. Enable the local diode temperature data without moving average. Enable the remote diode temperature data without moving average. When set to “1” then the internal clock and band gap voltage can output from ALERT# and OVER#, respectively. Enable the ADC measure the local diode. Change the polarity of ALERT# and OVER#. When set to “0” these two signals change to active high signal from active low. Enable the ADC measure the remote diode. Function ANA_MODE EN_ADCLOCAL INT_POLARITY EN_ADCREMOTE WR WR WR WR [3] [2] [1] [0] 1 1 1 1 0 1 1 1 Rev. B.01 13 AME, Inc. ATTM01/ATTM02 Processor Thermal Monitor 9.24 Thermal Sensor Status Register, Access Address: “Command Index = 32h” Field UVLO Type RO Position [7] Bits 1 I 1 Function When the voltage drop to 2.62V then this signal will be activated. Because when the voltage below 2.62V the ADC can not normal operation. The ADC analog circuit detects the DXP and DXN pins are short together. Reserved. Not implemented. DIODE_SHORT Reserved RO NA [6] [5:0] 1 6 0 0 9.25 SMBus Control Register, Access Address: “Command Index = 42h” Field Type Position Bits I Function Select SMBus slave address. 0: slave address is 7’ h48, 1: slave address is 7’ h4A. The SMBus slave address can determine from this register bit and also can pull up or pull down the ALERT# pin. When pull up ALERT# pin the slave address is 7’ h48, otherwise it is 7’ h4A. Reserved. Not implemented. Software reset the control logic. Reserved. Not implemented. Bit [2] always one. ADC free run mode, i.e., the ADC operation does not restrict by conversion rate. ADDR_SEL WR [7] 1 0 Reserved SOFT_RESET Reserved FREE_RUN_MODE NA WR NA WR [6:4] [3] [2:1] [0] 3 1 2 1 0 0 2’ b10 0 14 Rev. B.01 AME, Inc. ATTM01/ATTM02 Processor Thermal Monitor 10. Hardware Monitor Programming Guide If want to this chip fully operation on PCB board the first step it need setting the remote and local diode offset. This offset can eliminate the PCB trace, binding wire loading. When software setting the offset register to reduce side effect of PCB trace to minimum then the temperature data accuracy is 0.5 ℃. Setting the bit 5, bit4 of Thermal Sensor Control Register can enable or disable the digital filter. When these bit set to logic one then the digital filter will be turned on, otherwise, these digital filter will be turned off. In this chip has a parity check mechanism to avoid the software reading remote or local temperature data and the ADC converting temperature into this register. In other words, when the software reading the temperature data (register 8’h0, 8’h1, 8’h10, 8’h30) and at the same time the ADC want converting temperature data to register 8’h0, 8’h1, 8’h10, or 8’h30 then the parity check mechanism will halt the ADC converting temperature data to these registers before software read finish these register. In order to make parity check mechanism can work well when read the temperature data it need read the high byte temperature data at first and continue read the low byte temperature data, i.e., read the temperature data register the first need read register 8’h0 or 8’h1 and consecutive read register 8’h30 or 8’h10. When the software want to reduce the supply current it can enable the one shot mode and this mode operation only at standby mode, i.e., bit 6 of Configuration register set to “1”. The software need set the bit 1 of register 8’hF address to “1” and consecutive set this bit to “1” to generate one pulse signal. The bit 7 (BUSY) of status register will not effect the reading temperature data. Because of this bits only show that ADC converting data. Rev. B.01 15 AME, Inc. ATTM01/ATTM02 11. Package Dimension SOP-8 SYMBOLS Top View Side View C Processor Thermal Monitor MILLIMETERS MIN MAX 1.75 0.30 INCHES MIN 0.05315 MAX 0.0689 A A1 A2 1.35 0.10 0.00394 0.01181 0.05799 REF 0.01299 0.02008 0.00748 0.00984 0.18898 0.20984 0.14961 0.15748 0.05000 BSC 0.01575 0.05000 0.22835 0.24803 0o 0.00394 8o 1.473 REF 0.33 0.19 4.80 3.80 0.51 0.25 5.33 4.00 H E B C D D θ Front View 7o(4X) L E e L H y θ 1.27 BSC 0.40 5.80 0o 1.27 6.30 0.10 8o A2 B 16 A1 e A Rev. B.01 AME, Inc. ATTM01/ATTM02 11. Package Dimension MSOP-8 SYMBOLS Top View D e1 TOP PKG. Processor Thermal Monitor MILLIMETERS MIN MAX 1.07 0.20 0.92 0.38 0.33 0.23 0.17 3.10 4.98 3.10 INCHES MIN 0.002 0.032 0.011 0.011 0.005 0.005 0.114 0.188 0.114 MAX 0.04197 0.008 0.036 0.015 0.013 0.009 0.006 0.122 0.196 0.122 DETAIL A A A1 A2 b b1 0.05 0.81 0.28 0.28 0.13 0.13 2.90 4.77 2.90 BTM PKG. E1 E L2 L L1 θ c c1 D E E1 e e1 L L1 L2 θ PIN 1 I.D (SHINNY SURFACE) 0.65 TYP 1.95 TYP 0.406 0.686 0.0255 TYP 0.0767 TYP 0.01598 0.02701 0.037 REF 0.010 TYP 0o 8o Front View R0.127(0.005) TYP ALL CORNER & EDGES 0.94 REF 0.254 TYP 0o 8o A A2 A1 e b End View SECTION B-B b b1 BASE METAL B B E1 See Detail A c c1 WITH PLATING Rev. B.01 17 www.ame.com.tw E-Mail: sales@ame.com.tw Life Support Policy: These products of AME, Inc. are not authorized for use as critical components in life-support devices or systems, without the express written approval of the president of AME, Inc. AME, Inc. reserves the right to make changes in the circuitry and specifications of its devices and advises its customers to obtain the latest version of relevant information. © AME, Inc. , June 2007 Document: ATT-DSATTM01/ATTM02-B.01 Corporate Headquarter AME, Inc. 2F, 302 Rui-Guang Road, Nei-Hu District Taipei 114, Taiwan. Tel: 886 2 2627-8687 Fax: 886 2 2659-2989 U.S.A. (Subsidiary) Analog Microelectronics, Inc. 3100 De La Cruz Blvd., Suite 201 Santa Clara, CA. 95054-2438 Tel : (408) 988-2388 Fax: (408) 988-2489