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A625308AV-70SI

A625308AV-70SI

  • 厂商:

    AMICC(欧密格)

  • 封装:

  • 描述:

    A625308AV-70SI - 32K X 8 BIT CMOS SRAM - AMIC Technology

  • 数据手册
  • 价格&库存
A625308AV-70SI 数据手册
A625308A Series Preliminary Document Title 32K X 8 BIT CMOS SRAM Revision History Rev. No. 0.0 0.1 0.2 32K X 8 BIT CMOS SRAM History Initial issue Add ultra temp grade and 28-pin DIP package type Add SI grade Issue Date February 2, 2001 November 7, 2001 July 17, 2002 Remark Preliminary PRELIMINARY (July, 2002, Version 0.2) AMIC Technology, Inc. A625308A Series Preliminary Features n Power Supply Range: 4.5V to 5.5V n Access times: 70 ns A625308A-S series: Operating: Standby: A625308A-SI/SU series: Operating: Standby: n Extended operating temperature range: 0°C to 70°C for -S series, -25°C to 85°C for -SI series, -40°C to 85°C for -SU series. n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2.0V (min.) n Available in 28-pin, DIP/SOP and TSOP 32K X 8 BIT CMOS SRAM 35mA (max.) 10µA (max.) 35mA (max.) 15µA (max.) General Description The A625308A is a low operating current 262,144-bit static random access memory organized as 32,768 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Minimum standby power is drawn by this device when CE is at a high level, independent of the other input levels. Data retention is guaranteed at a power supply voltage as low as 2.0V. Pin Configurations n DIP / SOP n TSOP A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 2 3 4 28 27 26 25 VCC WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 5 6 7 8 9 10 11 12 13 14 24 23 22 21 20 19 18 17 16 15 PRELIMINARY (July, 2002, Version 0.2) 1 ~ OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ~ A625308AV 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 VSS I/O2 I/O1 I/O0 A0 A1 A2 A625308A(M) AMIC Technology, Inc. A625308A Series Block Diagram A0 VCC GND A12 A13 A14 ROW DECODER 512 X 512 MEMORY ARRAY I/O0 INPUT DATA CIRCUIT COLUMN I/O I/O7 CE OE WE CONTROL CIRCUIT Pin Descriptions – DIP / SOP Pin No. 1-10, 21, 23-26 11-13, 15-19 20 22 27 28 14 Symbol A0 - A14 I/O0 - I/O7 CE OE WE VCC GND Description Address Input Data Input/Output Chip Enable Output Enable Write Enable Power Supply Ground Pin Description-TSOP Pin No. 2-5, 8-17, 28 18-20, 22-26 27 1 6 7 21 Symbol A0 - A14 I/O0 - I/O7 CE OE WE VCC GND Description Address Input Data Input/Output Chip Enable Output Enable Write Enable Power Supply Ground PRELIMINARY (July, 2002, Version 0.2) 2 AMIC Technology, Inc. A625308A Series Recommended DC Operating Conditions (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C) Symbol VCC GND VIH VIL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Min. 4.5 0 2.2 -0.5 Typ. 5.0 0 0 Max. 5.5 0 VCC + 0.5 +0.8 Unit V V V V Absolute Maximum Ratings* VCC to GND . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V Operating Temperature, Topr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C or -40°C to +85°C Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 0.7W Soldering Temp. & Time . . . . . . . . . . . . . 260°C, 10 sec *Comments Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C, VCC = 5.0V ± 10%, GND = 0V) Symbol Parameter A625308A-70S/SI/SU Min. ILI ILO ICC Input Leakage Current Output Leakage Current Active Power Supply Current Max. 1 1 5 µA µA mA VIN = GND to VCC CE = VIH VI/O = GND to VCC CE = VIL, II/O = 0mA Min. Cycle, Duty = 100% CE = VIL, II/O = 0mA CE = VIL, VIH = VCC VIL = 0V, f = 1 MHz II/O = 0 mA Unit Conditions ICC1 Dynamic Operating Current - 35 mA ICC2 Dynamic Operating Current - 5 mA PRELIMINARY (July, 2002, Version 0.2) 3 AMIC Technology, Inc. A625308A Series DC Electrical Characteristics (continued) Symbol Parameter A625308A-70S Min. ISB Supply Current Standby Power ISB1 VOL VOH Output Low Voltage Output High Voltage 2.4 10 0.4 2.4 15 0.4 µA V V Max. 0.5 A625308A-70SI/SU Min. Max. 0.5 mA CE = VIH CE ≥ VCC - 0.2V VIN ≥ 0V IOL = 2.1 mA IOH = -1.0 mA Unit Conditions Truth Table Mode Standby Output Disable Read Write Note: X: H or L CE H L L L OE X H L X WE X H H L I/O Operation High Z High Z DOUT DIN Supply Current ISB, ISB1 ICC, ICC1, ICC2 ICC, ICC1, ICC2 ICC, ICC1, ICC2 Capacitance (TA = 25°C, f = 1.0 MHz) Symbol CIN* CI/O* Parameter Input Capacitance Input/Output Capacitance Min. Max. 6 8 Unit pF pF Conditions VIN = 0V VI/O = 0V * These parameters are sampled and not 100% tested. PRELIMINARY (July, 2002, Version 0.2) 4 AMIC Technology, Inc. A625308A Series AC Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C, VCC = 5.0V ± 10%) Symbol Parameter A625308A-70S/SI/SU Min. Read Cycle tRC tAA tACE tOE tCLZ tOLZ tCHZ tOHZ tOH Write Cycle tWC tCW tAS tAW tWP tWR tWHZ tDW tDH tOW Notes: Write Cycle Time Chip Enable to End of Write Address Set up Time Address Valid to End of Write Write Pulse Width Write Recovery Time Write to Output in High Z Data to Write Time Overlap Data Hold from Write Time Output Active from End of Write 70 60 0 60 50 0 30 0 5 25 ns ns ns ns ns ns ns ns ns ns Read Cycle Time Address Access Time Chip Enable Access Time Output Enable to Output Valid Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change 70 10 5 10 70 70 35 25 25 ns ns ns ns ns ns ns ns ns Max. Unit tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels. PRELIMINARY (July, 2002, Version 0.2) 5 AMIC Technology, Inc. A625308A Series Timing Waveforms Read Cycle 1 (1) tRC Address tAA OE tOE tOLZ5 CE tOH tACE tCLZ5 DOUT tOHZ5 tCHZ5 Read Cycle 2 (1, 2, 4) tRC Address tAA tOH tOH DOUT PRELIMINARY (July, 2002, Version 0.2) 6 AMIC Technology, Inc. A625308A Series Timing Waveforms (continued) Read Cycle 3 (1, 3, 4) CE tACE tCLZ 5 tCHZ 5 DOUT Notes: 1. 2. 3. 4. 5. W E is high for Read Cycle. Device is continuously enabled, CE = VIL. Address valid prior to or coincident with CE transition low. OE = VIL. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. (6) Write Cycle 1 (Write Enable Controlled) tWC Address tAW tCW5 CE (4) tWR 3 tAS1 tWP 2 WE tDW tDH DIN tWHZ 7 tOW 7 DOUT PRELIMINARY (July, 2002, Version 0.2) 7 AMIC Technology, Inc. A625308A Series Timing Waveforms (continued) Write Cycle 2 (Chip Enable Controlled) (6) tWC Address tAW tCW5 CE tAS1 (4) tWR3 tWP2 WE tDW tDH DIN tWHZ 7 DOUT Notes: 1. 2. 3. 4. tAS is measured from the address valid to the beginning of Write. A Write occurs during the overlap (tWP) of a low CE and a low W E . tWR is measured form the earliest of CE or W E going high to the end of the Write cycle. If the CE low transition occurs simultaneously with the W E low transition or after the W E transition, outputs remain in a high impedance state. 5. tCW is measured from the later of CE going low to the end of Write. 6. OE level is high or low. 7. Transition is measured ±500mV from steady. This parameter is sampled and not 100% tested. PRELIMINARY (July, 2002, Version 0.2) 8 AMIC Technology, Inc. A625308A Series AC Test Conditions Input Pulse Levels Input Rise And Fall Time Input and Output Timing Reference Levels Output Load 0V, 3V 5 ns 1.5V See Figure 1 and 2 TTL TTL CL 30pF CL 5pF * Including scope and jig. * Including scope and jig. Figure 1. Output Load Figure 2. Output Load for tCLZ1, tCLZ2, tOHZ, tOLZ, tCHZ1, tCHZ2, tWHZ, and tOW Data Retention Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C) Symbol VDR Parameter VCC for Data Retention Min. 2.0 Max. 5.5 Unit V Conditions CE ≥ VCC - 0.2V VCC = 2.0V, CE ≥ VCC - 0.2V VIN ≥ 0V ICCDR Data Retention Current - 3 µA tCDR tR Chip Disable to Data Retention Time Operation Recovery Time 0 tRC - ns See Retention Waveform ns PRELIMINARY (July, 2002, Version 0.2) 9 AMIC Technology, Inc. A625308A Series Low VCC Data Retention Waveform DATA RETENTION MODE VCC 4.5V tCDR 4.5V tR VDR ≥ 2.0V VIH CE CE ≥ VDR - 0.2V VIH Ordering Information Part No. A625308A-70S A625308AM-70S A625308AV-70S A625308A-70SI A625308AM-70SI A625308AV-70SI A625308A-70SU A625308AM-70SU A625308AV-70SU 70 Access Time (ns) Operating Current Max. (mA) 35 35 35 35 35 35 35 35 35 Standby Current Max. (µA) 10 10 10 15 15 15 15 15 15 Package 28L DIP 28L SOP 28L TSOP (Forward) 28L DIP 28L SOP 28L TSOP (Forward) 28L DIP 28L SOP 28L TSOP (Forward) PRELIMINARY (July, 2002, Version 0.2) 10 AMIC Technology, Inc. A625308A Series Package Information P-DIP 28L Outline Dimensions unit: inches/mm D 28 15 E1 1 S 14 E C A2 A A1 Base Plane Seating Plane B B1 e1 α eA L Dimensions in inches Symbol A A1 A2 B B1 C D E E1 e1 L α eA S Min 0.010 0.150 0.016 0.058 0.008 0.590 0.540 0.090 0.120 0° 0.630 Nom 0.155 0.018 0.060 0.010 1.460 0.600 0.545 0.100 0.130 0.650 Max 0.210 0.160 0.022 0.064 0.014 1.470 0.610 0.550 0.110 0.140 15° 0.670 0.090 Dimensions in mm Min 0.25 3.81 0.41 1.47 0.20 14.99 13.72 2.29 3.05 0° 16.00 Nom 3.94 0.46 1.52 0.25 37.08 15.24 13.84 2.54 3.30 16.51 Max 5.33 4.06 0.56 1.63 0.36 37.34 15.49 13.97 2.79 3.56 15° 17.02 2.29 Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E1 does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (July, 2002, Version 0.2) 11 AMIC Technology, Inc. A625308A Series Package Information SOP (W.B.) 28L Outline Dimensions 28 15 unit: inches/mm H E θ L 1 B 14 Detail F D c A2 S Seating Plane y D A1 y A e L1 See Detail F Dimensions in inches Symbol A A1 A2 B C D E e H L L1 S y θ Min 0.004 0.093 0.014 0.008 0.326 0.044 0.453 0.028 0.059 0° Nom 0.098 0.016 0.010 0.713 0.331 0.050 0.465 0.036 0.067 Max 0.112 0.103 0.020 0.012 0.728 0.336 0.056 0.477 0.044 0.075 0.047 0.004 8° Dimensions in mm Min 0.10 2.36 0.36 0.20 8.28 1.12 11.51 0.71 1.50 0° Nom 2.49 0.41 0.25 18.11 8.41 1.27 11.81 0.91 1.70 Max 2.85 2.62 0.51 0.30 18.49 8.53 1.42 12.12 1.12 1.91 1.19 0.10 8° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (July, 2002, Version 0.2) 12 AMIC Technology, Inc. A625308A Series Package Information TSOP 28L TYPE I (8 X 13.4mm) Outline Dimensions unit: inches/mm D1 1 28 A2 Detail "A" E A1 c θ L 14 D 15 y D e Detail "A" S b Dimensions in inches Symbol A A1 A2 b c E L D D1 e S y θ 0° Min 0.002 0.037 0.007 0.005 0.311 0.012 0.520 0.461 Nom 0.039 0.009 0.315 0.020 0.528 0.465 0.022 BSC 0.017 TYP 0.004 5° Max 0.049 0.041 0.011 0.008 0.319 0.028 0.536 0.469 Dimensions in mm Min 0.05 0.95 0.17 0.12 7.90 0.30 13.20 11.70 Nom 1.00 0.22 8.00 0.50 13.40 11.80 0.55 BSC 0.425 TYP 0° 0.10 5° Max 1.25 1.05 0.27 0.21 8.10 0.70 13.60 11.90 Notes: 1. The maximum value of dimension D1 includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (July, 2002, Version 0.2) 13 AMIC Technology, Inc. A
A625308AV-70SI 价格&库存

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