A625308M-70L

A625308 Series Preliminary Document Title 32K X 8 BIT CMOS SRAM Revision History Rev. No. 0.0 0.1 0.2 32K X 8 BIT CMOS SRAM History Initial issue Erase 28-pin DIP package type Erase 55ns part Issue Date June 30, 1998 May 21, 1999 December 1, 2000 Remark Preliminary PRELIMINARY (December, 2000, Version 0.2) AMIC Technology, Inc. A625308 Series Preliminary Features n External Operating Voltage: 4.5V to 5.5V n Access times: 70 ns (max.) n Current: A625308-L series: Operating: 70mA (max.) Standby: 100µA (max.) A625308-S series: Operating: 70mA (max.) Standby: 25µA (max.) n n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL compatible Common I/O using three-state output Data retention voltage: 2.0V (min.) Available in 28-pin SOP and TSOP (forward and reverse type) packages 32K X 8 BIT CMOS SRAM General Description The A625308 is a low operating current 262,144-bit static random access memory organized as 32,768 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Minimum standby power is drawn by this device when CE is at a high level, independent of the other input levels. Data retention is guaranteed at a power supply voltage as low as 2.0V. Pin Configurations n SOP n TSOP A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 2 3 4 5 28 27 26 25 24 VCC WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 6 7 8 9 10 11 12 13 14 23 22 21 20 19 18 17 16 15 ~ ~ A3 A4 A5 A6 A7 A12 A14 VCC WE A13 A8 A9 A11 OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ~ ~ ~ ~ OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ~ ~ A625308V 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 VSS I/O2 I/O1 I/O0 A0 A1 A2 A625308M A625308R 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A2 A1 A0 I/O0 I/O1 I/O2 VSS I/O3 I/O4 I/O5 I/O6 I/O7 CE A10 PRELIMINARY (December, 2000, Version 0.2) 1 AMIC Technology, Inc. A625308 Series Block Diagram A5 VCC GND R OW 512 X 512 MEMORY ARRAY A9 A11 A14 DECODER I/O0 COLUMN I/O INPUT DATA CIRCUIT COLUMN DECODER I/O7 A0 A4 A10 CE OE WE CONTORL CIRCUIT Pin Descriptions - SOP Pin No. 1-10, 21, 23-26 11-13, 15-19 14 20 22 27 28 Symbol A0 - A14 I/O0 - I/O7 GND CE OE WE Pin Description-TSOP Description Address Input Data Inputs/Outputs Ground Chip Enable Output Enable Write Enable Power Supply Pin No. 1 2-5, 8-17, 28 7 6 18-20, 22-26 21 27 Symbol OE Description Output Enable Address Input Power Supply Write Enable Data Inputs/Outputs Ground Chip Enable A0 - A14 VCC WE I/O0 - I/O7 GND CE VCC PRELIMINARY (December, 2000, Version 0.2) 2 AMIC Technology, Inc. A625308 Series Recommended DC Operating Conditions (TA = 0°C to + 70°C) Symbol VCC GND VIH VIL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Min. 4.5 0 2.2 -0.3 Typ. 5.0 0 3.5 0 Max. 5.5 0 VCC + 0.3 +0.8 Unit V V V V Absolute Maximum Ratings* VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V Operating Temperature, Topr . . . . . . . . . . 0°C to +70°C Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . 0.7W Soldering Temp. & Time . . . . . . . . . . . . . 260°C, 10 sec *Comments Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (TA = 0°C to + 70°C, VCC = 5.0V ± 10%, GND = 0V) Symbol Parameter A625308-70L Min. ILI Input Leakage Current Output Leakage Current Max. 1 A625308-70S Min. Max. 1 µA VIN = GND to VCC CE = VIH or OE = VIH or W E = VIH VI/O = GND to VCC Unit Conditions ILO - 1 - 1 µA ICC Active Power Supply Current Dynamic Operating Current - 15 - 15 mA CE = VIL, II/O = 0mA ICC1 - 70 - 70 mA Min. Cycle, Duty = 100% CE = VIL, II/O = 0mA CE = VIL, VIH = VCC VIL = 0V, f = 1 MHz II/O = 0 mA ICC2 Dynamic Operating Current - 15 - 15 mA PRELIMINARY (December, 2000, Version 0.2) 3 AMIC Technology, Inc. A625308 Series DC Electrical Characteristics (continued) Symbol Parameter A625308-70L Min. ISB Supply Current Standby Power ISB1 Output Low Voltage Output High Voltage 100 25 µA Max. 3 A625308-70S Min. Max. 2 mA CE = VIH CE ≥ VCC - 0.2V VIN ≥ 0V Unit Conditions VOL - 0.4 - 0.4 V IOL = 2.1mA VOH 2.4 - 2.4 - V IOH = -1.0mA Truth Table Mode Standby Output Disable Read Write Note: X: H or L CE OE WE I/O Operation High Z High Z DOUT DIN Supply Current ISB, ISB1 ICC, ICC1, ICC2 ICC, ICC1, ICC2 ICC, ICC1, ICC2 H L L L X H L X X H H L Capacitance (TA = 25°C, f = 1.0 MHz) Symbol CIN* CI/O* Parameter Input Capacitance Input/Output Capacitance Min. Max. 6 8 Unit pF pF Conditions VIN = 0V VI/O = 0V * These parameters are sampled and not 100% tested. PRELIMINARY (December, 2000, Version 0.2) 4 AMIC Technology, Inc. A625308 Series AC Characteristics (TA = 0°C to +70°C, VCC = 5.0V ± 10%) Symbol Parameter Min. Read Cycle tRC tAA tACE tOE tCLZ tOLZ tCHZ tOHZ tOH Write Cycle tWC tCW tAS tAW tWP tWR tWHZ tDW tDH tOW Notes: Write Cycle Time Chip Enable to End of Write Address Set up Time Address Valid to End of Write Write Pulse Width Write Recovery Time Write to Output in High Z Data to Write Time Overlap Data Hold from Write Time Output Active from End of Write 70 60 0 60 50 0 30 0 5 30 ns ns ns ns ns ns ns ns ns ns Read Cycle Time Address Access Time Chip Enable Access Time Output Enable to Output Valid Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change 70 10 5 5 70 70 35 25 25 ns ns ns ns ns ns ns ns ns A625308-70L/70S Max. Unit tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels. PRELIMINARY (December, 2000, Version 0.2) 5 AMIC Technology, Inc. A625308 Series Timing Waveforms Read Cycle 1 (1) tRC Address tAA OE tOE tOLZ5 CE tOH tACE tCLZ5 DOUT tOHZ5 tCHZ5 Read Cycle 2 (1, 2, 4) tRC Address tAA tOH tOH DOUT PRELIMINARY (December, 2000, Version 0.2) 6 AMIC Technology, Inc. A625308 Series Timing Waveforms (continued) Read Cycle 3 (1, 3, 4) CE tACE tCLZ 5 tCHZ 5 DOUT Notes: 1. 2. 3. 4. 5. W E is high for Read Cycle. Device is continuously enabled, CE = VIL. Address valid prior to or coincident with CE transition low. OE = VIL. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. Write Cycle 1 (6) (Write Enable Controlled) tWC Address tAW tCW5 CE (4) tWR3 tAS1 tWP2 WE tDW tDH DIN tWHZ 7 tOW 7 DOUT PRELIMINARY (December, 2000, Version 0.2) 7 AMIC Technology, Inc. A625308 Series Timing Waveforms (continued) Write Cycle 2 (6) (Chip Enable Controlled) tWC Address tAW tCW5 CE tAS1 (4) tWR3 tWP2 WE tDW tDH DIN tWHZ7 DOUT Notes: 1. 2. 3. 4. tAS is measured from the address valid to the beginning of Write. A Write occurs during the overlap (tWP) of a low CE and a low W E . tWR is measured from the earliest of CE or W E going high to the end of the Write cycle. If the CE low transition occurs simultaneously with the W E low transition or after the W E transition, outputs remain in a high impedance state. 5. tCW is measured from the later of CE going low to the end of Write. 6. OE level is high or low. 7. Transition is measured ±500mV from steady. This parameter is sampled and not 100% tested. PRELIMINARY (December, 2000, Version 0.2) 8 AMIC Technology, Inc. A625308 Series AC Test Conditions Input Pulse Levels Input Rise And Fall Time Input and Output Timing Reference Levels Output Load 0V, 3.0V 5 ns 1.5V See Figure 1,2 +5V 1800Ω I/O I/O 1800Ω +5V 990Ω CL 30pF* 990Ω CL 5pF* * Including scope and jig. * Including scope and jig. Figure 1. Output Load Figure 2. Output Load for tCLZ tOLZ , tCHZ, tOHZ, tWHZ, and tow Data Retention Characteristics (TA = 0°C to 70°C) Symbol VDR Parameter VCC for Data Retention L Version ICCDR Data Retention Current S Version tCDR tR * A625308-70L ** A625308-70S Chip Disable to Data Retention Time Operation Recovery Time 0 5 10** ns See Retention Waveform ms ICCDR : Max. 20µA at TA = 0°C to +40°C ICCDR : Max. 3µA at TA = 0°C to +40°C Min. 2.0 Max. 5.5 50* µA Unit V Conditions CE ≥ VCC - 0.2V VCC = 3.0V, CE ≥ VCC - 0.2V VIN ≥ 0V Low VCC Data Retention Waveform DATA RETENTION MODE VCC 4.5V tCDR 4.5V tR VDR ≥ 2.0V VIH CE CE ≥ VDR - 0.2V VIH PRELIMINARY (December, 2000, Version 0.2) 9 AMIC Technology, Inc. A625308 Series Ordering Information Part No. A625308M-70L A625308M-70S A625308V-70L 70 A625308V-70S A625308R-70L A625308R-70S 70 70 70 25 100 25 28L TSOP (Forward) 28L TSOP (Reverse) 28L TSOP (Reverse) Access Time (ns) Operating Current Max. (mA) 70 70 70 Standby Current Max. (µA) 100 25 100 Package 28L SOP 28L SOP 28L TSOP (Forward) PRELIMINARY (December, 2000, Version 0.2) 10 AMIC Technology, Inc. A625308 Series Package Information SOP (W.B.) 28L Outline Dimensions 28 15 unit: inches/mm H E θ L 1 B 14 Detail F D c A2 S Seating Plane y D A1 y A e L1 See Detail F Dimensions in inches Symbol A A1 A2 B C D E e H L L1 S y θ Min 0.004 0.093 0.014 0.008 0.326 0.044 0.453 0.028 0.059 0° Nom 0.098 0.016 0.010 0.713 0.331 0.050 0.465 0.036 0.067 Max 0.112 0.103 0.020 0.012 0.728 0.336 0.056 0.477 0.044 0.075 0.047 0.004 8° Dimensions in mm Min 0.10 2.36 0.36 0.20 8.28 1.12 11.51 0.71 1.50 0° Nom 2.49 0.41 0.25 18.11 8.41 1.27 11.81 0.91 1.70 Max 2.85 2.62 0.51 0.30 18.49 8.53 1.42 12.12 1.12 1.91 1.19 0.10 8° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (December, 2000, Version 0.2) 11 AMIC Technology, Inc. A625308 Series Package Information TSOP 28L TYPE I (8 X 13.4mm) Outline Dimensions unit: inches/mm D1 1 28 A2 Detail "A" E A1 c θ L 14 D 15 y D e Detail "A" S b Dimensions in inches Symbol A A1 A2 b c E L D D1 e S y θ 0° Min 0.002 0.037 0.007 0.005 0.311 0.012 0.520 0.461 Nom 0.039 0.009 0.315 0.020 0.528 0.465 0.022 BSC 0.017 TYP 0.004 5° Max 0.049 0.041 0.011 0.008 0.319 0.028 0.536 0.469 Dimensions in mm Min 0.05 0.95 0.17 0.12 7.90 0.30 13.20 11.70 Nom 1.00 0.22 8.00 0.50 13.40 11.80 0.55 BSC 0.425 TYP 0° 0.10 5° Max 1.25 1.05 0.27 0.21 8.10 0.70 13.60 11.90 Notes: 1. The maximum value of dimension D1 includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (December, 2000, Version 0.2) 12 AMIC Technology, Inc. A