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A62L256M-70LLU

A62L256M-70LLU

  • 厂商:

    AMICC(欧密格)

  • 封装:

  • 描述:

    A62L256M-70LLU - 32K X 8 BIT LOW VOLTAGE CMOS SRAM - AMIC Technology

  • 数据手册
  • 价格&库存
A62L256M-70LLU 数据手册
A62L256 Series Preliminary Document Title 32K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 1.0 1.1 1.2 1.3 1.4 32K X 8 BIT LOW VOLTAGE CMOS SRAM History Initial issue Modify 28-pin DIP, SOP and TSOP packages outline dimensions. Modify 28-pin SOP and TSOP packages outline drawings and dimensions Add -LLU type Change operating voltage Vccmax from 3.3V to 3.6V Add Product Family in page 1 Delete ICC item Add ICC2(typ.) ICCDR(typ.) Change ISB1(typ.) ICCDR(max.) Change ordering information from ICC1 to ICC2 Issue Date September 01, 1997 January 20, 1998 June 17, 1998 April 11, 2001 November 30, 2001 Remark PRELIMINARY (November, 2001, Version 1.4) AMIC Technology, Inc. A62L256 Series Preliminary Features n External Operating Voltage: 2.7V to 3.6V n Access times: 55ns (max.): for VCC = 3.0V to 3.6V 70ns (max.): for VCC = 2.7V to 3.6V n Current: Operating (ICC1): -55 series 18mA (typ.) -70 series 12mA (typ.) Standby (ISB1): 0.05µA (typ.) n Extended operating temperature range: -40º C to +85º C for -LLU series n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2.0V (min.) n Available in 28-pin DIP, SOP and TSOP (forward and reverse type) packages 32K X 8 BIT LOW VOLTAGE CMOS SRAM General Description The A62L256 is a low operating current 262,144-bit static random access memory organized as 32,768 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Minimum standby power is drawn by this device when CE is at a high level, independent of the other input levels. Data retention is guaranteed at a power supply voltage as low as 2.0V. Product Family Product Family Operating Temperature VCC Range Speed Power Dissipation Data Retention Standby Operating (ICCDR, Typ.) (ISB1, Typ.) (ICC2, Typ.) 0.02µA 0.05µA 1mA Package Type 28L DIP 28L SOP 28L TSOP A62L256 -40°C ~ +85°C 2.7V~3.6V 55ns / 70ns 1. Typical values are measured at VCC = 3.0V, TA = 25°C and not 100% tested. 2. Data retention current VCC = 2.0V. Pin Configurations n DIP A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 n SOP A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 2 3 4 5 28 27 26 25 24 VCC WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 n TSOP OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ~ ~ 6 7 8 9 10 11 12 13 14 23 22 21 20 19 18 17 16 15 A62L256V PRELIMINARY (November, 2001, Version 1.4) 2 AMIC Technology, Inc. ~ ~ A3 A4 A5 A6 A7 A12 A14 VCC WE A13 A8 A9 A11 OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ~~ ~~ 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 VSS I/O2 I/O1 I/O0 A0 A1 A2 A62L256 A62L256M A62L256R 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A2 A1 A0 I/O0 I/O1 I/O2 VSS I/O3 I/O4 I/O5 I/O6 I/O7 CE A10 A62L256 Series Block Diagram A5 VCC GND ROW 512 X 512 MEMORY ARRAY A9 A11 A14 DECODER I/O 0 COLUMN I/O INPUT DATA CIRCUIT COLUMN DECODER I/O 7 A0 A4 A10 CE OE WE CONTORL CIRCUIT Pin Descriptions - DIP/SOP Pin No. 1-10, 21, 23-26 11-13, 15-19 14 20 22 27 28 Symbol A0 - A14 I/O0 - I/O7 GND CE OE WE VCC Description Address Input Data Input/Output Ground Chip Enable Output Enable Write Enable Power Supply Pin Description-TSOP Pin No. 1 2-5, 8-17, 28 7 6 18-20, 22-26 21 27 Symbol OE A0 - A14 VCC WE I/O0 - I/O7 GND CE Description Output Enable Address Input Power Supply Write Enable Data Input/Output Ground Chip Enable PRELIMINARY (November, 2001, Version 1.4) 3 AMIC Technology, Inc. A62L256 Series Recommended DC Operating Conditions (TA = 0°C to + 70°C or -40°C to +85°C) Symbol VCC GND VIH VIL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Min. 2.7 0 VCC * 0.7 -0.3 Typ. 3.0 0 0 Max. 3.6 0 VCC + 0.3 +0.3 Unit V V V V Absolute Maximum Ratings* VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to +3.6V IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V Operating Temperature, Topr . . . . . . . . . . 0°C to +70°C Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . 0.7W Soldering Temp. & Time . . . . . . . . . . . . . 260°C, 10 sec *Comments Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (TA = 0°C to + 70°C or -40º C to +85º C, VCC = 2.7V to 3.6V, GND = 0V) Symbol Parameter A62L256-55LL/55LLU Min. ILI Input Leakage Current Output Leakage Current Dynamic Operating Current Typ. Max. 1 A62L256-70LL/70LLU Min. Typ. Max. 1 µA VIN = GND to VCC Unit Conditions ILO - - 1 - - 1 µA CE = VIH or W E = VIL VI/O = GND to VCC Min. Cycle, Duty = 100% CE = VIL, II/O = 0mA CE = VIL, VIH = VCC VIL = 0V, f = 1 MHz II/O = 0 mA ICC1 - *18 25 - **12 20 mA ICC2 Dynamic Operating Current - 1 3 - 1 3 mA Typical values are measured at VCC = 3.0V, TA = 25°C and not 100% tested. * Testing condition : TA = 25°C, VCC = 3.0V, Cycle Time = 55 ns ** Testing condition : TA = 25°C, VCC = 3.0V, Cycle Time = 70 ns PRELIMINARY (November, 2001, Version 1.4) 4 AMIC Technology, Inc. A62L256 Series DC Electrical Characteristics (continued) Symbol Parameter A62L256-55LL/70LL Min. ISB Supply Current Standby Power ISB1 VOL Output Low Voltage Output High Voltage 0.05 2 0.3 0.05 5 0.3 µA V Typ. Max. 50 A62L256-55LLU/70LLU Min. Typ. Max. 50 µA CE = VIH CE ≥ VCC - 0.2V VIN ≥ 0V IOL = 2.1mA Unit Conditions VOH VCC - 0.3 - - VCC - 0.3 - - V IOH = -1.0mA Typical values are measured at VCC = 3.0V, TA = 25°C and not 100% tested. Truth Table Mode Standby Output Disable Read Write Note: X: H or L CE H L L L OE X H L X WE X H H L I/O Operation High Z High Z DOUT DIN Supply Current ISB, ISB1 ICC, ICC1, ICC2 ICC, ICC1, ICC2 ICC, ICC1, ICC2 Capacitance (TA = 25°C, f = 1.0 MHz) Symbol CIN* CI/O* Parameter Input Capacitance Input/Output Capacitance Min. Max. 6 8 Unit pF pF Conditions VIN = 0V VI/O = 0V These parameters are sampled and not 100% tested. PRELIMINARY (November, 2001, Version 1.4) 5 AMIC Technology, Inc. A62L256 Series AC Characteristics (TA = 0°C to +70°C or -40º C to +85º C) A62L256-55LL/LLU Symbol Parameter (VCC = 3.0V to 3.6V) Min. Read Cycle tRC tAA tACE tOE tCLZ tOLZ tCHZ tOHZ tOH Write Cycle tWC tCW tAS tAW tWP tWR tWHZ tDW tDH tOW Notes: Write Cycle Time Chip Enable to End of Write Address Set up Time Address Valid to End of Write Write Pulse Width Write Recovery Time Write to Output in High Z Data to Write Time Overlap Data Hold from Write Time Output Active from End of Write 55 50 0 50 40 0 25 0 5 25 70 60 0 60 50 0 30 0 5 25 ns ns ns ns ns ns ns ns ns ns Read Cycle Time Address Access Time Chip Enable Access Time Output Enable to Output Valid Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change 55 10 5 5 55 55 30 20 20 70 10 5 10 70 70 35 25 25 ns ns ns ns ns ns ns ns ns Max. A62L256-70LL/LLU (VCC = 2.7V to 3.6V) Min. Max. Unit tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels. PRELIMINARY (November, 2001, Version 1.4) 6 AMIC Technology, Inc. A62L256 Series Timing Waveforms Read Cycle 1 (1) tRC Address tAA OE tOE tOLZ5 CE tOH tACE tCLZ5 DOUT tOHZ5 tCHZ5 Read Cycle 2 (1, 2, 4) tRC Address tAA tOH tOH DOUT PRELIMINARY (November, 2001, Version 1.4) 7 AMIC Technology, Inc. A62L256 Series Timing Waveforms (continued) Read Cycle 3 (1, 3, 4) CE tACE tCLZ 5 tCHZ 5 DOUT Notes: 1. 2. 3. 4. 5. W E is high for Read Cycle. Device is continuously enabled, CE = VIL. Address valid prior to or coincident with CE transition low. OE = VIL. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. (6) Write Cycle 1 (Write Enable Controlled) tWC Address tAW tCW5 CE (4) tWR 3 tAS1 tWP 2 WE tDW tDH DIN tWHZ 7 tOW 7 DOUT PRELIMINARY (November, 2001, Version 1.4) 8 AMIC Technology, Inc. A62L256 Series Timing Waveforms (continued) Write Cycle 2 (Chip Enable Controlled) (6) tWC Address tAW tCW5 CE tAS1 (4) tWR 3 tWP 2 WE tDW tDH DIN tWHZ7 DOUT Notes: 1. 2. 3. 4. tAS is measured from the address valid to the beginning of Write. A Write occurs during the overlap (tWP) of a low CE and a low W E . tWR is measured form the earliest of CE or W E going high to the end of the Write cycle. If the CE low transition occurs simultaneously with the W E low transition or after the W E transition, outputs remain in a high impedance state. 5. tCW is measured from the later of CE going low to the end of Write. 6. OE level is high or low. 7. Transition is measured ±500mV from steady. This parameter is sampled and not 100% tested. PRELIMINARY (November, 2001, Version 1.4) 9 AMIC Technology, Inc. A62L256 Series AC Test Conditions Input Pulse Levels Input Rise And Fall Time Input and Output Timing Reference Levels Output Load 0V, VCC 5 ns VCC/2 See Figure 1 CL 30pF * Including scope and jig. Figure 1. Output Load Data Retention Characteristics (TA = 0°C to 70°C or -40º C to +85º C) Symbol VDR Parameter VCC for Data Retention LL-version LLU-version tCDR tR Chip Disable to Data Retention Time Operation Recovery Time Min. 2.0 0 tRC Typ. 0.02 0.02 Max. 3.6 0.5 µA 2 ns ns Unit V Conditions CE ≥ VCC - 0.2V VCC = 2V, CE ≥ VCC - 0.2V VIN ≥ 0V ICCDR Data Retention Current See Retention Waveform Typical values are measured at TA = 25°C. Low VCC Data Retention Waveform DATA RETENTION MODE VCC 3.0V tCDR 3.0V tR VCC ≥ 2.0V VIH CE CE ≥ VCC - 0.2V VIH PRELIMINARY (November, 2001, Version 1.4) 10 AMIC Technology, Inc. A62L256 Series Ordering Information Part No. A62L256-55LL A62L256M-55LL A62L256V-55LL A62L256R-55LL A62L256-70LL A62L256M-70LL A62L256V-70LL A62L256R-70LL A62L256-55LLU A62L256M-55LLU A62L256V-55LLU A62L256R-55LLU A62L256-70LLU A62L256M-70LLU A62L256V-70LLU A62L256R-70LLU 70 55 70 55 Access Time (ns) Operating Current (ICC2) Max. (mA) 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 Standby Current (ISB1) Max. (µA) 2 2 2 2 2 2 2 2 5 5 5 5 5 5 5 5 Package 28L DIP 28L SOP 28L TSOP (Forward) 28L TSOP (Reverse) 28L DIP 28L SOP 28L TSOP (Forward) 28L TSOP (Reverse) 28L DIP 28L SOP 28L TSOP (Forward) 28L TSOP (Reverse) 28L DIP 28L SOP 28L TSOP (Forward) 28L TSOP (Reverse) PRELIMINARY (November, 2001, Version 1.4) 11 AMIC Technology, Inc. A62L256 Series Package Information P-DIP 28L Outline Dimensions unit: inches/mm D 28 15 E1 1 S 14 E C A2 A A1 Base Plane Seating Plane B B1 e1 α eA L Dimensions in inches Symbol A A1 A2 B B1 C D E E1 e1 L α eA S Min 0.010 0.150 0.016 0.058 0.008 0.590 0.540 0.090 0.120 0° 0.630 Nom 0.155 0.018 0.060 0.010 1.460 0.600 0.545 0.100 0.130 0.650 Max 0.210 0.160 0.022 0.064 0.014 1.470 0.610 0.550 0.110 0.140 15° 0.670 0.090 Dimensions in mm Min 0.25 3.81 0.41 1.47 0.20 14.99 13.72 2.29 3.05 0° 16.00 Nom 3.94 0.46 1.52 0.25 37.08 15.24 13.84 2.54 3.30 16.51 Max 5.33 4.06 0.56 1.63 0.36 37.34 15.49 13.97 2.79 3.56 15° 17.02 2.29 Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E1 does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (November, 2001, Version 1.4) 12 AMIC Technology, Inc. A62L256 Series Package Information SOP (W.B.) 28L Outline Dimensions 28 15 unit: inches/mm H E θ L 1 B 14 Detail F D c A2 S Seating Plane y D A1 y A e L1 See Detail F Dimensions in inches Symbol A A1 A2 B C D E e H L L1 S y ο Min 0.004 0.093 0.014 0.008 0.326 0.044 0.453 0.028 0.059 0° Nom 0.098 0.016 0.010 0.713 0.331 0.050 0.465 0.036 0.067 Max 0.112 0.103 0.020 0.012 0.728 0.336 0.056 0.477 0.044 0.075 0.047 0.004 8° Dimensions in mm Min 0.10 2.36 0.36 0.20 8.28 1.12 11.51 0.71 1.50 0° Nom 2.49 0.41 0.25 18.11 8.41 1.27 11.81 0.91 1.70 Max 2.85 2.62 0.51 0.30 18.49 8.53 1.42 12.12 1.12 1.91 1.19 0.10 8° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (November, 2001, Version 1.4) 13 AMIC Technology, Inc. A62L256 Series Package Information TSOP 28L TYPE I (8 X 13.4mm) Outline Dimensions unit: inches/mm D1 1 28 A2 Detail "A" E A1 c θ L 14 D 15 y D e Detail "A" S b Dimensions in inches Symbol A A1 A2 b c E L D D1 e S y θ 0° Min 0.002 0.037 0.007 0.005 0.311 0.012 0.520 0.461 Nom 0.039 0.009 0.315 0.020 0.528 0.465 0.022 BSC 0.017 TYP 0.004 5° Max 0.049 0.041 0.011 0.008 0.319 0.028 0.536 0.469 Dimensions in mm Min 0.05 0.95 0.17 0.12 7.90 0.30 13.20 11.70 Nom 1.00 0.22 8.00 0.50 13.40 11.80 0.55 BSC 0.425 TYP 0° 0.10 5° Max 1.25 1.05 0.27 0.21 8.10 0.70 13.60 11.90 Notes: 1. The maximum value of dimension D1 includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (November, 2001, Version 1.4) 14 AMIC Technology, Inc. A
A62L256M-70LLU 价格&库存

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