PST360G2-1A-C0026-ERA040-05K

PST-360: Instructions for use HOW TO ORDER: PST360G2-1S-C0000-ERA360-05K OUTPUT TYPE: Simple - SPI Protocol ROTOR: 14mm OUTPUT FUNCTION: Curve 0000 SUPPLY VOLTAGE: 5V ± 10% TEMPERATURE: -40 ºC to +125 ºC SIGNAL OUTPUT 10% to 90% SPI Protocol (360º ERA) Connections scheme: Wire color Brown Blue Black White Grey Connection Recommended connections Power supply Vdd: 5V ± 10% Ground MOSI /SS SCLK -In order to minimize the possibility of short circuits, we recommend to connect the power supply at the end Signal output: Reference position: Rotor is shown at zero position To get more information about our full Legal Disclaimer and Limitation of Liability please visit www.piher.net/disclaimer_hollow_shaft.pdf. Users acknowledge that they have read this legal disclaimer and agree to abide by its terms. Piher Sensors & Controls SA *** confidential *** Polίgono Industrial Municipal, Vial T2, No 22, 31500 Tudela, Navarra, Spain Piher is an AmphenolTM company. RM Navarra Tomo 551, Folio 7, Hoja 5.580 CIF/VAT ESA31169907 Tel: +34 948 820 450 Fax: +34 948 824 050 www.piher.net Page 1 of 3 SPI Protocol information The PST-360 features a digital Serial protocol mode. The PST-360 is considered as a Slave node. The serial protocol of the PST-360 is a three wires protocol (/SS, SCLK, MOSI-MISO): • /SS pin is a 5V tolerant digital input. • SCLK pin is a 5V tolerant digital input. • MOSI-MISO pin is a 5V tolerant open drain digital input/output. 1. Timing To synchronize communication, the master deactives /SS high for at least t5 (1.5 ms). In this case, the Slave will be ready to receive a new frame. The master can re-synchronize at any time, even in the middle of a byte transfer. Note: Any time shorter that t5 leads to an undefined frame state, because the Slave may or may not have seen /SS inactive. Min (1) Timings t1 6.9 µs - t2 t4 37.5 µs 6.9 µs - t5 1500 µs - t5 0 ms - t6 6.9 µs - t7 t9 45 µs - < 1 µs < 16 µs TStartUp (1) Remarks Max No capacitive load on MISO. t1 is the minimum clock period for any bits within a byte. t2 the minimum time between any other byte. Time between last clock and /SS=high=chip de selection. Minimum /SS=Hi time where it’s guaranteed that a frame re-synchronizations will be started. Maximum /SS=Hi time where it’s guaranteed that NO frame re-synchronizations will be started. The time t6 defines the minimum time between /SS=Lo and the first clock edge. t7 is the minimum time between the StartByte and the Byte0. Maximum time between /SS=Hi and MISO Bus High-Impedance. Minimum time between reset-inactive and any master signal change. Timings shown for oscillator base frequency of 7MHz (Slow mode) 2. Slave Reset On internal soft failures the Slave resets after 1 second or after an (error) frame is sent. On internal hard failures the Slave resets itself. In that case, the Serial protocol will not come up. The serial protocol link is enabled only after the completion of the first synchronization (the Master deactivates /SS for at least 15). 3. Slave Start-Up The Slave start-up (after power-up or an internal failure) takes 16 ms. Within this time /SS and SCLK is ignored by the Slave. The first frame can therefore be sent after 16 ms. MISO is Hi-Z (i.e. Hi-Impedance) until the Slave is selected by its /SS input. MTS-360 will cope with any signal from the Master while starting up. To get more information about our full Legal Disclaimer and Limitation of Liability please visit www.piher.net/disclaimer_hollow_shaft.pdf. Users acknowledge that they have read this legal disclaimer and agree to abide by its terms. Piher Sensors & Controls SA *** confidential *** Polίgono Industrial Municipal, Vial T2, No 22, 31500 Tudela, Navarra, Spain Piher is an AmphenolTM company. RM Navarra Tomo 551, Folio 7, Hoja 5.580 CIF/VAT ESA31169907 Tel: +34 948 820 450 Fax: +34 948 824 050 www.piher.net Page 2 of 3 SPI Protocol information 4. Frame Layer 4.1. Command Device Mechanism Before each transmission of a data frame, the Master should send a byte AAh to enable a frame transfer. The latch point for the angle measurement is at the last clock before the first data frame byte. 4.2. Data Frame Structure A data frame consists of 10 bytes: • 2 start bytes (AAh followed by FFh) • 2 data bytes (DATA16 – most significant byte first) • 2 inverted data bytes (/DATA16 – most significant byte first) • 4 all-Hi bytes The Master should send AAh (55h in case of inverting transistor) followed by 9 bytes FFh. The Slave will answer with two bytes FFh followed by 4 data bytes and 4 bytes FFh. 4.3. Timing There are no timing limits for frames: a frame transmission could be initiated at any time. There is no inter-frame time defined. 4.4. Data structure The DATA16 could be a valid angle, or an error condition. The two meanings are distinguished by the LSB. 4.5. Angle Calculation All communication timing is independent (asynchronous) of the angle data processing. The angle is calculated continuously by the Slave: • Slow mode: every 1.5 ms at most. The last angle calculated is hold to be read by the Master at any time. Only valid angles are transferred by the Slave, because any internal failure of the Slave will lead to a soft reset. 4.6. Error handling In case of any errors listed in the previous table, the Serial protocol will be initialized and the error condition can be read by the master. The Slave will perform a soft reset once the error frame is sent. In case of any other errors (ROM CRC error, EEPROM CRC error, RAM check error, intelligent watchdog error …) the Slave’s serial protocol is not initialized. The MOSI/MISO pin will stay Hi-impedant (no error frames are sent). Information contained in and/or attached to this document may be subject to export control regulations of the European Community, USA, or other countries. Each recipient of this document is responsible to ensure that usage and/or transfer of any information contained in this document complies with all relevant export control regulations. If you are in any doubt about the export control restrictions that apply to this information, please contact the sender immediately. For any Piher Sensors & Controls SA Exports, Note: All products / technologies are EAR99 Classified commodities. Exports from the United States are in accordance with the Export Administration Regulations. Diversion contrary to US law is prohibited. To get more information about our full Legal Disclaimer and Limitation of Liability please visit www.piher.net/disclaimer_hollow_shaft.pdf. Users acknowledge that they have read this legal disclaimer and agree to abide by its terms. Tel: +34 948 820 450 Piher Sensors & Controls SA *** confidential *** Fax: +34 948 824 050 Polίgono Industrial Municipal, Vial T2, No 22, 31500 Tudela, Navarra, Spain www.piher.net Piher is an AmphenolTM company. RM Navarra Tomo 551, Folio 7, Hoja 5.580 CIF/VAT ESA31169907 Page 3 of 3