AS1105

A S 11 0 5 Serially Interfaced, 4-Digit LED Driver D a ta S he e t 1 General Description The AS1105 is an LED driver for 7-segment numeric displays of up to 4 digits. The AS1105 can be programmed via a conventional 4-wire serial interface. The device includes a BCD code-B decoder, a multiplex scan circuitry, segment and display drivers, and a 32-bit memory. The memory is used to store the LED settings, so that continuous reprogramming is not necessary. Every individual segment can be addressed and updated separately. Only one external resistor is required to set the current through the LED display. Brightness can be controlled either in an analog or digital way. The user can choose the internal code-B decoder to display numeric digits or to address each segment directly. The AS1105 features an extremely low shutdown current of only 20µA and an operational current of less than 500µA. The number of visible digits can be programmed as well. The AS1105 can be reset by software and an external clock can be used. Several test modes support easy debugging. AS1105 is offered in a 20-pin SOIC package. 2 Key Features ! Cost effective version of AS1100 functionality for applications up to 4-Digits 10MHz Serial Interface Individual LED Segment Control Decode/No-Decode Digit Selection 20µA Low-Power Shutdown (Data Retained) Extremely low Operating Current 0.5mA in open loop Digital and Analog Brightness Control Display Blanked on Power-Up Drive Common-Cathode LED Display Software Reset Optional External clock 20-pin SOIC Package ! ! ! ! ! ! ! ! ! ! ! 3 Applications The AS1105 is an ideal solution for Bar-Graph Displays, Industrial Controllers, Panel Meters, LED Matrix Displays and White Goods such as washing machines, dishwasher, etc. Figure 1. Typical Application Circuit +5V 9.53k VDD ISET DIFG0-DIG3 4 Digits MOSI µP I/O SCK DIN LOAD CLK GND SEG A-G SEP DP GND 8 Segments 4-Digit µP Display www.austriamicrosystems.com Revision 1.34 1 - 15 AS1105 Data Sheet - P i n A s s i g n m e n t s 4 Pin Assignments Figure 2. Pin Configuration (Top View) DOUT 1 DIN DIG0 GND DIG2 DIG3 GND DIG1 LOAD 2 3 4 5 6 7 8 9 20 SEG D 19 SEG DP 18 SEG E 17 SEG C VDD ISET SEG G SEG B SEG F SEG A 16 15 14 13 12 11 SO AS1105 CLK 10 Pin Descriptions Table 1. Pin Descriptions Pin Name DOUT DIN DIG0–DIG3 GND LOAD Pin Number 1 Description CLK SEG A–G, DP ISET VDD Serial data output for cascading drivers. The output is valid after 16.5 clock cycles. The output is never set to high impedance. Data input. Data is programmed into the 16-bit shift register on the rising 2 CLK edge. 4-digit driver lines that sink the current from the common cathode of the 3,8,5,6 display. In shutdown mode the AS1105 switches the outputs to VDD. 4,7 Both GND pins must be connected. Strobe input. With the rising edge of the LOAD signal the 16-bit of serial 9 data is latched into the register. Clock input. The interface is capable to support clock frequencies up to 10MHz. The serial data is clocked into the internal shift register with the 10 rising edge of the CLK signal. On the DOUT pin the data is applied with the falling edge of CLK. Seven segment driver lines including the decimal point. When a 11–14, 17–20 segment is turned off the output is connected to GND. The current into ISET determines the peak current through the segments and 15 therefore the brightness. Positive Supply Voltage (+5V) 16 www.austriamicrosystems.com Revision 1.34 2 - 15 AS1105 Data Sheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Table 2. Absolute Maximum Ratings Parameter VDD to GND DIN, CLK, LOAD to GND All Other pins to GND Current DIG0–DIG3 Sink Current SEGA–G, DP Source Current Continuous Power Dissipation (TA = +85°C) Wide SO Operating Temperature Range Storage Temperature Range -40 -65 941 +85 +150 mW ºC ºC The reflow peak soldering temperature (body temperature) is specified according IPC/JEDEC J-STD-020C “Moisture/Reflow Sensitivity Classification for non-hermetic Solid State Surface Mount Devices”. Derate 11.8mW/ºC above +70ºC 500 100 mA mA Min -0.3 -0.3 -0.3 Max +6 +6 VDD + 0.3 Units V V V Notes Package body temperature +260 ºC www.austriamicrosystems.com Revision 1.34 3 - 15 AS1105 Data Sheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics VDD = 5V, RSET = 9.53kΩ±1%, TA = TMIN to TMAX, unless otherwise noted. Table 3. Electrical Characteristics Symbol VDD IDDSD Parameter Operating Supply Voltage Shutdown Supply Current All digital inputs at VDD or GND, TA = +25ºC RSET = open circuit IDD fOSC IDIGIT ISEG ΔISEG IDIGIT ISEG IIH, IIL VIH VIL VOH VOL Operating Supply Current Display Scan Rate Digit Drive Sink Current Segment Drive Source Current Segment Drive Current Matching Digit Drive Source Current Segment Drive Sink Current Digit off, VDIGIT = (VDD -0.3V) Segment off, VSEG = 0.3V -2 5 VOUT = 0.65V TA = +25ºC, VOUT = (VDD -1V) All segments and decimal point on, ISEG = -40mA 500 320 -30 -40 3.0 -45 330 800 1300 Conditions Min 4.0 Typ 5.0 20 Max 5.5 50 500 Units V µA µA mA Hz mA mA % mA mA Logic Inputs Input Current DIN, CLK, LOAD Logic High Input Voltage Logic Low Input Voltage Output High Voltage Output Low Voltage Hysteresis Voltage Timing Characteristics tCP tCH tCL tCSH tDS tDH tDO tLDCK tCSW tDSPD CLK Clock Period CLK Pulse Width High CLK Pulse Width Low CLK Rise to LOAD Rise Hold Time DIN Setup Time DIN Hold Time Output Data Propagation Delay LOAD Rising Edge to Next Clock Rising Edge Minimum LOAD Pulse High Data-to-Segment Delay CLOAD = 50pF 50 50 2.25 100 50 50 0 25 0 25 ns ns ns ns ns ns ns ns ns ms DOUT, ISOURCE = -1mA DOUT, ISINK = 1.6mA DIN, CLK, LOAD 1 VDD - 1 0.4 VIN = 0V or VDD -1 3.5 0.8 1 µA V V V V V www.austriamicrosystems.com Revision 1.34 4 - 15 AS1105 Data Sheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics Figure 3. Segment Driver Capability, VDD = 5V, Logic Level = High 50 45 Figure 4. Segment Current versa RSET 50 45 40 Segment Current (mA) . 40 35 30 25 20 15 10 5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 ISEGMENT (mA) . 35 30 25 20 15 10 5 0 10 100 Voltage below VDD at output (V) RSET (kOhm) www.austriamicrosystems.com Revision 1.34 5 - 15 AS1105 Data Sheet - D e t a i l e d D e s c r i p t i o n 8 Detailed Description Serial-Addressing Modes The programming of the AS1105 is done via the 4-wire serial interface. A programming sequence consists of 16-bit packages. The data is shifted into the internal 16-Bit register with the rising edge of the CLK signal. With the rising edge of the LOAD signal, the data is latched into a digital or control register depending on the address. The LOAD signal must go to high after the 16th rising clock edge. The LOAD signal can also come later but just before the next rising edge of CLK, otherwise data would be lost. The content of the internal shift register is applied 16.5 clock cycles later to the DOUT pin. The data is clocked out at the falling edge of CLK. The Bits of the 16Bit-programming package are described in Table 4. The first 4 Bits D15-D12 are ”don’t care, D11-D8 contain the address and D7-D0 contain the data. The first bit is D15, the most significant bit (MSB). The exact timing is given in Figure 5. Figure 5. Timing Diagram tCS LOAD tC tC CLK tD tD DIN D15 D14 D1 tD DOUT D0 tC tC tLDC Table 4. Serial Data Format (16 Bits) D15 X D14 X D13 X D12 X D11 D10 D9 D8 D7 MSB D6 D5 D4 D3 Data D2 D1 D0 LSB Address Digit and Control Registers The AS1105 incorporates 12 registers, which are listed in Table 5. The digit and control registers are selected via the 4Bit address word. The 4 digit registers are realized with a 32bit memory. Each digit can be controlled directly without rewriting the whole contents. The control registers consist of decode mode, display intensity, number of scanned digits, shutdown, display test and reset/external clock register. Shutdown Mode The AS1105 features a shutdown mode, where it consumes only 20µA current. The shutdown mode is entered via a write to register 0Ch. Then all segment current sources are pulled to ground and all digit drivers are connected to VDD, so that nothing is displayed. All internal digit registers keep the programmed values. The shutdown mode can either be used for power saving or for generating a flashing display by repeatedly entering and leaving the shutdown mode. The AS1105 needs typically 250µs to exit the shutdown mode. During shutdown, the AS1105 is fully programmable. Only the display test function overrides the shutdown mode. www.austriamicrosystems.com Revision 1.34 6 - 15 AS1105 Data Sheet - D e t a i l e d D e s c r i p t i o n Initial Power-Up After powering up the system, all register are reset, so that the display is blank. The AS1105 starts the shutdown mode. All registers should be programmed for normal operation. The default settings enable only scan of one digit, the internal decoder is disabled, data register and intensity register are set to the minimum value. Decode-Mode Register In the AS1105, a BCD decoder is included. Every digit can be selected via register 09h to be decoded. The BCD code consists of the numbers 0-9, E,H, L,P and -. In register 09h, a logic high enables the decoder for the appropriate digit. In case that the decoder is bypassed (logic low), the data Bits D7-D0 correspond to the segment lines of the AS1105. In Table 7 some possible settings for register 09h are shown. Bit D7, which corresponds to the decimal point, is not affected by the settings of the decoder. Logic high means that the decimal point is displayed. In Table 8 the font of the Code B decoder is shown. In Table 10 the correspondence of the register to the appropriate segments of a 7 segment display is shown (see Figure 6). Intensity Control and Interdigit Blanking Brightness of the display can be controlled in an analog way by changing the external resistor (RSET). The current, which flows between VDD and ISET, defines the current that flows through the LEDs. The LED current is 100 times the ISET current. The minimum value of RSET should be 9.53kΩ, which corresponds to 40mA segment current. The brightness of the display can also be controlled digitally via register 0Ah. The brightness can be programmed in 16 steps and is shown in Table 10. An internal pulse width modulator controls the intensity of the display. Scan-Limit Register The scan limit register 0Bh selects the number of digits displayed. When all 4 digits are displayed the update frequency is typically 800Hz. If the number of digits displayed is reduced, the update frequency is reduced as well. The frequency can be calculated using 8fOSC/N, where N is the number of digits. Since the number of displayed digits influences the brightness, the resistor RSET should be adjusted accordingly. Table 12 shows the maximum allowed current, when fewer than 4 digits are used. To avoid differences in brightness the scan limit register should not be used to blank portions of the display (leading zeros). Table 5. Register Address Map Register No-Op Digit 0 Digit 1 Digit 2 Digit 3 Decode Mode Intensity Scan Limit Shutdown Not used Reset and ext. Clock Display Test Register D15-D12 X X X X X X X X X X X X D11 0 0 0 0 0 1 1 1 1 1 1 1 D10 0 0 0 0 1 0 0 0 1 1 1 1 D9 0 0 1 1 0 0 1 1 0 0 1 1 D8 0 1 0 1 0 1 0 1 0 1 0 1 Hex Code 0xX0 0xX1 0xX2 0xX3 0xX4 0xX9 0xXA 0xXB 0xXC 0xXD 0xXE 0xXF www.austriamicrosystems.com Revision 1.34 7 - 15 AS1105 Data Sheet - D e t a i l e d D e s c r i p t i o n Table 6. Shutdown Register Format (address (hex) = 0xXC) Mode Shutdown Mode Normal Operation Address Code (Hex) 0xXC 0xXC Register Data D7 X X D6 X X D5 X X D4 X X D3 X X D2 X X D1 X X D0 0 1 Table 7. Decode-mode Register Examples (address (hex) = 0xX9) Decode Mode No decode for digits 4–0 Code B decode for digit 0 No decode for digits 4–1 Code B decode for digits 3–0 Code B decode for digits 4–0 Table 8. Code B font 7-Segment Character 0 1 2 3 4 5 6 7 8 9 -E H L P blank Register Data D7 D6-D4 X X X X X X X X X X X X X X X X D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DP A 1 0 1 1 0 1 1 1 1 1 0 1 0 0 1 0 B 1 1 1 1 1 0 0 1 1 1 0 0 1 0 1 0 On Segments = 1 C 1 1 0 1 1 1 1 1 1 1 0 0 1 0 0 0 D 1 0 1 1 0 1 1 0 1 1 0 1 0 1 0 0 E 1 0 1 0 0 0 1 0 1 0 0 1 1 1 1 0 F 1 0 0 0 1 1 1 0 1 1 0 1 1 1 1 0 G 0 0 1 1 1 1 1 0 1 1 1 1 1 0 1 0 Register Data D7 0 0 0 1 D6 0 0 0 1 D5 0 0 0 1 D4 0 0 0 1 D3 0 0 1 1 D2 0 0 1 1 D1 0 0 1 1 D0 0 1 1 1 Hex Code 0x00 0x01 0x0F 0xFF Note: In the above table, the decimal point (DP) is set by bit D7 = 1 Table 9. No-decode mode data bits and corresponding segment lines Register Data D7 Corresponding Segment Line DP D6 A D5 B D4 C D3 D D2 E D1 F D0 G www.austriamicrosystems.com Revision 1.34 8 - 15 AS1105 Data Sheet - D e t a i l e d D e s c r i p t i o n Figure 6. Standard 7-segment LED A F G B E D C DP Table 10. Intensity Register Format (address (hex) = 0xXA) Duty Cycle 1/32 (min on) 3/32 5/32 7/32 9/32 11/32 13/32 15/32 17/32 19/32 21/32 23/32 25/32 27/32 29/32 31/32 (max on) D7 X X X X X X X X X X X X X X X X D6 X X X X X X X X X X X X X X X X D5 X X X X X X X X X X X X X X X X D4 X X X X X X X X X X X X X X X X D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Hex Code 0xX0 0xX1 0xX2 0xX3 0xX4 0xX5 0xX6 0xX7 0xX8 0xX9 0xXA 0xXB 0xXC 0xXD 0xXE 0xXF Table 11. Scan-limit register format (address (hex) = 0xXB) Scan Limit Display digit 0 only Display digits 0 & 1 Display digits 0 1 2 Display digits 0 1 2 3 Register Data D7 X X X X D6 X X X X D5 X X X X D4 X X X X D3 X X X X D2 0 0 0 0 D1 0 0 1 1 D0 0 1 0 1 Hex Code 0xX0 0xX1 0xX2 0xX3 www.austriamicrosystems.com Revision 1.34 9 - 15 AS1105 Data Sheet - D e t a i l e d D e s c r i p t i o n Display Test Register With the display test register 0Fh all LED can be tested. In the test mode all LEDs are switched on at maximum brightness (duty cycle 31/32). All programming of digit and control registers is maintained. The format of the register is given in Table 13. Table 12. Maximum segment current for 1-, 2-, or 3-digit displays Number of Digits Displayed 1 2 3 Table 13. Display-test register format (address (hex) = 0xXF) Mode Normal Operation Display Test Mode Register Data D7 X X D6 X X D5 X X D4 X X D3 X X D2 X X D1 X X D0 0 1 Maximum Segment Current (mA) 10 20 30 Note: The AS1105 remains in display-test mode until the display-test register is reconfigured for normal operation. No-Op Register (Cascading of AS1105) The no-operation register 00h is used when AS1105s are cascaded in order to support more than 4 digit displays. The cascading must be done in a way that all DOUT are connected to DIN of the following AS1105. The LOAD and CLK signals are connected to all devices. For a write operation for example to the fifth device the command must be followed by four no-operation commands. When the LOAD signal finally goes to high all shift registers are latched. The first four devices have got no-operation commands and only the fifth device sees the intended command and updates its register. Reset and external Clock Register This register is addressed via the serial interface. It allows to switch the device to external clock mode (If D0=1 the CLK pin of the serial interface operates as system clock input.) and to apply an external reset (D1). This brings all registers (except reg. E) to default state. For standard operation the register contents should be "00h". Table 14. Reset and external Clock register (address (hex) = 0xXE) Mode Normal Operation, internal clock Normal Operation, external clock Reset state, internal clock Reset state, external clock Address Code (hex) 0xXE 0xXE 0xXE 0xXE Register Data D7 X X X X D6 X X X X D5 X X X X D4 X X X X D3 X X X X D2 X X X X D1 0 0 1 1 D0 0 1 0 1 Table 15. RSET vs. segment current and LED forward voltage ISEG (mA) 40 30 20 10 VLED(V) 1.5 12.2kΩ 17.8kΩ 29.8kΩ 66.7kΩ 2.0 11.8kΩ 17.1kΩ 28.0kΩ 63.7kΩ 2.5 11.0kΩ 15.8kΩ 25.9kΩ 59.3kΩ 3.0 10.6kΩ 15.0kΩ 24.5kΩ 55.4kΩ 3.5 9.69kΩ 14.0kΩ 22.6kΩ 51.2kΩ www.austriamicrosystems.com Revision 1.34 10 - 15 AS1105 Data Sheet - A p p l i c a t i o n I n f o r m a t i o n 9 Application Information Supply Bypassing and Wiring In order to achieve optimal performance the AS1105 shall be placed very close to the LED display to minimize effects of electromagnetic interference and wiring inductance. Furthermore, it is recommended to connect a 10µF electrolytic and a 0.1µF ceramic capacitor between VDD and GND to avoid power supply ripple. Also, both GNDs must be connected to ground. Selecting RSET Resistor and Using External Drivers The current through the segments is controlled via the external resistor RSET. Segment current is about 100 times the current in ISET. The right values for ISET are given in Table 12. The maximum current the AS1105 can drive is 40mA. If higher currents are needed, external drivers must be used. In that case it is no longer necessary that the AS1105 drives high currents. A recommended value for RSET is 47kΩ. In cases that the AS1105 only drives few digits Table 10 specifies the maximum currents and RSET must be set accordingly. Refer to Absolute Maximum Ratings to calculate acceptable limits for ambient temperature, segment current, and the LED forward-voltage drop. 4x8 LED Dot Matrix Driver The example in Figure 7 uses the AS1105 to drive an 4x8 LED dot matrix. The LED columns have common cathode and are connected to the DIG0-3 outputs. The rows are connected to the segment drivers. Each of the 32 LEDs can be addressed separately. The columns are selected via the digits as shown in Table 5. The decode mode register (0xX9) has to be programmed to ‘00000000’ as stated in Table 7. The single LEDs in a column can be addressed as stated in Table 10, where D0 corresponds to segment G and D7 to segment DP. For a multiple digit dot matrix several AS1105 have to be cascaded. Figure 7. Application example as LED dot matrix driver Diode Arrangement SEG G SEG F SEG E SEG D SEG C SEG B SEG A SEG DP DIG 0 4x8 LED Dot SEG G SEG F SEG E SEG D SEG C SEG B SEG A SEG DP 4x8 LED Dot DIG 3 DIG 0 SEG A-G DIG 0-3 DOUT DIG 3 SEG A-G DIG 0-3 DOUT 1 µP 12 1 9 DIN LOA CLK GND GND ISET 18 9.53k VDD 19 VBAT 1 12 1 9 DIN LOA CLK GND GND VDD 19 VBAT ISET 18 9.53k www.austriamicrosystems.com Revision 1.34 11 - 15 AS1105 Data Sheet - A p p l i c a t i o n I n f o r m a t i o n Cascading Drivers The AS1105 can be cascaded as well. The DOUT pin must be connected to the DIN pin of the following AS1105. Table 16. Package Thermal Resistance Data Package 20 Wide SO Thermal Resistance (θJA) +85°C/W Maximum Junction Temperature (TJ) = +150°C Maximum Ambient Temperature (TA) = +85°C Computing Power Dissipation The upper limit for power dissipation (PD) for the AS1105 is determined from the following equation: PD = (VDD x 0.5mA) + (VDD - VLED)(DUTY x ISEG x N) Where: VDD = supply voltage DUTY = duty cycle set by intensity register N = number of segments driven (worst case is 4) VLED = LED forward voltage ISEG = segment current set by RSET Dissipation Example: ISEG = 40mA, N = 4, DUTY = 31/32, VLED = 1.8V at 40mA, VDD = 5.25V PD = 5.25V(0.5mA) + (5.25V - 1.8V)(31/32 x 40mA x 4) = 0.54W Thus, for a SO package θJA = +85ºC/W (see Table 13), the maximum allowed ambient temperature TA is given by: TJ,MAX = TA + PD x θJA = 150ºC = TA +0.54W x 85ºC/W Where: TA = +104ºC (EQ 2) (EQ 1) www.austriamicrosystems.com Revision 1.34 12 - 15 AS1105 Data Sheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 10 Package Drawings and Markings The device is available in a 20-pin SOIC package. Figure 8. SOIC-20 package drawings Table 17. SOIC-20 package dimensions Symbol A A1 A2 B C D E e Min 2.44 0.10 2.24 0.36 0.23 12.65 7.40 1.27 BSC Max 2.64 0.30 2.44 0.46 0.32 12.85 7.60 Symbol H h J K L R ZD α 0° 0.51 0.63 0.66 REF 8° Min 10.11 0.31 0.53 7° BSC 1.01 0.89 Max 10.51 0.71 0.73 www.austriamicrosystems.com Revision 1.34 13 - 15 AS1105 Data Sheet - O r d e r i n g I n f o r m a t i o n 11 Ordering Information The device is available as the standard products listed in Table 18. Table 18. Ordering Information Part AS1105WL AS1105WL-T Temp Range -40ºC to +85ºC -40ºC to +85ºC Package 20-pin SOIC 20-pin SOIC Delivery Form Tubes T&R www.austriamicrosystems.com Revision 1.34 14 - 15 AS1105 Data Sheet - O r d e r i n g I n f o r m a t i o n Copyrights Copyright © 1997-2007, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. 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No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact www.austriamicrosystems.com Revision 1.34 15 - 15