AS1106PE

A S 11 0 6 , A S 11 0 7 8-Digit LED Display Drivers D a ta S he e t 1 General Description The AS1106 and the AS1107 are compact display drivers for 7-segment numeric displays of up to 8 digits. The devices can be programmed via SPI, QSPI, and Microwire as well as a conventional 4-wire serial interface. The devices include an integrated BCD code-B/HEX decoder, multiplex scan circuitry, segment and display drivers, and a 64-bit memory. Internal memory stores the LED settings, eliminating the need for continuous device reprogramming. Every segment can be individually addressed and updated separately. Only one external resistor (RSET) is required to set the current through the LED display. LED brightness can be controlled by analog or digital means. The devices can be programmed to use the internal code-B/HEX decoder to display numeric digits or to directly address each segment. The AS1106 and the AS1107 feature an extremely low shutdown current of typically 3µA, and an operational current of less than 500µA. The number of digits can be programmed, the devices can be reset by software, and an external clock is also supported. Additionally, segment blinking can be synchronized across multiple drivers. Several test modes are available for easy application debugging. The devices are available in 24-pin DIP and 24-pin SOIC packages. 2 Key Features ! ! ! ! ! ! ! ! ! ! ! ! ! ! 10MHz SPI-, QSPI-, Microwire-Compatible Serial I/O Individual LED Segment Control Segment Blinking Control (can be synchronized across multiple drivers) Hexadecimal- or BCD-Code/No-Decode Digit Selection 3µA Low-Power Shutdown Current (typ; data retained) Extremely Low Operating Current 0.5mA in OpenLoop Digital and Analog Brightness Control Display Blanked on Power-Up Drive Common-Cathode LED Displays Low-EMI Low Slew-Rate Limited Segment Drivers (AS1107) Supply Voltage Range: 2.7 to 5.5V Software Reset Optional External Clock Packages: - 24-pin DIP - 24-pin SOIC 3 Applications The AS1106 and AS1107 are ideal for bar-graph displays, instrument-panel meters, LED matrix displays, dot matrix displays, set-top boxes, white goods, professional audio equipment, medical equipment, industrial controllers and panel meters. Figure 1. Typical Application Diagram +5V 9.53kΩ ISET I/O I/O SCK Microprocessor DIN LOAD/CSN CLK GND GND 8-Digit Microprocessor Display VDD DIG0 to DIG7 8 Digits AS1106/ AS1107 8 Segments SEG A to G SEP DP www.austriamicrosystems.com Revision 2.24 1 - 20 AS1106, AS1107 Data Sheet - P i n o u t 4 Pinout Pin Assignments Figure 2. DIP and SO Pin Assignments (Top View) DIN 1 DIG 0 2 DIG 4 3 GND 4 24 DOUT 23 SEG D 22 SEG DP 21 SEG E AS1106/ AS1107 DIG 6 5 DIG 2 6 DIG 3 7 DIG 7 8 GND 9 DIG 5 10 DIG 1 11 LOAD/CSN 12 20 SEG C 19 VDD 18 ISET 17 SEG G 16 SEG B 15 SEG F 14 SEG A 13 CLK Pin Descriptions Table 1. Pin Descriptions Pin Name DIN DIG 0:DIG 7 GND Pin Number 1 Description LOAD/CSN CLK SEG A:SEG G, SEG DP ISET VDD DOUT Serial-Data Input. Data is loaded into the internal 16-bit shift register on the rising edge of pin CLK. Digit Drive Lines. 8 Eight-digit drive lines that sink current from the display 2, 3, 5, 6, common cathode. The AS1106 pulls the digit outputs to VDD when turned 7, 8, 10, 11 off. The AS1107 digit drivers are high-impedance when turned off. 4, 9 Ground. Both GND pins must be connected. Load-Data Input (AS1106 only). The last 16 bits of serial data are latched on the rising edge of this pin. 12 Chip-Select Input (AS1107 or AS1106 SPI-enabled only). Serial data is loaded into the shift register while this pin is low. The last 16 bits of serial data are latched on the rising edge of this pin. Serial-Clock Input. 10MHz maximum rate. Data is shifted into the internal shift register on the rising edge of this pin. Data is clocked out of pin DOUT 13 on the falling edge of this pin. On the AS1107 or AS1106 SPI-enabled, the CLK input is active only while LOAD/CSN is low. Seven Segment and Decimal Point Drive Lines. 8 seven-segment drives 14, 15, 16, and decimal point drive that source current to the display. On the AS1106, 17, 20, 21, when a segment driver is turned off it is pulled to GND. The AS1107 22, 23 segment drivers are high-impedance when turned off. Set Segment Current. Connect to VDD through RSET to set the peak segment current (see Selecting RSET Resistor Value and Using External 18 Drivers on page 14). 19 Positive Supply Voltage. Connect to +2.7 to +5.5V supply. Serial-Data Output. The data into pin DIN is valid at pin DOUT 16.5 clock 24 cycles later. This pin is used to daisy-chain several AS1106/AS1107 devices and is never high-impedance. www.austriamicrosystems.com Revision 2.24 2 - 20 AS1106, AS1107 Data Sheet - A b s o l u t e Maximum Ratings 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Section 6 Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Parameter VDD Voltage (with respect to GND) All other pins DIG 0:DIG 7 Sink Current SEG A:SEG G, SEG DP Narrow plastic DIP Wide SOIC AS1106PL, AS1106WL Operating Temperature Ranges (TMIN toTMAX) AS1106PE, AS1106WE AS1107PL, AS1107WL Storage Temperature Range Package Body Temperature (Wide SOIC) Soldering Temperature (Narrow DIP) Humidity Electrostatic Discharge 3 2 1 Min -0.3 -0.3 Max 7 7 or VDD + 0.3 500 100 1066 941 Units V V mA mA mW mW ºC ºC ºC ºC ºC ºC % V V mA Notes Current Continuous Power Dissipation (TAMB = +85ºC) Derate 13.3mW/ºC above +70ºC Derate 11.8mW/ºC above +70ºC 0 -40 -40 -65 +70 +85 +85 +150 +260 +260 5 Digital outputs All other pins 4 85 1000 1000 ±200 Non-condensing Latch-Up Immunity All pins except AS1106 pin 14: ±180 mA 1. The reflow peak soldering temperature (body temperature) is specified according to IPC/JEDEC J-STD-020C “Moisture/Reflow Sensitivity Classification for non-hermetic Solid State Surface Mount Devices”. 2. Specified according JESD22-B106 “Resistance to Soldering Temperature for Through-Hole Mounted Devices”. 3. Norm: MIL 883 E method 3015. 4. Norm: JEDEC 17. www.austriamicrosystems.com Revision 2.24 3 - 20 AS1106, AS1107 Data Sheet - E l e c t r i c a l Characteristics 6 Electrical Characteristics Conditions: VDD = 2.7 to 5.5V, RSET = 9.53kΩ±1%, TAMB = TMIN to TMAX (unless otherwise specified). Table 3. Electrical Characteristics Parameter Operating Supply Voltage Shutdown Supply Current Symbol VDD IDDSD All digital inputs at VDD or GND, TAMB = +25ºC RSET = open circuit. Operating Supply Current Display Scan Rate Digit Drive Sink Current Segment Drive Source Current Segment Current Slew Rate (AS1107 only) Segment Drive Current Matching Digit Drive Leakage (AS1107 only) Segment Drive Leakage (AS1107 only) Digit Drive Source Current (AS1106 only) Segment Drive Sink Current (AS1106 only) Slow Segment Blink Period (ON phase, Internal Oscillator) Fast Segment Blink Period (ON phase, Internal Oscillator) Fast or Slow Segment Blink Duty Cycle (Guaranteed by design) Table 4. Logic Inputs/Outputs Characteristics Parameter Input Current DIN, CLK, LOAD/CSN Logic High Input Voltage Logic Low Input Voltage Symbol IIH, IIL VIH VIL VDD = 5.0V ± 10% VDD = 3.0V ± 10% DOUT, ISOURCE = -1mA, VDD = 5.0V ± 10% DOUT, ISOURCE = -1mA, VDD = 3.0V ± 10% DOUT, ISINK = 1.6mA DIN, CLK, LOAD/CSN 1 VDD - 1 V VDD - 0.5 0.4 V V Conditions VIN = 0V or VDD Min -1 0.7 x VDD 0.8 0.6 Typ Max 1 Unit µA V V IDD fOSC IDIGIT ISEG ΔISEG/Δt ΔISEG IDIGIT ISEG IDIGIT ISEG tSLOWBLINK tFASTBLINK Digit off, VDIGIT = VDD Segment off, VSEG = 0V Digit off, VDIGIT = (VDD - 0.3V) Segment off, VSEG = 0.3V -2 5 0.64 0.32 49.9 1 0.5 50 1.65 0.83 50.1 All segments and decimal point on; ISEG = -40mA. 8 digits scanned VOUT = 0.65V VDD = 5.0V, VOUT = (VDD -1V) TAMB = +25ºC, VDD = 5.0V, VOUT = (VDD -1V) 500 320 -30 10 -40 20 3.0 -10 1 -45 50 330 800 1300 Hz mA mA mA/µs % µA µA mA mA s s % Conditions Min 2.7 Typ 5.0 Max 5.5 10 1 Unit V µA mA Output High Voltage Output Low Voltage Hysteresis Voltage VOH VOL ΔVI www.austriamicrosystems.com Revision 2.24 4 - 20 AS1106, AS1107 Data Sheet - E l e c t r i c a l Characteristics Table 5. Timing Characteristics Parameter CLK Clock Period CLK Pulse Width High CLK Pulse Width Low CSM Fall to CLK Rise Setup Time (AS1107 or AS1106 SPI-programmed) CLK Rise to LOAD/CSN Rise Hold Time DIN Setup Time DIN Hold Time Output Data Propagation Delay LOAD Rising Edge to Next Clock Rising Edge (AS1106 only) Minimum LOAD/CSN Pulse High Data-to-Segment Delay Symbol tCP tCH tCL tCSS tCSH tDS tDH tDO tLDCK tCSW tDSPD Conditions Min 100 50 50 25 0 25 0 CLOAD = 50pF 50 50 2.25 25 Typ Max Unit ns ns ns ns ns ns ns ns ns ns ms Note: See Figure 12 on page 8 for more information. www.austriamicrosystems.com Revision 2.24 5 - 20 AS1106, AS1107 Data Sheet - T y p i c a l Operating Characteristics 7 Typical Operating Characteristics VDD = 5V, RSET = 9.53kΩ, TAMB = 25ºC (unless otherwise specified). Figure 3. Scan Frequency vs.Temperature 990 980 970 FOSC (Hz) 960 950 940 930 -40 -20 0 20 TAMB [°C] 40 60 80 FOSC (Hz) 950 940 930 920 910 900 2 3 4 VDD (V) 5 6 Figure 4. Scan Frequency vs. VDD 980 970 960 Figure 5. ISEG vs. Temperature 50 45 40 35 ISEG (mA) 30 25 20 15 10 5 0 -40 -20 0 20 TAMB (°C) 40 60 80 Figure 6. ISEG vs. VDD 60 50 VDD = 5V, VOUT = 2.4V VDD = 5V, VOUT = 4V 40 ISEG (mA) VOUT = 1.7V 30 VDD = 2.7V, VOUT = 2V VDD = 2.7V, VOUT = 2.4V VOUT = 4V 20 10 0 2 2.5 3 3.5 4 4.5 5 5.5 6 VDD (V) VOUT = 2.4V Figure 7. AS1106 Segment Output Current Intensity = 31/32 (0Fh) 50 45 40 35 ISEG (mA) 25 20 15 10 5 0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 Time (µs) 30 Figure 8. AS1107 Segment Output Current Intensity = 15/16 (0Fh) 50 45 40 35 ISEG (mA) 30 25 20 15 10 5 0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 Time (µs) www.austriamicrosystems.com Revision 2.24 6 - 20 AS1106, AS1107 Data Sheet - T y p i c a l Operating Characteristics Figure 9. ISEG vs. VOUT 50 45 40 35 ISEG (mA) Figure 10. ISEG vs. VOUT VDD = 2.7V RSET = 10kΩ 25 RSET = 10kΩ 20 25 20 15 10 5 0 0 0.5 1 1.5 RSET = 20kΩ ISEG (mA) 30 15 RSET = 20kΩ 10 RSET = 40kΩ RSET = 40kΩ 5 0 2 2.5 3 3.5 VOUT (V) 4 4.5 5 0 0.5 1 1.5 VOUT (V) 2 2.5 Figure 11. ISEG vs. RSET 60 VOUT = 2.4V 50 40 ISEG (mA) 30 20 VOUT = 4V VOUT = 2V VDD = 5V 10 VOUT = 1.7V 0 0 10 20 VDD = 2.7V 30 40 50 60 70 80 RSET (k Ω) www.austriamicrosystems.com Revision 2.24 7 - 20 AS1106, AS1107 Data Sheet - D e t a i l e d Description 8 Detailed Description AS1106 vs. AS1107 The AS1106 and AS1107 are identical except for two features: ! ! The AS1107 segment drivers are slew-rate limited to reduce electromagnetic interference (EMI). The AS1107 serial interface is fully SPI compatible (programmable for AS1106). Serial-Addressing Format Programming the AS1106/AS1107 is done by writing to the device’s internal registers (see Digit- and Control-Registers on page 9) via the 4-wire serial interface. A programming sequence consists of 16-bit packages as listed in Table 6. The data is shifted into the internal 16-bit register with the rising edge of the CLK signal. With the rising edge of the LOAD/CSN signal the data is latched into a digit- or control-register. The LOAD/CSN signal must go high after the 16th rising clock edge. The LOAD/CSN signal can also come later but this must happen just before the next rising edge of CLK, otherwise the data will be lost. The contents of the internal shift register are applied 16.5 clock cycles later to pin DOUT. The data is clocked out at the falling edge of CLK. The first 4 bits (D15:D12) are “don't care”, bits D11:D8 contain the register address, and bits D7:D0 contain the data. The first bit is D15, the most significant bit (MSB). The exact timing is shown in Figure 12. Table 6. 16-Bit Serial Data Format D15 X D14 X D13 X D12 X D11 D10 D9 D8 D7 Register Address (see Table 7) MSB D6 D5 D4 D3 Data D2 D1 D0 LSB Initial Power-Up On initial power-up, the AS1106/AS1107 registers are reset to their default values, the display is blanked, and the device goes into shutdown mode. At this time, all registers should be programmed for normal operation. Note: The default settings enable only scanning of one digit; the internal decoder is disabled and the Intensity Control Register (see page 12) is set to the minimum values. Figure 12. Interface Timing LOAD/ CSN tCSH tCSS tCP tCL tCH tLDCK tCSW CLK tDS tDH DIN D15 D14 D1 D0 tDO DOUT www.austriamicrosystems.com Revision 2.24 8 - 20 AS1106, AS1107 Data Sheet - D e t a i l e d Description Shutdown Mode The AS1106/AS1107 devices feature a shutdown mode, where they consume only 10µA (max) current. Shutdown mode is entered via a write to the Shutdown Register (see Table 8). For the AS1106, at that point, all segment current sources are pulled to ground and all digit drivers are connected to VDD, so that all segments are blanked. The AS1107 behavior is identical except the drivers are high impedance. Note: During shutdown mode the Digit-Registers maintain their data. Shutdown mode can either be used as a means to reduce power consumption or for generating a flashing display (repeatedly entering and leaving shutdown mode). For minimum supply current in shutdown mode, logic input should be at GND or VDD (CMOS logic level). The devices need typically 250µs to exit shutdown mode, and during shutdown mode the AS1106/AS1107 is fully programmable. Only the display test mode (see page 11) overrides shutdown mode. When entering or leaving shutdown mode, the Feature Register is reset to its default values (all 0s) when Shutdown Register bit D7 (page 10) = 0. 1 Note: If the AS1106/AS1107 is used with an external clock, Shutdown Register bit D7 should be set to 1 when writing to the Shutdown Register. Digit- and Control-Registers The AS1106/AS1107 devices contain 8 Digit-Registers and 6 control-registers, which are listed in Table 7. All registers are selected using a 4-bit address word, and communication is done via the serial interface. ! Digit Registers – These registers are realized with an on-chip 64-bit memory. Each digit can be controlled directly without rewriting the whole register contents. Control Registers – These registers consist of decode mode, display intensity, number of scanned digits, shutdown, display test and features selection registers. ! Table 7. Register Address Map Register No-Op Digit 0 Digit 1 Digit 2 Digit 3 Digit 4 Digit 5 Digit 6 Digit 7 Decode-Mode Intensity Control Scan Limit Shutdown N/A Feature Display Test HEX Code 0xX0 0xX1 0xX2 0xX3 0xX4 0xX5 0xX6 0xX7 0xX8 0xX9 0xXA 0xXB 0xXC 0xXD 0xXE 0xXF Address D15:D12 X X X X X X X X X X X X X X X X D11 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D10 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D9 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D8 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Page 13 N/A N/A N/A N/A N/A N/A N/A N/A 10 12 12 10 N/A 13 11 1. When Shutdown Register bit D7 = 1, the Feature Register is left unchanged when entering or leaving shutdown mode. www.austriamicrosystems.com Revision 2.24 9 - 20 AS1106, AS1107 Data Sheet - D e t a i l e d Description Shutdown Register (0xXC) The Shutdown Register controls AS1106/AS1107 shutdown mode (see Shutdown Mode on page 9). Table 8. Shutdown Register Format (Address (HEX) = 0xXC)) Mode Shutdown Mode, Reset Feature Register to Default Settings Shutdown Mode, Feature Register Unchanged Normal Operation, Reset Feature Register to Default Settings Normal Operation, Feature Register Unchanged HEX Code 0x00 0x80 0x01 0x81 Register Data D7 0 1 0 1 D6 X X X X D5 X X X X D4 X X X X D3 X X X X D2 X X X X D1 X X X X D0 0 0 1 1 Decode Enable Register (0xX9) The Decode Enable Register sets the decode mode. BCD/HEX decoding (either BCD code – characters 0:9, E, H, L, P, and -, or HEX code – characters 0:9 and A:F) is selected by bit D2 (page 13) of the Feature Register. The Decode Enable Register is used to select the decode mode or no-decode for each digit. Each bit in the Decode Enable Register corresponds to its respective display digit (i.e., bit D0 corresponds to digit 0, bit D1 corresponds to digit 1 and so on). Table 10 lists some examples of the possible settings for the Decode Enable Register bits. Note: A logic high enables decoding and a logic low bypasses the decoder altogether. When decode mode is used, the decoder looks only at the lower-nibble (bits D3:D0) of the data in the Digit-Registers, disregarding bits D6:D4. Bit D7 sets the decimal point (SEG DP) independent of the decoder and is positive logic (bit D7 = 1 turns the decimal point on). Table 10 lists the code-B font; Table 11 lists the HEX font. When no-decode mode is selected, data bits D7:D0 of the Digit-Registers correspond to the segment lines of the AS1106/AS1107. Table 12 shows the 1:1 pairing of each data bit to the appropriate segment line. Table 9. Decode Enable Register Format (Address (HEX) = 0xX9)) Decode Mode No decode for digits 7:0 Code-B/HEX decode for digit 0. No decode for digits 7:1 Code-B/HEX decode for digits 3:0. No decode for digits 7:4 Code-B/HEX decode for digits 7:0 HEX Code 0x00 0x01 0x0F 0xFF D7 0 0 0 1 D6 0 0 0 1 Register Data D5 D4 D3 D2 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 D1 0 0 1 1 D0 0 1 1 1 Figure 13. Standard 7-Segment LED Intensity Control and Inter-Digit Blanking A F G E D C DP B Table 10. Code-B Font 7-Segment Character 0 1 2 3 4 Register Data D7 † On Segments = 1 D1 0 0 1 1 0 D0 0 1 0 1 0 DP † D6:D4 X X X X X D3 0 0 0 0 0 D2 0 0 0 0 1 A 1 0 1 1 0 B 1 1 1 1 1 C 1 1 0 1 1 D 1 0 1 1 0 E 1 0 1 0 0 F 1 0 0 0 1 G 0 0 1 1 1 www.austriamicrosystems.com Revision 2.24 10 - 20 AS1106, AS1107 Data Sheet - D e t a i l e d Description Table 10. Code-B Font (Continued) 7-Segment Character 5 6 7 8 9 E H L P Blank † Register Data D7 † On Segments = 1 D1 0 1 1 0 0 1 1 0 0 1 1 D0 1 0 1 0 1 0 1 0 1 0 1 DP † D6:D4 X X X X X X X X X X X D3 0 0 0 1 1 1 1 1 1 1 1 D2 1 1 1 0 0 0 0 1 1 1 1 A 1 1 1 1 1 0 1 0 0 1 0 B 0 0 1 1 1 0 0 1 0 1 0 C 1 1 1 1 1 0 0 1 0 0 0 D 1 1 0 1 1 0 1 0 1 0 0 E 0 1 0 1 0 0 1 1 1 1 0 F 1 1 0 1 1 0 1 1 1 1 0 G 1 1 0 1 1 1 1 1 0 1 0 The decimal point is enabled by setting bit D7 = 1. Table 11. HEX Font 7-Segment Character 0 1 2 3 4 5 6 7 8 9 A b C d E F † Register Data D7 † On Segments = 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DP † D6:D4 X X X X X X X X X X X X X X X X D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A 1 0 1 1 0 1 1 1 1 1 1 0 1 0 1 1 B 1 1 1 1 1 0 0 1 1 1 1 0 0 1 0 0 C 1 1 0 1 1 1 1 1 1 1 1 1 0 1 0 0 D 1 0 1 1 0 1 1 0 1 1 0 1 1 1 1 0 E 1 0 1 0 0 0 1 0 1 0 1 1 1 1 1 1 F 1 0 0 0 1 1 1 0 1 1 1 1 1 0 1 1 G 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 1 The decimal point is enabled by setting bit D7 = 1. Table 12. No-Decode Mode Data Bits and Corresponding Segment Lines Corresponding Segment Line D7 DP D6 A D5 B D4 C D3 D D2 E D1 F D0 G Display-Test Register (0xXF) The AS1106/AS1107 devices can operate in two modes: normal mode and display test mode. In display test mode all LEDs are switched on at maximum brightness (duty cycle is 15/16 (AS1106) or 31/32 (AS1107). The devices remain in display-test mode until the Display-Test Register is set for normal operation. Note: All settings of the digit- and control-registers are maintained. Table 13. Display-Test Register Format (Address (HEX) = 0xXF)) Mode Normal Operation Display Test Mode D7 X X D6 X X D5 X X Register Data D4 D3 X X X X D2 X X D1 X X D0 0 1 www.austriamicrosystems.com Revision 2.24 11 - 20 AS1106, AS1107 Data Sheet - D e t a i l e d Description Intensity Control Register (0xXA) The brightness of the display can be controlled by digital means using the Intensity Control Register and by analog means using RSET (see Selecting RSET Resistor Value and Using External Drivers on page 14). Display brightness is controlled by an integrated pulse-width modulator which is controlled by the lower-nibble of the Intensity Control Register. The modulator scales the average segment-current in 16 steps from a maximum of 31/32 down to 1/32 (15/16 to 1/16 for the AS1107) of the peak current set by RSET. Table 14. Intensity Register Format (Address (HEX) = 0xXA)) Duty Cycle AS1106 AS1107 1/32 (min on) 1/16 (min on) 3/32 2/16 5/32 3/16 7/32 4/16 9/32 5/16 11/32 6/16 13/32 7/16 15/32 8/16 17/32 9/16 19/32 10/16 21/32 11/16 23/32 12/16 25/32 13/16 27/32 14/16 29/32 15/16 31/32 (max on) 15/16 (max on) HEX Code 0xX0 0xX1 0xX2 0xX3 0xX4 0xX5 0xX6 0xX7 0xX8 0xX9 0xXA 0xXB 0xXC 0xXD 0xXE 0xXF D7 X X X X X X X X X X X X X X X X D6 X X X X X X X X X X X X X X X X D5 X X X X X X X X X X X X X X X X Register Data D4 D3 X 0 X 0 X 0 X 0 X 0 X 0 X 0 X 0 X 1 X 1 X 1 X 1 X 1 X 1 X 1 X 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Scan-Limit Register (0x0B) The Scan-Limit Register controls which of the digits are to be displayed. When all 8 digits are to be displayed, the update frequency is typically 800Hz. If the number of digits displayed is reduced, the update frequency is increased. The frequency can be calculated using 8fOSC/N, where N is the number of digits. Since the number of displayed digits influences the brightness, RSET should be adjusted accordingly. Table 16 lists the maximum allowed current when fewer than 4 digits are used. Note: To avoid differences in brightness this register should not be used to blank parts of the display (leading zeros). Table 15. Scan-Limit Register Format (Address (HEX) = 0xXB)) Scan Limit Display digit 0 only (see Table 16) Display digits 0:1 (see Table 16) Display digits 0:2 (see Table 16) Display digits 0:3 Display digits 0:4 Display digits 0:5 Display digits 0:6 Display digits 0:7 HEX Code 0xX0 0xX1 0xX2 0xX3 0xX4 0xX5 0xX6 0xX7 D7 X X X X X X X X D6 X X X X X X X X D5 X X X X X X X X Register Data D4 D3 X X X X X X X X X X X X X X X X D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 Table 16. Maximum Segment Current for 1-, 2-, or 3-Digit Displays Number of Digits Displayed 1 2 3 Maximum Segment Current (mA) 10 20 30 www.austriamicrosystems.com Revision 2.24 12 - 20 AS1106, AS1107 Data Sheet - D e t a i l e d Description Feature Register (0xXE) The Feature Register is used for enabling various features including switching the device into external clock mode, applying an external reset, selecting code-B or HEX decoding, enabling or disabling blinking, enabling or disabling the SPI-compatible interface (AS1106 only), setting the blinking rate, and resetting the blink timing. Note: At power-up the Feature Register is initialized to 0. Table 17. Feature Register Summary D7 blink_ start D6 sync D5 blink_ freq_sel D4 blink_en D3 spi_en D2 decode_sel D1 reg_res D0 clk_en Table 18. Feature Register Bit Descriptions (Address (HEX) = 0xXE)) Addr: 0xXE Bit D0 Feature Register Enables and disables various device features. Bit Name Default Access Bit Description External clock active. clk_en 0 R/W 0 = Internal oscillator is used for system clock. 1 = Pin CLK of the serial interface operates as system clock input. Resets all control registers except the Feature Register. 0 = Reset Disabled. Normal operation. reg_res 1 = All control registers are reset to default state (except the Feature 0 R/W Register) identically after power-up. Note: The Digit Registers maintain their data. Selects display decoding. 0 = Enable Code-B decoding (see Table 10 on page 10). decode_sel 0 R/W 1 = Enable HEX decoding (see Table 11 on page 11). Enables the SPI-compatible interface. 0 = Disable SPI-compatible interface (AS1106 only). spi_en 0 R/W 1 = Enable the SPI-compatible interface (AS1106 only). Note: The SPI-compatible interface is always enabled in the AS1107. Enables blinking. blink_en 0 = Disable blinking. 0 R/W 1 = Enable blinking. Sets blink with low frequency (with the internal oscillator enabled): 0 = Blink period typically is 1 second (0.5s on, 0.5s off). blink_freq_sel 0 R/W 1 = Blink period is 2 seconds (1s on, 1s off). Synchronizes blinking on the rising edge of pin LOAD/CSN. The multiplex and blink timing counter is cleared on the rising edge of pin sync 0 R/W LOAD/CSN. By setting this bit in multiple AS1106/AS1107 devices, the blink timing can be synchronized across all the devices. Start Blinking with display enabled phase. When bit D4 (blink_en) is set, bit D7 determines how blinking starts. blink_start 0 R/W 0 = Blinking starts with the display turned off. 1 = Blinking starts with the display turned on. D1 D2 D3 D4 D5 D6 D7 No-Op Register (0xX0) The No-Op Register is used when multiple AS1106 or AS1107 devices are cascaded in order to support displays with more than 8 digits. The cascading must be done in such a way that all DOUT pins are connected to DIN of the next AS1106/AS1107 (see Figure 14 on page 16). The LOAD/CSN and CLK signals are connected to all devices. For example, if five devices are cascaded, in order to perform a write operation to the fifth device, the write-command must be followed by four no-operation commands. When the LOAD/CSN signal goes high, all shift registers are latched. The first four devices will receive no-operation commands and only the fifth device will receive the intended operation command, and subsequently update its register. www.austriamicrosystems.com Revision 2.24 13 - 20 AS1106, AS1107 Data Sheet - T y p i c a l Application 9 Typical Application Supply Bypassing and Wiring In order to achieve optimal performance the AS1106/AS1107 should be placed very close to the LED display to minimize effects of electromagnetic interference and wiring inductance. Furthermore, it is recommended to connect a 10µF electrolytic and a 0.1µF ceramic capacitor between pins VDD and GND to avoid power supply ripple (see Figure 14 on page 16). Note: Both GND pins must be connected to ground. Selecting RSET Resistor Value and Using External Drivers Brightness of the display segments is controlled via RSET. The current that flows between VDD and ISET defines the current that flows through the LEDs. Segment current is about 200 times the current in ISET. Typical values for RSET for different segment currents, operating voltages, and LED voltage drop (VLED) are given in Tables 19 - 23. The maximum current the AS1106/AS1107 devices can drive is 40mA. If higher currents are needed, external drivers must be used, in which case it is no longer necessary that the devices drive high currents. In cases where the devices only drive a few digits, Table 16 specifies the maximum currents, and RSET must be set accordingly. Note: The display brightness can also be logically controlled (see Intensity Control Register (0xXA) on page 12). Table 19. RSET vs. Segment Current and LED Forward Voltage, VDD = 2.7V ISEG (mA) 40 30 20 10 VLED(V) 1.5 5kΩ 6.9kΩ 10.7kΩ 22.2kΩ 2.0 4.4kΩ 5.9kΩ 9.6kΩ 20.7kΩ Table 20. RSET vs. Segment Current and LED Forward Voltage, VDD = 3.3V ISEG (mA) 40 30 20 10 1.5 6.7kΩ 9.1kΩ 13.9kΩ 28.8kΩ VLED(V) 2.0 6.4kΩ 8.8kΩ 13.3kΩ 27.7kΩ 2.5 5.7kΩ 8.1kΩ 12.6kΩ 26kΩ Table 21. RSET vs. Segment Current and LED Forward Voltage, VDD = 3.6V ISEG (mA) 40 30 20 10 VLED(V) 1.5 7.5kΩ 10.18kΩ 15.6kΩ 31.9kΩ 2.0 7.2kΩ 9.8kΩ 15kΩ 31kΩ 2.5 6.6kΩ 9.2kΩ 14.3kΩ 29.5kΩ 3.0 5.5kΩ 7.5kΩ 13kΩ 27.3kΩ Table 22. RSET vs. Segment Current and LED Forward Voltage, VDD = 4.0V ISEG (mA) 40 30 1.5 8.6kΩ 11.6kΩ 2.0 8.3kΩ 11.2kΩ VLED(V) 2.5 7.9kΩ 10.8kΩ 3.0 7.6kΩ 9.9kΩ 3.5 5.2kΩ 7.8kΩ www.austriamicrosystems.com Revision 2.24 14 - 20 AS1106, AS1107 Data Sheet - T y p i c a l Application Table 22. RSET vs. Segment Current and LED Forward Voltage, VDD = 4.0V (Continued) ISEG (mA) 20 10 1.5 17.7kΩ 36.89kΩ 2.0 17.3kΩ 35.7kΩ VLED(V) 2.5 16.6kΩ 34.5kΩ 3.0 15.6kΩ 32.5kΩ 3.5 13.6kΩ 29.1kΩ Table 23. RSET vs. Segment Current and LED Forward Voltage, VDD = 5.0V ISEG (mA) 40 30 20 10 VLED (V) 1.5 11.35kΩ 15.4kΩ 23.6kΩ 48.9kΩ 2.0 11.12kΩ 15.1kΩ 23.1kΩ 47.8kΩ 2.5 10.84kΩ 14.7kΩ 22.6kΩ 46.9kΩ 3.0 10.49kΩ 14.4kΩ 22kΩ 45.4kΩ 3.5 10.2kΩ 13.6kΩ 21.1kΩ 43.8kΩ 4.0 9.9kΩ 13.1kΩ 20.2kΩ 42kΩ Table 24. Package Thermal Data Package 24 Narrow DIP 24 Wide SOIC Thermal Resistance (ΘJA) +75°C/W +85°C/W Calculating Power Dissipation The upper limit for power dissipation (PD) for the AS1106/AS1107 is determined from the following equation: PD = (VDD x 1mA) + (VDD - VLED)(DUTY x ISEG x N) Where: VDD is the supply voltage. DUTY is the duty cycle set by intensity register (page 12). N is the number of segments driven (worst case is 8) VLED is the LED forward voltage ISEG = segment current set by RSET Dissipation Example: ISEG = 40mA, N = 8, DUTY = 31/32, VLED = 1.8V at 40mA, VDD = 5.25V PD = 5.25V(1mA) + (5.25V - 1.8V)(31/32 x 40mA x 8) = 1.075W Thus, for a PDIP package ΘJA = +75°C/W (from Table 24), the maximum allowed TAMB is given by: TJ,MAX = TAMB + PD x ΘJA = 150°C = TAMB +1.07W x 75°C/W Where: TAMB = +69.4°C. The TAMB limit for SO Packages in the dissipation example above is +58.6°C. (EQ 4) (EQ 2) (EQ 3) (EQ 1) www.austriamicrosystems.com Revision 2.24 15 - 20 AS1106, AS1107 Data Sheet - T y p i c a l Application 8x8 LED Dot Matrix Driver The application example in Figure 14 shows the AS1106 as an 8x8 LED dot matrix driver. The LED columns have common cathodes and are connected to the DIG0:7 outputs. The rows are connected to the segment drivers. Each of the 64 LEDs can be addressed separately. The columns are selected via the digits as listed in Table 7 on page 9. The Decode Enable Register (see page 10) must be set to ‘00000000’ as described in Table 9 on page 10. Single LEDs in a column can be addressed as described in Table 12 on page 11, where bit D0 corresponds to segment G and bit D7 corresponds to segment DP. Note: For a multiple-digit dot matrix, multiple AS1106 devices must be cascaded. Figure 14. Application Example as LED Dot Matrix Driver 8x8 LED Dot Matrix Diode Arrangement SEG G SEG F SEG E SEG D SEG C SEG B SEG A SEG DP SEG G SEG F SEG E SEG D SEG C SEG B SEG A SEG DP 8x8 LED Dot Matrix SEG A:G DIG0:7 SEG DP DOUT DIN MicroProcessor LOAD/CSN CLK GND ISET GND VDD VBAT 9.53kΩ SEG A:G DIG0:7 SEG DP DIN LOAD/CSN CLK GND VDD VBAT 9.53kΩ ISET GND Cascading Drivers The example in Figure 4 drives 2 dot matrix digits using a 4-wire microprocessor interface. All Scan-Limit Registers should be set to the same value so that one display will not appear brighter than the other. For example, to display 12 digits, set both Scan-Limit Registers to display 6 digits so that both displays have a 1/6 duty cycle per digit. If 11 digits are needed, set both Scan-Limit Registers to display 6 digits and leave one digit unconnected. Otherwise, if one driver is set to display 6 digits and the other to display 5 digits one display will appear brighter because its duty cycle per digit will be 1/5 and the other display’s duty cycle will be 1/6. Note: Refer to No-Op Register (0xX0) on page 13 for additional information. www.austriamicrosystems.com Revision 2.24 16 - 20 AS1106, AS1107 Data Sheet - P a c k a g e Drawings and Markings 10 Package Drawings and Markings The AS1106 and AS1107 are available in 24-pin DIP and 24-pin SOIC packages. Figure 15. 24-pin DIP Package Symbol B B1 C D D1 E ID ID1 E1 eA e1 L R T T1 T2 W Min 0.18 0.050 0.10 1.160 0.30 .295 0.64 0.64 .260 .320 0.10 .125 .030 .130 .060 .060 .030 REF 7º 7º 7º 7º .760 .145 .015 Max 0.60 .320 .370 α1 α2 α3 α4 P’ A A1 .170 .040 Note: All dimensions in inches. www.austriamicrosystems.com Revision 2.24 17 - 20 AS1106, AS1107 Data Sheet - P a c k a g e Drawings and Markings Figure 16. 24-pin SOIC Package Symbol A A1 A2 B C D E e Min 2.44 0.10 2.24 0.36 0.23 15.20 7.40 Max 2.64 0.30 2.44 0.46 0.32 15.40 7.50 Symbol H h J K L R ZD Min 10.11 0.31 0.53 7º BSC 0.51 0.63 0º Max 10.51 0.71 0.73 1.01 0.89 8º 0.66 REF 1.27 BSC α Note: All dimensions in millimeters. www.austriamicrosystems.com Revision 2.24 18 - 20 AS1106, AS1107 Data Sheet - O r d e r i n g Information 11 Ordering Information The AS1106 and AS1107 are available in 24-pin DIP and 24-pin SOIC packages. Table 25. Ordering Information Part AS1106PL AS1106WL AS1106WL-T AS1106PE AS1106WE AS1106WE-T AS1107PL AS1107WL AS1107WL-T Temperature Range 0 to +70°C 0 to +70°C 0 to +70°C -40 to +85°C -40 to +85°C -40 to +85°C -40 to +85°C -40 to +85°C -40 to +85°C Delivery Form Tubes Tubes Tape and Reel Tubes Tubes Tape and Reel Tubes Tubes Tape and Reel Package 24-pin Narrow Plastic DIP, Pb-free 24-pin Wide SO, Pb-free 24-pin Wide SO, Pb-free 24-pin Narrow Plastic DIP, Pb-free 24-pin Wide SO, Pb-free 24-pin Wide SO, Pb-free 24-pin Narrow Plastic DIP, Pb-free 24-pin Wide SO, Pb-free 24-pin Wide SO, Pb-free All devices are RoHS compliant and free of halogene substances. www.austriamicrosystems.com Revision 2.24 19 - 20 AS1106, AS1107 Data Sheet Copyrights Copyright © 1997-2008, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact-us www.austriamicrosystems.com Revision 2.24 20 - 20