AS1970 - AS1975 L o w - Vo l ta g e S i n g l e / D u a l / Q u a d C o m pa r a t o r s
D a ta S he e t
1 General Description
The AS1970 - AS1975 are single/dual/quad comparators that operate with supplies from 2.5 to 5.5V making them perfect for all 3- and 5-volt applications. The comparators can also operate with dual supplies (±1.25 to ±2.75V), and require very little supply current (down to 8.5µA) with minimal propagation delay (300ns). Low input bias current (1.0pA, typ), low input offset voltage (0.5mV, typ), and internal hysteresis (3mV) make these comparators ideal for low-power single-cell applications including power-management and power-monitoring systems. The comparators are available as the standard products listed in Table 1. Table 1. Standard Products Model AS1970/AS1972/AS1974 AS1971/AS1973/AS1975 Output Type Push/Pull Open-Drain
2 Key Features
!
CMOS Push/Pull Output Sinks and Sources 8mA (AS1970/AS1972/AS1974) CMOS Open-Drain Output Voltage Extends Beyond VCC (AS1971/AS1973/AS1975) Quiescent Supply Current: 8.5µA per Comparator Internal Hysteresis: 3mV 3V/5V Logic-Level Translation Single-Supply Operation: 2.5 to 5.5V Common-Mode Input Voltage Range Extends 250mV Above the Rails Low Propagation Delay: 300ns Minimized Overall Power Consumption Supply Current @1MHz Switching Frequency: 80µA No Phase Reversal for Overdriven Inputs Package Types: - 5-pin SOT23 – AS1970/AS1971 - 8-pin MSOP – AS1972/AS1973 - 14-pin TSSOP – AS1974/AS1975
!
! ! ! ! !
! ! ! ! !
The AS1970/AS1972/AS1974 push/pull output can sink or source current. The AS1971/AS1973/AS1975 open-drain output can be pulled beyond VCC to a maximum of 5.5V > VEE. These open-drain versions are ideal for logic-level translators or bipolar-to-unipolar converters. Large internal output drivers allow Rail-to-Rail output swings with loads of up to 8mA. The AS1970/AS1971 are available in a 5-pin SOT23 package. The AS1972/AS1973 are available in a 8-pin MSOP package. The AS1974/AS1975 are available in a 14-pin TSSOP package. Figure 1. Block Diagrams
3 Applications
The devices are ideal for battery-powered systems, mobile communication devices, zero-crossing detectors, window comparators, level translators, threshold detectors/discriminators, ground/supply-sensing applications, IR receivers or any other space-limited application with low power-consumption requirements.
+ – + – + – + – OUTD OUTC OUTB OUTA
INA+ INA+ IN+ IN+ – OUT INA+ – OUTA INAINB+ INBINB+ INBVCC + – OUTB INC+ INCIND+
VCC
VEE
AS1970/AS1971
AS1972/AS1973
VEE INDVCC
AS1974/AS1975
VEE
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AS1970 Data Sheet
- Pinout and Packaging
4 Pinout and Packaging
Pin Assignments
Figure 2. Pin Assignments (Top View)
OUTA 1 OUT 1 5 VEE OUTA 1 8 VCC INA- 2 INA+ 3 VCC 4 6 INBINB+ 5 VEE 4 5 INB+ INB- 6 OUTB 7
14 OUTD 13 IND12 IND+
INA- 2 VCC 2
7 OUTB
AS1970/ AS1971
INA+ 3
AS1972/ AS1973
AS1974/ AS1975
11 VEE 10 INC+ 9 INC8 OUTC
IN+ 3
4 IN-
5-pin SOT23
8-pin MSOP
14-pin TSSOP
Pin Descriptions
Table 2. Pin Descriptions Pin Number Pin Name ININ+ INAINA+ INBINB+ INCINC+ See Figure 2 INDIND+ OUT OUTA OUTB OUTC OUTD VCC VEE Comparator Inverting Input Comparator Non-Inverting Input Comparator A Inverting Input Comparator A Non-Inverting Input Comparator B Inverting Input Comparator B Non-Inverting Input Comparator C Inverting Input Comparator C Non-Inverting Input Comparator D Inverting Input Comparator D Non-Inverting Input Comparator Output Comparator A Output Comparator B Output Comparator C Output Comparator D Output Positive Supply Voltage Negative Supply Voltage Description
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AS1970 Data Sheet
- Absolute Maximum Ratings
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 3 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Section 6 Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Absolute Maximum Ratings Parameter Supply Voltage VCC to VEE INx+, INx- to VEE AS1970/AS1972/AS1974 AS1971/AS1973/AS1975 OUTx Short-Circuit Duration to VEE or VCC Continuous Power Dissipation (TAMB = +70ºC) 5-pin SOT23 8-pin MSOP 14-pin TSSOP -40 -65 -0.3 -0.3 -0.3 Min Max 7 VCC + 0.3 VCC + 0.3 +7 10 571 727 727 +85 +150 +150 Units V V V V s mW mW mW ºC ºC ºC The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD020C “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). Derate 7.1mW/ºC above +70ºC Derate 9.1mW/ºC above +70ºC Derate 9.1mW/ºC above +70ºC Comments
OUTx to VEE
Operating Temperature Range Junction Temperature Range Storage Temperature Range
Package Body Temperature
260
ºC
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AS1970 Data Sheet
- Electrical Characteristics
6 Electrical Characteristics
VCC = 2.7 to 5.5V, VEE = 0V, VCM = 0V, TAMB = -40 to +85ºC (unless otherwise specified). Typ values are at TAMB = +25ºC. Table 4. Electrical Characteristics Symbol VCC Parameter Supply Voltage Conditions Inferred from PSRR test VCC = 5V, No Load, AS1974/AS1975 VCC = 5V, No Load, AS1972/AS1973 IDD Supply Current VCC = 5V, No Load, AS1970, AS1971 VCC = 2.7V, No Load, AS1974/AS1975 VCC = 2.7V, No Load, AS1972/AS1973 VCC = 2.7V, No Load, AS1970, AS1971 PSRR VCMR Power-Supply Rejection Ratio Common-Mode Voltage Range
1
Min 2.5
Typ
Max 5.5
Units V
36 18 11 34 17 10 55 VEE - 0.25 VEE ±0.5 80
64 32 19 60 30 18 dB VCC + 0.25 VCC ±6 mV ±8 V µA
2.5V ≤ VCC ≤ 5.5V, TAMB = +25ºC TAMB = +25ºC TAMB = -40 to +85ºC
VOS
Input Offset Voltage
2
Full Common-Mode Range, TAMB = +25ºC Full Common-Mode Range, TAMB = -40 to +85ºC
VHYS IB IOS CIN CMRR ILEAK
Input Hysteresis Input Bias Current
3, 4
±3 0.001 0.5 3.5 TAMB = +25ºC AS1971/AS1973/AS1975 only Sourcing or Sinking, VOUT = VEE or VCC, VCC = 5V Sourcing or Sinking, VOUT = VEE or VCC, VCC = 2.7V VCC = 5V, ISINK = 8mA, TAMB = +25ºC VCC = 5V, ISINK = 8mA, TAMB = -40 to +85ºC VCC = 2.7V, ISINK = 3.5mA, TAMB = +25ºC VCC = 2.7V, ISINK = 3.5mA, TAMB = -40 to +85ºC VCC = 5V, ISINK = 8mA, TAMB = +25ºC 4.6 4.45 4.85 0.15 60 52 80 1.0 10
mV nA pA pF dB µA
Input Offset Current Input Capacitance Common-Mode Rejection Ratio Output Leakage Current
ISC
Output Short-Circuit Current
mA 18 0.2 0.4 0.55 V 0.3 0.4
VOL
OUTx Output Voltage Low
VOH
OUTx Output Voltage High (AS1970/AS1972/AS1974 only)
VCC = 5V, ISINK = 8mA, TAMB = -40 to +85ºC VCC = 2.7V, ISINK = 3.5mA, TAMB = +25ºC VCC = 2.7V, ISINK = 3.5mA, TAMB = -40 to +85ºC
V 2.4 2.3 2.55
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AS1970 Data Sheet
- Electrical Characteristics
Table 4. Electrical Characteristics (Continued) Symbol Parameter OUTx Rise Time (AS1970/AS1972/AS1974 only) Conditions VCC = 5V, CLOAD = 15pF VCC = 5V, CLOAD = 50pF VCC = 5V, CLOAD = 200pF VCC = 5V, CLOAD = 15pF tFALL OUTx Fall Time VCC = 5V, CLOAD = 50pF VCC = 5V, CLOAD = 200pF AS1970/AS1972/AS1974 only, CLOAD = 15pF, 10mV Overdrive AS1970/AS1972/AS1974 only, CLOAD = 15pF, 100mV Overdrive tPDPropagation Delay AS1971/AS1973/AS1975 only, CLOAD = 15pF, RPULLUP = 5.1kΩ, 10mV Overdrive AS1971/AS1973/AS1975 only, CLOAD = 15pF, RPULLUP = 5.1kΩ, 100mV Overdrive AS1970/AS1972/AS1974 only, CLOAD = 15pF, 10mV Overdrive AS1970/AS1972/AS1974 only, CLOAD = 15pF, 100mV Overdrive Power-Up Time Min Typ 32 50 80 22 32 60 400 300 400 ns 300 420 270 20 µs ns ns Max Units
tRISE
tPD+
tPU
1. Inferred from the VOS test. Both or either inputs can be driven 0.3V beyond either supply rail without output phase reversal. 2. VOS is defined as the center of the hysteresis band at the input. 3. IB is defined as the average of the two input bias currents (IB-, IB+). 4. Guaranteed by design.
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AS1970 Data Sheet
- Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
Figure 3. Supply Current vs. Temperature (per comparator)
18
Figure 4. Supply Current vs. Output Transition Frequency (per comparator)
1000
Supply Current (µA) e
16 14 12
VCC = 5V
Supply Current (µA)e
100
VCC = 5V
10
VCC = 3V
10
VCC = 2.7V
8 6 -60 -40 -20 0 20 40 60 80 100
1 0.1 1 10 100 1000
Temp (°C) Figure 5. VOL vs. ISINK; VIN+ < VIN1000
Output Transition Frequency (kHz) Figure 6. VOH vs. ISOURCE ; VIN+ > VINe Output High Voltage (mV)
1000
Output Low Voltage (mV) e
100
VCC = 2.7V VCC = 5V
100
VCC = 2.7V
10
10
VCC = 5V
1
1
0.1 0.01
0.1
1
10
100
0.1 0.01
0.1
1
10
100
Output Sink Current (mA) Figure 7. ISINK vs. Temperature
100
Output Source Current (mA) Figure 8. VOS vs. Temperature
3.00 2.90
Output Sink Current (mA) e
90
VCC = 5V
70 60 50 40 30 20 10 0 -60 -40 -20 0
Offset Voltage (mV)]
60 80 100
80
2.80 2.70 2.60 2.50 2.40 2.30 2.20 2.10 2.00
VCC = 2.7V
20
40
-60 -40 -20
0
20
40
60
80 100
Temperature (°C)
Temperature (°C)
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AS1970 Data Sheet
- Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 9. tPD+ vs. CLOAD; VCC = 3V, VOD = 50mV
550
Figure 10. tPD+ vs. CLOAD; VCC = 5V, VOD = 50mV
450
Propagation Delay PD+ (ns) ] t
500
To VOUT = 50% of Final Value
Propagation Delay PD+ (ns) ] t
400
To VOUT = 50% of Final Value
450 400 350 300 250 0 200 400 600 800 1000
To VOUT = 10% of Final Value
350
300
250
To VOUT = 10% of Final Value
200 0 200 400 600 800 1000
Capacitive Load (pF) Figure 11. tPD+ vs. Temperature; VOD = 50mV
290
Capacitive Load (pF) Figure 12. tPD+ vs. VOD
600
Propagation Delay PD+ (ns) ] t
280
To VOUT = 50% of Final Value
Propagation Delay PD+ (ns) ] t
500
270
400
260
250
To VOUT = 10% of Final Value
300
VCC = 2.7V
VCC = 5V
240 -40 -20 0 20 40 60 80 100
200 0 40 80 120 160 200
Temperature (°C) Figure 13. 1MHz Response; VOD = 50mV
Input Overdrive (mV) Figure 14. Power-Up Delay; VOD = 50mV
50mV/Div
In+
2V/Div
Out
400ns/Div
4µs/Div
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2V/Div
Out
2V/Div
VCC
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AS1970 Data Sheet
- Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 15. tPD+; VOD = 50mV
Figure 16. tPD-; VOD = 50mV
50mV/Div
2V/Div
100ns/Div
100ns/Div
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2V/Div
Out
Out
50mV/Div
In+
In+
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AS1970 Data Sheet
- Detailed Description
8 Detailed Description
The AS1970 - AS1975 are single/dual/quad low-power, comparators. The devices operate with a supply voltage range between 2.5 and 5.5V while consuming down to 8.5µA per comparator. Their common-mode input voltage range extends 0.25V beyond each rail. Internal hysteresis ensures clean output switching, even with slow input signals. Large internal output drivers allow railto-rail output swing with up to 8mA loads. The output stage design minimizes supply-current surges while switching, virtually eliminating the power supply transients typical. The AS1970/AS1972/AS1974 push/pull output stage sinks and sources current, wheras the AS1971/ AS1973/AS1975 open-drain output stage can be pulled beyond VCC to an absolute maximum of 5.5V > VEE.
Input Stage
The input common-mode voltage range extends from -0.25V to (VCC + 0.25V), and the comparators can operate at any differential input voltage within this voltage range. Input bias (IB) current is 1.0pA (typ) if the input voltage is within the common-mode voltage range. Inputs are protected from over-voltage by internal ESD protection diodes connected to the supply rails. As the input voltage exceeds the supply rails, these diodes become forward biased and begin to conduct and the bias currents increase exponentially as the input voltage exceeds the supply rails.
Output Stage
The push/pull and open-drain output stages were designed to provide rail-to-rail operation with up to 8mA loads. Even at loads of up to 8mA, the supply-current change during an output transition is extremely small (see Figure 4 on page 6). Figure 4 shows the minimal supply-current increase as the output switching frequency approaches 1MHz. This characteristic eliminates the need for power-supply filter capacitors to reduce glitches created by comparator switching currents. Because of the unique design of its output stage, the AS1970 - AS1975 can dramatically increase battery life, even in high-speed applications.
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AS1970 Data Sheet
- Application Information
9 Application Information
Figure 17 shows a typical application circuit for the AS1970 - AS1975 comparators. Figure 17. Typical Application Diagram – Threshold Detector
VIN 2 4 INVCC
AS1970 - AS1975
1 OUT 3 IN+ 5 VEE
RPULLUP †
†
AS1971/AS1973/AS1975 only
Hysteresis (AS1970/AS1972/AS1974)
The AS1970/AS1972/AS1974 have 3mV internal hysteresis. Additional hysteresis can be generated with three resistors using positive feedback (Figure 18), however this method also slows hysteresis response time. Figure 18. Additional Hysteresis AS1970/AS1972/AS1974
VCC R3
R1 VIN + – VREF VCC VEE OUT
R2
Resistor Selection Example For the circuit shown in Figure 18, the following steps can be used to calculate values for R1, R2, and R3. 1. Select R3 first. The current through R3 should be at least 1µA to minimize errors caused by leakage current. The current through R3 at the trip point is: (VREF - VOUT)/R3 The two possible output states in solving for R3 yields these two formulas: R3 = VREF/1µA R3 = (VREF - VCC)/1µA (EQ 1) (EQ 2) (EQ 3)
For example, for VREF = 1.2V and VCC = 5V, the two R3 resistor values are 1.2MΩ and 3.8MΩ. Use the smaller of the two resulting resistor values; in this case a standard 1.2MΩ resistor should be used for R3. 2. Choose the hysteresis band (VHB). For this example, use VHB = 50mV. 3. Calculate R1 according to the following equation: R1 = R3(VHB/VCC) Substituting the example values for R3 and VHB gives: R1 = 1.2MΩ(50mV/5V) = 12kΩ (EQ 4)
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AS1970 Data Sheet
- Application Information
4. Choose the trip point for VIN rising (VTHR) (see page 12). This is the threshold voltage at which the AS1970 AS1975 switches its output from low to high as VIN rises above the trip point. For this example, choose VTHR = 3V. 5. Calculate R2 as: R2 = 1/[VTHR/(VREF x R1) - (1/R1) - (1/R3)] Substituting the example values gives: R2 = 1/[3.0V/(1.2V x 12kΩ) - (1/12kΩ) - (1/1.2MΩ)] = 8.05kΩ In this example, a standard 8.2kΩ resistor should be used for R2. 6. Verify the trip voltages and hysteresis as: VTHR = VREF x R1[(1/R1) + (1/R2) + (1/R3)] VTHF = VTHR - (R1 x VCC/R3) Hysteresis = VTHR - VTHF (EQ 6) (EQ 7) (EQ 8) (EQ 5)
Hysteresis (AS1971/AS1973/AS1975)
The AS1971/AS1973/AS1975 have 3mV internal hysteresis. Their open-drain outputs require an external pullup resistor (Figure 19), and additional hysteresis can be generated using positive feedback. Figure 19. Additional Hysteresis AS1971/AS1973/AS1975
VCC R3 R4 R1 VIN R2 VREF + – VCC VEE OUT
Resistor Selection Example For the circuit shown in Figure 19, the following steps can be used to calculate values for R1, R2, R3, and R4: 1. Select R3 according to one of: R3 = VREF/500µA R3 = (VREF - VCC)/500µA - R4 Use the smaller of the two resulting resistor values. 2. Choose the hysteresis band required (VHB). For this example, use 50mV. 3. Calculate R1 as: R1 = (R3 + R4)(VHB/VCC) (EQ 11) 4. Choose the trip point for VIN rising (VTHR) (see page 12). This is the threshold voltage at which the comparator switches its output from low to high as VIN rises above the trip point. 5. Calculate R2 as: R2 = 1/[VTHR /(VREF x R1) - (1/R1) - 1/(R3 + R4)] 6. Verify the trip voltages and hysteresis as follows: VIN rising: VTHR = VREF x R1 x [1/R1 + 1/R2 + 1/(R3 + R4)] VIN falling: VTHF = VREF x R1 x [1/R1 + 1/R2 + 1/(R3+R4)] - 1/(R3+R4) x VCC Hysteresis = VTHR - VTHF (EQ 13) (EQ 14) (EQ 15) (EQ 12) (EQ 9) (EQ 10)
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AS1970 Data Sheet
- Application Information
Hysteresis Band
Internal hysteresis creates two trip points (shown in Figure 20): rising input voltage (VTHR) and falling input voltage (VTHF). The area between the trip points is the hysteresis band (VHB). When the comparator input voltages are equivalent, the hysteresis effectively causes one comparator input to move quickly past the other, thus taking the input out of the region where oscillation occurs. In Figure 20 REF has a fixed voltage applied and IN+ is varied. If the inputs are reversed the output will be inverted. Figure 20. Threshold Hysteresis Band
IN+ Thresholds
VTHR REF VTHF VHB Hysteresis Band
OUT
Zero-Crossing Detector
Figure 21 shows the AS1970 in a zero-crossing detector circuit. The inverting input is connected to ground, and the non-inverting input is connected to a 100mVp-p signal source. As the signal at the non-inverting input crosses 0V, the signal at OUT changes states. Figure 21. Zero-Crossing Detector
100mVp-p 3 IN+ 4 IN+ – 1 OUT
AS1970
2 VCC 5 VEE
Logic Level Translator
The comparators can be used as a 5V/3V logic translator as shown in Figure 22. The circuit in Figure 22 converts 5Vto 3V-logic levels, and provides the full 5V logic-swing without creating overvoltage on the 3V logic inputs. When the comparator is powered by a 5V supply, RPULLUP for the open-drain output should be connected to the +3V supply voltage. For 3V-to-5V logic-level translations, connect the +3V supply voltage to VCC and the +5V supply voltage to RPULLUP. Figure 22. Logic Level Translator
+3/+5V 100kΩ 4 100kΩ +5/+3V Logic In IN3 IN+ 2 VCC +3/+5V
AS1971
RPullup + – 1 OUT 5 VEE +5/+3V Logic Out
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AS1970 Data Sheet
- Application Information
Layout Considerations
The AS1970 - AS1975 requires proper layout and design techniques for optimum performance.
! ! !
Power-supply bypass capacitors are not typically needed, although 100nF bypass capacitors should be used when supply impedance is high, when supply leads are long, or when excessive noise is expected on the supply lines. Minimize signal trace lengths to reduce stray capacitance. A ground plane and surface-mount components are recommended.
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AS1970 Data Sheet
- Package Drawings and Markings
10 Package Drawings and Markings
The AS1970 - AS1975 are available in a 5-pin SOT23 package and an 8-pin MSOP package. Figure 23. 5-pin SOT23 Package
Symbol A A1 A2 b C D E E1 L e e1 α
Min Max 0.90 1.45 0.00 0.15 0.90 1.30 0.30 0.50 0.09 0.20 2.80 3.05 2.60 3.00 1.50 1.75 0.30 0.55 0.95 REF 1.90 REF 0º 8º
Notes: 1. 2. 3. 4. 5. Controlling dimension is millimeters. Foot length measured at intercept point between datum A and lead surface. Package outline exclusive of mold flash and metal burr. Package outline inclusive of solder plating. Meets JEDEC MO178.
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AS1970 Data Sheet
- Package Drawings and Markings
Figure 24. 8-pin MSOP Package
Symbol A A1 A2 D D2 E E1 E2 E3 E4 R R1 t1 t2
Typ 1.10 0.10 0.86 3.00 2.95 4.90 3.00 2.95 0.51 0.51 0.15 0.15 0.31 0.41
±Tol Max ±0.05 ±0.08 ±0.10 ±0.10 ±0.15 ±0.10 ±0.10 ±0.13 ±0.13 +0.15/-0.08 +0.15/-0.08 ±0.08 ±0.08
Symbol b b1 c c1 θ1 θ2 θ3 L L1 aaa bbb ccc e S
Typ 0.33 0.30 0.18 0.15 3.0º 12.0º 12.0º 0.55 0.95 BSC 0.10 0.08 0.25 0.65 BSC 0.525 BSC
±Tol +0.07/-0.08 ±0.05 ±0.05 +0.03/-0.02 ±3.0º ±3.0º ±3.0º ±0.15 – – – – –
–
Notes: 1. 2. 3. 4. 5. 6. 7. All dimensions are in millimeters and all angles in degrees (unless otherwise noted). Datums B and C to be determined at datum plane H. Dimensions D and E1 are to be determined at datum plane H. Dimensions D2 and E2 are for the top package; dimensions D and E1 are for the bottom package. Cross section A-A to be determined at 0.13 to 0.25mm from the leadtip. Dimensions D and D2 do not include mold flash, protrusion, or gate burrs. Dimensions E1 and E2 do not include interlead flash or protrusion.
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AS1970 Data Sheet
- Package Drawings and Markings
Figure 25. 14-pin TSSOP Package
Symbol A A1 A2 L R R1 b b1 c c1 D E1 E Notes:
0.65mm Lead Pitch Min Nom Max 1.10 0.05 0.15 0.85 0.90 0.95 0.50 0.60 0.75 0.09 0.09 0.19 0.30 0.19 0.22 0.25 0.09 0.20 0.09 0.16 4.90 4.30 5.00 1.40 6.4 BSC 5.10 4.50
1, 2
Note
Symbol θ1 L1 aaa bbb ccc ddd e θ2 θ3
5
0.65mm Lead Pitch Min Nom Max 0º 8º 1.0 Ref 0.10 0.10 0.05 0.20 0.65 BSC 12º Ref 12º Ref
1, 2
Note
Variations 3, 8 e 4, 8 N
0.65 BSC 14
6
1. All dimensions are in millimeters; angles in degrees. 2. Dimensions and tolerancing per ASME Y14.5M-1994. 3. Dimension D does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15mm per side. 4. Dimension E1 does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side. 5. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm total in excess of dimension b at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm for 0.5mm pitch packages. 6. Terminal numbers shown are for reference only. 7. Datums A and B to be determined at datum plane H. 8. Dimensions D and E1 to be determined at datum plane H. 9. This dimension applies only to variations with an even number of leads per side. For variations with an odd number of leads per package, the center lead must be coincident with the package centerline, datum A. 10. Cross section A-A to be determined at 0.10 to 0.25mm from the leadtip.
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AS1970 Data Sheet
- Ordering Information
11 Ordering Information
The comparators are available as the standard products shown in Table 5. Table 5. Ordering Information Model AS1970-T AS1971-T AS1972 AS1972-T AS1973 AS1973-T AS1974 AS1974-T AS1975 AS1975-T Marking ASI6 ASI7 989 989 990 990 AS1974 AS1974 AS1975 AS1975 Description Low-Voltage Single Comparator, Push/Pull Low-Voltage Single Comparator, Open-Drain Low-Voltage Dual Comparator, Push/Pull Low-Voltage Dual Comparator Push/Pull Low-Voltage Dual Comparator, Open-Drain Low-Voltage Dual Comparator, Open-Drain Low-Voltage Quad Comparator, Push/Pull Low-Voltage Quad Comparator, Push/Pull Low-Voltage Quad Comparator, Open-Drain Low-Voltage Quad Comparator, Open-Drain Delivery Form Tape and Reel Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Package 5-pin SOT23 5-pin SOT23 8-pin MSOP 8-pin MSOP 8-pin MSOP 8-pin MSOP 14-pin TSSOP 14-pin TSSOP 14-pin TSSOP 14-pin TSSOP
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AS1970 Data Sheet
Copyrights
Copyright © 1997-2007, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact
www.austriamicrosystems.com
Revision 1.02
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