AS5163-HTSV

Datasheet AS5163 12-Bit Automotive Angle Position Sensor 1 General Description The AS5163 is a contactless magnetic angle position sensor for accurate angular measurement over a full turn of 360º. A sub range can be programmed to achieve the best resolution for the application. It is a system-on-chip, combining integrated Hall elements, analog front-end, digital signal processing and best in class automotive protection features in a single device. To measure the angle, only a simple two-pole magnet, rotating over the center of the chip, is required. The magnet may be placed above or below the IC. The absolute angle measurement provides instant indication of the magnet’s angular position with a resolution of 0.022º = 16384 positions per revolution. According to this resolution the adjustment of the application specific mechanical positions are possible. The angular output data is available over a 12-bit PWM signal or 12-bit ratiometric analog output. The AS5163 operates at a supply voltage of 5V and the supply and output pins are protected against overvoltage up to +27V. In addition, the supply pins are protected against reverse polarity up to -18V. 2 Key Features 360º contactless high resolution angular position encoding User programmable start and end point of the application region User programmable clamping levels and programming of the transition point Powerful analog output - Short circuit monitor - High driving capability for resistive and capacitive loads Wide temperature range: -40ºC to +150ºC Small Pb-free package: 14-pin TSSOP Broken GND and VDD detection over a wide range of different load conditions 3 Applications The AS5163 is ideal for automotive applications like Throttle and valve position sensing, Gearbox position sensor, Headlight position control, Torque sensing, Pedal position sensing and non contact Potentiometers. Figure 1. AS5163 Block Diagram VDD3 VDD5 VDD High voltage/ Reverse polarity protection AS5163 OTP Register Zero Position Single pin Interface Hall Array Frontend Amplifier ADC Sin Cos CORDIC 14-bit Angle Output DSP 12-bit PWM 12 12-bit DAC M U X Programable Angle OUT Driver OUT KDOWN GND www.austriamicrosystems.com/AS5163 Revision 2.7 1 - 36 AS5163 Datasheet - C o n t e n t s Contents 1 General Description .................................................................................................................................................................. 2 Key Features............................................................................................................................................................................. 3 Applications............................................................................................................................................................................... 4 Pin Assignments ....................................................................................................................................................................... 4.1 Pin Descriptions.................................................................................................................................................................................... 1 1 1 3 3 5 Absolute Maximum Ratings ...................................................................................................................................................... 6 Electrical Characteristics........................................................................................................................................................... 6.1 Operating Conditions............................................................................................................................................................................ 6.2 Magnetic Input Specification................................................................................................................................................................. 6.3 Electrical System Specifications........................................................................................................................................................... 6.4 Timing Characteristics .......................................................................................................................................................................... 4 5 5 5 6 6 7 Detailed Description.................................................................................................................................................................. 7.1 Operation.............................................................................................................................................................................................. 7.2 Analog Output....................................................................................................................................................................................... 7.2.1 7.2.2 7.2.3 7.2.4 7.2.5 7.2.6 7.2.7 7 8 9 7.1.1 VDD Voltage Monitor ................................................................................................................................................................... 8 Programming Parameters............................................................................................................................................................ 9 Application Specific Angular Range Programming ...................................................................................................................... 9 Application Specific Programming of the Break Point ............................................................................................................... 10 Full Scale Mode ......................................................................................................................................................................... 10 Resolution of the Parameters .................................................................................................................................................... 11 Analog Output Diagnostic Mode ................................................................................................................................................ 12 Analog Output Driver Parameters.............................................................................................................................................. 12 13 14 7.3 Pulse Width Modulation (PWM) Output.............................................................................................................................................. 7.4 Kick Down Function............................................................................................................................................................................ 8 Application Information ........................................................................................................................................................... 8.1 Programming the AS5163 .................................................................................................................................................................. 8.1.1 Hardware Setup......................................................................................................................................................................... 8.1.2 Protocol Timing and Commands of Single Pin Interface ........................................................................................................... 8.1.3 UNBLOCK ................................................................................................................................................................................. 8.1.4 WRITE128 ................................................................................................................................................................................. 8.1.5 READ128................................................................................................................................................................................... 8.1.6 DOWNLOAD.............................................................................................................................................................................. 8.1.7 UPLOAD .................................................................................................................................................................................... 8.1.8 FUSE ......................................................................................................................................................................................... 8.1.9 PASS2FUNC ............................................................................................................................................................................. 8.1.10 READ....................................................................................................................................................................................... 8.1.11 WRITE ..................................................................................................................................................................................... 8.2 OTP Programming Data ..................................................................................................................................................................... 8.2.1 8.2.2 8.2.3 8.2.4 Read / Write User Data.............................................................................................................................................................. Programming Procedure............................................................................................................................................................ Physical Placement of the Magnet ............................................................................................................................................ Magnet Placement..................................................................................................................................................................... 16 16 16 17 19 20 21 22 22 22 23 23 24 25 30 30 31 31 9 Package Drawings and Markings ........................................................................................................................................... 10 Ordering Information............................................................................................................................................................. 32 35 www.austriamicrosystems.com/AS5163 Revision 2.7 2 - 36 AS5163 Datasheet - P i n A s s i g n m e n t s 4 Pin Assignments Figure 2. Pin Assignments (Top View) VDD VDD5 NC VDD3 GNDA NC NC 1 2 14 13 OUT NC GNDP KDOWN NC NC GNDD 4 5 6 7 AS5163 3 12 11 10 9 8 4.1 Pin Descriptions Table 1 provides the description of each pin of the standard TSSOP14 package (14-Lead Thin Shrink Small Outline Package) (see Figure 2). Table 1. Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 Pin Name VDD VDD5 NC VDD3 GNDA NC NC GNDD NC NC Pin Type Supply pin Supply pin DIO/AIO multi purpose pin Supply pin Supply pin DIO/AIO multi purpose pin DIO/AIO multi purpose pin Supply pin DIO/AIO multi purpose pin DIO/AIO multi purpose pin Digital output open drain Supply pin DIO/AIO multi purpose pin DIO/AIO multi purpose pin Description Positive supply pin. This pin is high voltage protected. 4.5V- Regulator output, internally regulated from VDD. This pin needs an external ceramic capacitor of minimum 2.2μF. Test pin for fabrication. Connected to ground in the application board. 3.45V- Regulator output, internally regulated from VDD5. This pin needs an external ceramic capacitor of minimum 2.2μF. Analog ground pin. Connected to ground in the application board. Test pin for fabrication. Connected to ground in the application board. Test pin for fabrication. Open in the application. Digital ground pin. Connected to ground in the application board. Test pins for fabrication. Connected to ground in the application board. 11 12 13 14 KDOWN GNDP NC OUT Additional output pin with Kick down functionality. This pin can be used for a compare function including a hysteresis. An open drain configuration is used. If the internal angle is above a programmable threshold, then the output is switched to low. Below the threshold the output is high using a pull-up resistor. Analog ground pin. Connected to ground in the application board. Test pin for fabrication. Connected to ground in the application board. Output pin. This pin is used for the analog output or digital PWM signal. In addition, this pin is used for programming of the device. www.austriamicrosystems.com/AS5163 Revision 2.7 3 - 36 AS5163 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 5 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Symbol Electrical Parameters VDD VOUT VKDOWN VDD3 VDD5 Iscr DC supply voltage at pin VDD Overvoltage Output voltage OUT Output voltage KDOWN DC supply voltage at pin VDD3 DC supply voltage at pin VDD5 Input current (latchup immunity) -18 -0.3 -0.3 -0.3 -0.3 -100 27 27 27 5 7 100 V V V V V mA Norm: JEDEC 78 Norm: MIL 883 E method 3015 This value is applicable to pins VDD, GND, OUT, and KDOWN. All other pins ±2 kV. Min -67ºF; Max +257ºF t=20 to 40s, The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). Represents a maximum floor life time of 168h No operation permanent Parameter Min Max Units Comments Electrostatic Discharge ESD Electrostatic discharge ±4 kV Temperature Ranges and Storage Conditions Tstrg Storage temperature -55 +150 ºC TBody Body temperature (Lead-free package) 260 ºC H Humidity non-condensing Moisture Sensitive Level 5 3 85 % www.austriamicrosystems.com/AS5163 Revision 2.7 4 - 36 AS5163 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics 6.1 Operating Conditions In this specification, all the defined tolerances for external components need to be assured over the whole operation conditions range and also over lifetime. TAMB = -40 to +150ºC, VDD = +4.5V to +5.5V, CLREG5 = 2.2µF, CLREG3 = 2.2µF, RPU = 1KΩ, RPD = 1KΩ to 5.6KΩ (Analog only), CLOAD = 0 to 42nF, RPUKDWN = 1KΩ to 5.6KΩ, CLOAD_KDWN = 0 to 42nF, unless otherwise specified. A positive current is intended to flow into the pin. Table 3. Operating Conditions Symbol TAMB Isupp Parameter Ambient temperature Supply current Conditions -40ºF…+302ºF Lowest magnetic input field Min -40 Typ Max +150 20 Units ºC mA 6.2 Magnetic Input Specification TAMB = -40 to +150ºC, VDD = 4.5 to 5.5V (5V operation), unless otherwise noted. Two-pole cylindrical diametrically magnetized source: Table 4. Magnetic Input Specification Symbol Bpk Boff Parameter Magnetic input field amplitude Magnetic offset Field non-linearity Conditions Required vertical component of the magnetic field strength on the die’s surface, measured along a concentric circle with a radius of 1.1mm Constant magnetic stray field Including offset gradient Min 30 Typ Max 70 ±10 5 Units mT mT % www.austriamicrosystems.com/AS5163 Revision 2.7 5 - 36 AS5163 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.3 Electrical System Specifications TAMB = -40 to +150ºC, VDD = 4.5 - 5.5V (5V operation), Magnetic Input Specification, unless otherwise noted. Table 5. Electrical System Specifications Symbol RES INLopt Parameter Resolution Analog and PWM Output Integral non-linearity (optimum) 360 degree full turn Integral non-linearity (optimum) 360 degree full turn Conditions Angular operating range ≥ 90ºC Maximum error with respect to the best line fit. Centered magnet without calibration, TAMB=25ºC Maximum error with respect to the best line fit. Centered magnet without calibration, TAMB = -40 to +150ºC Best line fit = (Errmax – Errmin) / 2 Over displacement tolerance with 6mm diameter magnet, without calibration, TAMB = -40 to +150ºC. Note: This parameter is a system parameter and is dependant on the selected magnet. 1 sigma; Note: The noise performance is dependent on the programming of the output characteristic. VDD5 = 5V Fast mode, times 2 in slow mode Fast mode, times 2 in slow mode 3.1 3.6 Min Typ Max 12 ±0.5 Units bit deg INLtemp ±0.9 deg INL Integral non-linearity 360 degree full turn ±1.4 deg TN VDD5LowTH VDD5HighTH tPwrUp tdelay Transition noise Undervoltage lower threshold Undervoltage higher threshold Power-up time System propagation delay absolute output: delay of ADC, DSP and absolute interface 0.06 3.4 3.9 3.7 4.2 10 100 Deg RMS V ms µs Note: The INL performance is specified over the full turn of 360 degrees. An operation in an angle segment increases the accuracy. A two point linearization is recommended to achieve the best INL performance for the chosen angle segment. 6.4 Timing Characteristics Table 6. Timing Conditions Symbol FRCOT TCLK TDETWD Parameter Internal Master Clock Interface Clock Time WatchDog error detection time TCLK = 1/ FRCOT Conditions Min 4.05 202 Typ 4.5 222.2 Max 4.95 247 12 Units MHz ns ms www.austriamicrosystems.com/AS5163 Revision 2.7 6 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7 Detailed Description The AS5163 is manufactured in a CMOS process and uses a spinning current Hall technology for sensing the magnetic field distribution across the surface of the chip. The integrated Hall elements are placed around the center of the device and deliver a voltage representation of the magnetic field at the surface of the IC. Through Sigma-Delta Analog / Digital Conversion and Digital Signal-Processing (DSP) algorithms, the AS5163 provides accurate high-resolution absolute angular position information. For this purpose, a Coordinate Rotation Digital Computer (CORDIC) calculates the angle and the magnitude of the Hall array signals. The DSP is also used to provide digital information at the outputs that indicate movements of the used magnet towards or away from the device’s surface. A small low cost diametrically magnetized (two-pole) standard magnet provides the angular position information. The AS5163 senses the orientation of the magnetic field and calculates a 14-bit binary code. This code is mapped to a programmable output characteristic. The type of output is programmable and can be selected as PWM or analog output. This signal is available at the pin 14 (OUT). The analog and PWM output can be configured in many ways. The application angular region can be programmed in a user friendly way. The start angle position T1 and the end point T2 can be set and programmed according to the mechanical range of the application with a resolution of 14 bits. In addition, the T1Y and T2Y parameter can be set and programmed according to the application. The transition point 0 to 360 degree can be shifted using the break point parameter BP. This point is programmable with a high resolution of 14 bits of 360 degrees. The voltage for clamping level low CLL and clamping level high CLH can be programmed with a resolution of 7 bits. Both levels are individually adjustable. These parameters are also used to adjust the PWM duty cycle. The AS5163 also provides a compare function. The internal angular code is compared to a programmable level using hysteresis. The function is available over the output pin 11 (KDOWN). The output parameters can be programmed in an OTP register. No additional voltage is required to program the AS5163. The setting may be overwritten at any time and will be reset to default when power is cycled. To make the setting permanent, the OTP register must be programmed by using a lock bit. Else, the content could be frozen for ever. The AS5163 is tolerant to magnet misalignment and unwanted external magnetic fields due to differential measurement technique and Hall sensor conditioning circuitry. Figure 3. Typical Arrangement of AS5163 and Magnet www.austriamicrosystems.com/AS5163 Revision 2.7 7 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7.1 Operation The AS5163 operates at 5V ±10%, using two internal Low-Dropout (LDO) voltage regulators. For operation, the 5V supply is connected to pin VDD. While VDD3 and VDD5 (LDO outputs) must be buffered by 2.2µF capacitors, the VDD requires a 1µF capacitor. All capacitors (low ESR ceramic) are supposed to be placed close to the supply pins (see Figure 4). The VDD3 and VDD5 outputs are intended for internal use only. It must not be loaded with an external load. Figure 4. Connections for 5V Supply Voltages 5V Operation 2.2µF VDD 5 1µF VDD LDO Internal VDD 4. 5 V 4. 5 - 5.5V GND LDO Internal VDD 3.45V VDD 3 2.2 µF Notes: 1. The pins VDD3 and VDD5 must always be buffered by a capacitor. These pins must not be left floating, as this may cause unstable internal supply voltages, which may lead to larger output jitter of the measured angle. 2. Only VDD is overvoltage protected up to 27V. In addition, the VDD has a reverse polarity protection. 7.1.1 VDD Voltage Monitor VDD Overvoltage Management. If the voltage applied to the VDD pin exceeds the overvoltage upper threshold for longer than the detection time, then the device enters a low power mode reducing the power consumption. When the overvoltage event has passed and the voltage applied to the VDD pin falls below the overvoltage lower threshold for longer than the recovery time, then the device enters the normal mode. VDD5 Undervoltage Management. When the voltage applied to the VDD5 pin falls below the undervoltage lower threshold for longer than the VDD5_detection time, then the device stops the clock of the digital part and the output drivers are turned off to reduce the power consumption. When the voltage applied to the VDD5 pin exceeds the VDD5 undervoltage upper threshold for longer than the VDD5_recovery time, then the clock is restarted and the output drivers are turned on. www.austriamicrosystems.com/AS5163 Revision 2.7 8 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7.2 Analog Output The reference voltage for the Digital-to-Analog converter (DAC) is taken internally from VDD. In this mode, the output voltage is ratiometric to the supply voltage. 7.2.1 Programming Parameters The Analog output voltage modes are programmable by OTP. Depending on the application, the analog output can be adjusted. The user can program the following application specific parameters: T1 T2 T1Y T2Y CLL CLH BP Mechanical angle start point Mechanical angle end point Voltage level at the T1 position Voltage level at the T2 position Clamping Level Low Clamping Level High Break point (transition point 0 to 360 degree) The above listed parameters are input parameters. Over the provided programming software and programmer, these parameters are converted and finally written into the AS5163 128-bit OTP memory. 7.2.2 Application Specific Angular Range Programming The application range can be selected by programming T1 with a related T1Y and T2 with a related T2Y into the AS5163. The internal gain factor is calculated automatically. The clamping levels CLL and CLH can be programmed independent from the T1 and T2 position and both levels can be separately adjusted. Figure 5. Programming of an Individual Application Range 90 degree T2 Application range electrical range mechanical range clamping range high T1 100%VDD CLH CLL 180 degree 0 degree T2Y CLH T1Y BP CLL 0 270 degree clamping range low T1 T2 Figure 5 shows a simple example of the selection of the range. The mechanical starting point T1 and the mechanical end point T2 define the mechanical range. A sub range of the internal Cordic output range is used and mapped to the needed output characteristic. The analog output signal has 12 bit, hence the level T1Y and T2Y can be adjusted with this resolution. As a result of this level and the calculated slope the clamping region low is defined. The break point BP defines the transition between CLL and CLH. In this example, the BP is set to 0 degree. The BP is also the end point of the clamping level high CLH. This range is defined by the level CLH and the calculated slope. Both clamping levels can be set independently form each other. The minimum application range is 10 degrees. www.austriamicrosystems.com/AS5163 Revision 2.7 9 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7.2.3 Application Specific Programming of the Break Point The break point BP can be programmed as well with a resolution of 14 bits. This is important when the default transition point is inside the application range. In such a case, the default transition point must be shifted out of the application range. The parameter BP defines the new position. The function can be used also for an on-off indication. Figure 6. Individual Programming of the Break Point BP 90 degree T2 Application range electrical range mechanical range clamping range high T1 100%VDD CLH 0 degree T2Y CLH 180 degree CLL T1Y CLL 0 BP 270 degree clamping range low T1 T2 clamping range low 7.2.4 Full Scale Mode The AS5163 can be programmed as well in the full scale mode. The BP parameter defines the position of the transition. Figure 7. Full Scale Mode 100 % VDD Analog output Voltage 0 360 For simplification, Figure 7 describes a linear output voltage from rail to rail (0V to VDD) over the complete rotation range. In practice, this is not feasible due to saturation effects of the output stage transistors. The actual curve will be rounded towards the supply rails (as indicated Figure 7). www.austriamicrosystems.com/AS5163 Revision 2.7 10 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7.2.5 Resolution of the Parameters The programming parameters have a wide resolution of up to 14 bits. Table 7. Resolution of the Programming Parameters Symbol T1 T2 T1Y T2Y CLL CLH BP Parameter Mechanical angle start point Mechanical angle stop point Mechanical start voltage level Mechanical stop voltage level Clamping level low Clamping level high Break point Resolution 14 bits 14 bits 12 bits 12 bits 7 bits 7 bits 14 bits 4096 LSBs is the maximum level 31 LSBs is the minimum level Note Figure 8. Overview of the Angular Output Voltage 100 96 Failure Band High Clamping Region High CLH Output Voltage in percent of VDD T2Y Application Region T1Y CLL Clamping Region Low 4 0 Failure Band Low Figure 8 gives an overview of the different ranges. The failure bands are used to indicate a wrong operation of the AS5163. This can be caused due to a broken supply line. By using the specified load resistors, the output level will remain in these bands during a fail. It is recommended to set the clamping level CLL above the lower failure band and the clamping level CLH below the higher failure band. www.austriamicrosystems.com/AS5163 Revision 2.7 11 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7.2.6 Analog Output Diagnostic Mode Due to the low pin count in the application, a wrong operation must be indicated by the output pin OUT. This could be realized using the failure bands. The failure band is defined with a fixed level. The failure band low is specified from 0% to 4% of the supply range. The failure band high is defined from 100% to 96%. Several failures can happen during operation. The output signal remains in these bands over the specified operating and load conditions. All the different failures can be grouped into the internal alarms (failures) and the application related failures. CLOAD ≤ 42 nF, RPU= 2k…5.6kΩ RPD= 2k…5.6kΩ load pull-up Table 8. Different Failure Cases of AS5163 Type Failure Mode Out of magnetic range (too less or too high magnetic input) Internal alarms (failures) Cordic overflow Offset compensation finished Watchdog fail Oscillator fail Overvoltage condition Application related failures Broken VDD Broken VSS Short circuit output Symbol MAGRng COF OCF WDF OF OV BVDD BVSS SCO High/Low High/Low Failure Band High/Low High/Low High/Low High/Low High/Low Note Could be switched off by one OTP bit ALARM_DISABLE. Programmable by OTP bit DIAG_HIGH Programmable by OTP bit DIAG_HIGH Programmable by OTP bit DIAG_HIGH Programmable by OTP bit DIAG_HIGH Programmable by OTP bit DIAG_HIGH Dependant on the load resistor Pull up → failure band high Pull down → failure band low Switch off → short circuit dependent For efficient use of diagnostics, it is recommended to program to clamping levels CLL and CLH. 7.2.7 Analog Output Driver Parameters The output stage is configured in a push-pull output. Therefore it is possible to sink and source currents. CLOAD ≤ 42 nF, RPU= 2k…5.6kΩ RPD= 2k…5.6kΩ load pull-up Table 9. General Parameters for the Output Driver Symbol IOUTSCL IOUTSCH TSCDET TSCREC ILEAKOUT BGNDPU BGNDPD BVDDPU BVDDPD Parameter Short circuit output current (low side driver) Short circuit output current (high side driver) Short circuit detection time Short circuit recovery time Output Leakage current Output voltage broken GND with pull-up Output voltage broken GND with pull-down Output voltage broken VDD with pull-up Output voltage broken VDD with pull-down Min 8 -8 20 2 -20 96 0 96 0 Typ Max 32 -32 600 20 20 100 4 100 4 Unit mA mA µs ms µA %VDD %VDD %VDD %VDD Note VOUT=27V VOUT=0V output stage turned off output stage turned on VOUT=VDD=5V RPU = 2k…5.6k RPD = 2k…5.6k RPU = 2k…5.6k RPD = 2k…5.6k Note: A Pull-Up/Down load is up to 1kΩ with increased diagnostic bands from 0%-6% and 94%-100%. www.austriamicrosystems.com/AS5163 Revision 2.7 12 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n Table 10. Electrical Parameters for the Analog Output Stage Symbol VOUT VOUTINL VOUTDNL VOUTOFF VOUTUD VOUTSTEP VOUTDRIFT VOUTRATE VOUTNOISE Parameter Output Voltage Range Output Integral nonlinearity Output Differential nonlinearity Output Offset Update rate of the Output Output Step Response Output Voltage Temperature drift Output ratiometricity error Noise 1 Min 4 6 -10 -50 Typ Max 96 94 10 10 50 Unit % VDD LSB LSB mV µs Note Valid when 1k ≤ RLOAD < 2k At 2048 LSB level Info parameter Between 10% and 90%, RPU/RPD =1kΩ, CLOAD=1nF; VDD=5V Of value at mid code 0.04*VDD ≤ VOUT ≤ 0.96*VDD 1Hz…30kHz; at 2048 LSB level 100 550 2 -1.5 2 1.5 10 µs % %VDD mVpp 1. Not tested in production; characterization only. 7.3 Pulse Width Modulation (PWM) Output The AS5163 provides a pulse width modulated output (PWM), whose duty cycle is proportional to the measured angle. This output format is selectable over the OTP memory OP_MODE(0) bit. If output pin OUT is configured as open drain configuration, then an external load resistor (pull up) is required. The PWM frequency is internally trimmed to an accuracy of ±10% over full temperature range. This tolerance can be cancelled by measuring the ratio between the on and off state. In addition, the programmed clamping levels CLL and CLH will also adjust the PWM signal characteristic. Figure 9. PWM Output Signal PWmax PWmin Position 0 Position 1 Position 4094 Position 4095 TPWM = 1/fPWM www.austriamicrosystems.com/AS5163 Revision 2.7 13 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n The PWM frequency can be programmed by the OTP bits PWM_frequency (1:0). Therefore, four different frequencies are possible. Table 11. PWM Signal Parameters Symbol fPWM1 fPWM2 fPWM3 fPWM4 PWMIN PWMAX Parameter PWM frequency1 PWM frequency2 PWM frequency3 PWM frequency4 MIN pulse width MAX pulse width Min 123.60 247.19 494.39 988.77 Typ 137.33 274.66 549.32 1098.63 (1+1)*1/ fPWM (1+4094)*1/ fPWM Max 151.06 302.13 604.25 1208.50 Unit Hz Hz Hz Hz µs ms Note PWM_frequency (1:0) = “00” PWM_frequency (1:0) = “01” PWM_frequency (1:0) = “10” PWM_frequency (1:0) = “11” Taking into consideration the AC characteristic of the PWM output including load, it is recommended to use the clamping function. The recommended range is 0% to 4% and 96% to 100%. Table 12. Electrical Parameters for the PWM Output Mode Symbol PWMVOL ILEAK PWMDC PWMSRF Parameter Output voltage low Output leakage PWM duty cycle range PWM slew rate Min 0 -20 4 1 2 Typ Max 0.4 20 96 4 Unit V µA % V/µs Between 75% and 25% RPU/RPD = 1kΩ, CLOAD = 1nF, VDD = 5V IOUT=8mA VOUT=VDD=5V Note 7.4 Kick Down Function The AS5163 provides a special compare function. This function is implemented using a programmable angle value with a programmable hysteresis. It will be indicated over the open drain output pin KDOWN. If the actual angle is above the programmable value plus the hysteresis, the output is switched to low. The output will remain at low level until the value KD is reached in the reverse direction. Figure 10. Kick Down Hysteresis Implementation KDHYS KDOWN KD(5:0) KD(5:0)+KDHYS www.austriamicrosystems.com/AS5163 Revision 2.7 14 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n Table 13. Programming Parameters for the Kick Down Function Symbol KD Parameter Kick Down angle Resolution 6 bits KDHYS (1:0) = “00” → 8 LSB hysteresis KDHYS (1:0) = “01” → 16 LSB hysteresis KDHYS (1:0) = “10” → 32 LSB hysteresis KDHYS (1:0) = “11” → 64 LSB hysteresis Note KDHYS Kick Down Hysteresis 2 bits Pull-up resistance 1k to 5.6K to VDD CLOAD max 42nF Table 14. Electrical Parameters of the KDOWN Output Symbol IKDSC TSCDET TSCREC KDVOL KDILEAK KDSRF Parameter Short circuit output current (Low Side Driver) Short circuit detection time Short circuit recovery time Output voltage low Output leakage KDOWN slew rate (falling edge) Min 6 20 2 0 -20 1 2 Typ Max 24 600 20 1.1 20 4 Unit mA µs ms V µA V/µs Note VKDOWN = 27V output stage turned off output stage turned on IKDOWN = 6mA VKDOWN = 5V Between 75% and 25%, RPUKDWN = 1kΩ, CLOAD_KDWN = 1nF, VDD = 5V www.austriamicrosystems.com/AS5163 Revision 2.7 15 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8 Application Information The benefits of AS5163 are as follows: Unique fully differential patented solution Best protection for automotive applications Easy to program Flexible interface selection PWM, analog output Ideal for applications in harsh environments due to contactless position sensing Robust system, tolerant to magnet misalignment, airgap variations, temperature variations and external magnetic fields No calibration required because of inherent accuracy High driving capability of analog output (including diagnostics) 8.1 Programming the AS5163 The AS5163 programming is a one-time-programming (OTP) method, based on polysilicon fuses. The advantage of this method is that no additional programming voltage is needed. The internal LDO provides the current for programming. The OTP consists of 128 bits, wherein several bits are available for user programming. In addition, factory settings are stored in the OTP memory. Both regions are independently lockable by built-in lock bits. A single OTP cell can be programmed only once. By default, each cell is “0”; a programmed cell will contain a “1”. While it is not possible to reset a programmed bit from “1” to “0”, multiple OTP writes are possible, as long as only unprogrammed “0”-bits are programmed to “1”. Independent of the OTP programming, it is possible to overwrite the OTP register temporarily with an OTP write command. This is possible only if the user lock bit is not programmed. Due to the programming over the output pin, the device will initially start in the communication mode. In this mode, the digital angle value can be read with a specific protocol format. It is a bidirectional communication possible. Parameters can be written into the device. A programming of the device is triggered by a specific command. With another command (pass2funcion), the device can be switched into operation mode (analog or PWM output). In case of a programmed user lock bit, the AS5163 automatically starts up in the functional operation mode. No communication of the specific protocol is possible after this. 8.1.1 Hardware Setup The pin OUT and the supply connection are required for OTP memory access. Without the programmed Mem_Lock_USER OTP bit, the device will start up in the communication mode and will remain into an IDLE operation mode. The pull up resistor RCommunication is required during startup. Figure 1 shows the configuration of an AS5163. Figure 11. Programming Schematic of the AS5163 SENSOR PCB VDD 1µF VDD AS5163 VDD5 VDD3 VDD Programmer RCommunication OUT KDOWN DIO 2.2µF (low ESR) 2.2µF (low ESR) 0.3 ohm GNDA GNDD GNDP GND GND www.austriamicrosystems.com/AS5163 Revision 2.7 16 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.2 Protocol Timing and Commands of Single Pin Interface During the communication mode, the output level is defined by the external pull up resistor RCommunication. The output driver of the device is in tristate. The bit coding (see Figure 18) has been chosen in order to allow the continuous synchronization during the communication, which can be required due to the tolerance of the internal clock frequency. Figure 18 shows how the different logic states '0' and '1' are defined. The period of the clock TCLK is defined with 222.2 ns. The voltage levels VH and VL are CMOS typical. Each frame is composed by 20 bits. The 4 MSB (CMD) of the frame specifies the type of command that is passed to the AS5163. The 16 data bits contain the communication data. There will be no operation when the ‘not specified’ CMD is used. The sequence is oriented in such a way that the LSB of the data is followed by the command. The number of frames vary depending on the command. The single pin programming interface block of the AS5163 can operate in slave communication or master communication mode. In the slave communication mode, the AS5163 receives the data organized in frames. The programming tool is the driver of the single communication line and can pull down the level. In case of the master communication mode, the AS5163 transmits data in the frame format. The single communication line can be pulled down by the AS5163. Figure 12. Bit Coding of the Single Pin Programming Interface Bit “0” VH VH Bit “1” VL T1 T1 = 128 * TCLK T2 = 384 * TCLK T2 VL T1 T2 TBIT = T1 + T2 = 512 * TCLK Figure 13. Protocol Definition IDLE START PACKET IDLE START DATA COMMAND www.austriamicrosystems.com/AS5163 Revision 2.7 17 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 15. OTP Commands and Communication Interface Modes Possible Interface Commands UNBLOCK WRITE128 READ128 UPLOAD DOWNLOAD FUSE PASS2FUNC READ WRITE Description Resets the interface Writes 128 bits (user + factory settings) into the device Reads 128 bits (user + factory settings) from the device Transfers the register content into the OTP memory Transfers the OTP content to the register content Command for permanent programming Change operation mode from communication to operation Read related to address the user data Write related to address the user data AS5163 Communication Mode SLAVE SLAVE SLAVE and MASTER SLAVE SLAVE SLAVE SLAVE SLAVE and MASTER SLAVE Command CMD 0x0 0x9 (0x1) 0xA 0x6 0x5 0x4 0x7 0xB 0xC Number of Frames 1 8 9 1 1 1 1 2 1 Note: Other commands are reserved and shall not be used. When single pin programming interface bus is in high impedance state, the logical level of the bus is held by the pull up resistor RCommunication. Each communication begins by a condition of the bus level which is called START. This is done by forcing the bus in logical low level (done by the programmer or AS5163 depending on the communication mode). Afterwards the bit information of the command is transmitted as shown in Figure 14. Figure 14. Bus Timing for the WRITE128 Command MSB MSB LSB MSB MSB MSB LSB MSB DATA1 DATA0 DATA3 DATA2 DATA14 1001 1000 MSB 1000 MSB 000P 20*TBIT Figure 15. Bus Timing for the READ128 Command MSB LSB MSB LSB MSB MSB LSB START IDLE DO NOT CARE LSB MSB LSB DO NOT CARE 0101 IDLE DATA1 DATA0 LSB 000P DATA3 LSB START IDLE LSB LSB LSB LSB DATA14 20*TBIT Slave Communication Mode TSW Master Communication Mode www.austriamicrosystems.com/AS5163 Revision 2.7 18 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n In case of READ or READ128 command (see Figure 15) the idle phase between the command and the answer is 10 TBIT (TSW). Figure 16. Bus Timing for the READ Commands START IDLE MSB MSB LSB MSB LSB MSB ADDR2 ADDR1 DATA1 DATA0 0101 IDLE MSB 000P LSB LSB 20*TBIT Slave Communication Mode TSW Master Communication Mode In case of a WRITE command, the device stays in slave communication mode and will not switch to master communication mode. When using other commands like DOWNLOAD, UPLOAD, etc. instead of READ or WRITE, it does not matter what is written in the address fields (ADDR1, ADDR2). 8.1.3 UNBLOCK The Unblock command can be used to reset only the one-wire interface of the AS5163 in order to recover the possibility to communicate again without the need of a POR after a stacking event due to noise on the bus line or misalignment with the AS5163 protocol. The command is composed by a not idle phase of at least 6 TBIT followed by a packet with all 20 bits at zero (see Figure 17). Figure 17. Unblock Sequence VH VL NOT IDLE = 6 * TBIT => 3072* TCLK IDLE = 512*TCLK START = 512*TCLK PACKET[19:0] = 0x00000 20*TBIT => 10240*TCLK LSB IDLE = 512*TCLK COMMAND FROM EXT MASTER www.austriamicrosystems.com/AS5163 Revision 2.7 19 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.4 WRITE128 Figure 18 illustrates the format of the frame and the command. Figure 18. Frame Organization of the WRITE128 Command DATA1 LSB MSB LSB DATA0 MSB LSB CMD MSB 1 DATA3 DATA2 MSB LSB MSB LSB 0 0 1 CMD MSB LSB 1 DATA5 DATA4 MSB LSB MSB LSB 0 0 0 CMD MSB LSB 1 DATA7 DATA6 MSB LSB MSB LSB 0 0 0 CMD MSB LSB 1 DATA9 DATA8 MSB LSB MSB LSB 0 0 0 CMD MSB LSB 1 DATA11 DATA10 MSB LSB MSB LSB 0 0 0 CMD MSB LSB 1 DATA13 DATA12 MSB LSB MSB LSB 0 0 0 CMD MSB LSB 1 DATA15 DATA14 MSB LSB MSB LSB 0 0 0 CMD MSB LSB 1 0 0 0 The command contains 8 frames. With this command, the AS5163 receives only frames. This command will transfer the data in the special function registers (SFRs) of the device. The data is not permanent programmed using this command. Table 16 describe the organization of the OTP data bits. The access is performed with CMD field set to 0x9. The next 7 frames with CMD field set to 0x1. The 2 bytes of the first command will be written at address 0 and 1 of the SFRs; the 2 bytes of the second command will be written at address 2 and 3; and so on, in order to cover all the 16 bytes of the 128 SFRs. Note: It is important to always complete the command. All 8 frames are needed. In case of a wrong command or a communication error, a power on reset must be performed. The device will be delivered with the programmed Mem_Lock_AMS OTP bit. This bit locks the content of the factory settings. It is impossible to overwrite this particular region. The written information will be ignored. www.austriamicrosystems.com/AS5163 Revision 2.7 20 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.5 READ128 Figure 19 illustrates the format of the frame and the command. Figure 19. Frame Organization of the READ128 Command DO NOT CARE LSB MSB LSB DO NOT CARE MSB LSB CMD MSB 0 DATA1 DATA0 MSB LSB MSB 1 0 1 CMD DUMMY LSB 0 DATA3 DATA2 MSB LSB MSB 0 0 P CMD DUMMY LSB 0 DATA5 DATA4 MSB LSB MSB 0 0 P CMD DUMMY LSB 0 DATA7 DATA6 MSB LSB MSB 0 0 P CMD DUMMY LSB 0 DATA9 DATA8 MSB LSB MSB 0 0 P CMD DUMMY LSB 0 DATA11 DATA10 MSB LSB MSB 0 0 P CMD DUMMY LSB 0 DATA13 DATA12 MSB LSB MSB 0 0 P CMD DUMMY LSB 0 DATA15 DATA14 MSB LSB MSB 0 0 P CMD DUMMY LSB 0 0 0 P The command is composed by a first frame transmitted to the AS5163. The device is in slave communication mode. The device remains for the time TSWITCH in IDLE mode before changing into the master communication mode. The AS5163 starts to send 8 frames. This command will read the SFRs. The numbering of the data bytes correlates with the address of the related SFR. An even parity bit is used to guarantee a correct data transmission. Each parity (P) is related to the frame data content of the 16 bit word. The MSB of the CMD dummy (P) is reserved for the parity information. www.austriamicrosystems.com/AS5163 Revision 2.7 21 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.6 DOWNLOAD Figure 20 shows the format of the frame. Figure 20. Frame Organization of the DOWNLOAD Command DO NOT CARE LSB MSB LSB DO NOT CARE MSB LSB CMD MSB 1 0 1 0 The command consists of one frame received by the AS5163 (slave communication mode). The OTP cell fuse content will be downloaded into the SFRs. The access is performed with CMD field set to 0x5. 8.1.7 UPLOAD Figure 21 shows the format of the frame. Figure 21. Frame Organization of the UPLOAD Command DO NOT CARE LSB MSB LSB DO NOT CARE MSB LSB CMD MSB 0 1 1 0 The command consists of one frame received by the AS5163 (slave communication mode) and transfers the data from the SFRs into the OTP fuse cells. The OTP fuses are not permanent programmed using this command. The access is performed with CMD field set to 0x6. 8.1.8 FUSE Figure 22 shows the format of the frame. Figure 22. Frame Organization of the FUSE Command DO NOT CARE LSB MSB LSB DO NOT CARE MSB LSB CMD MSB 0 0 1 0 The command consists of one frame received by the AS5163 (slave communication mode) and it is giving the trigger to permanent program the non volatile fuse elements. The access is performed with CMD field set to 0x4. Note: After this command, the device automatically starts to program the built-in programming procedure. It is not allowed to send other commands during this programming time. This time is specified to 4ms after the last CMD bit. www.austriamicrosystems.com/AS5163 Revision 2.7 22 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.9 PASS2FUNC Figure 23 shows the format of the frame. Figure 23. Frame Organization of the PASS2FUNCTION Command DO NOT CARE LSB MSB LSB DO NOT CARE MSB LSB CMD MSB 1 1 1 0 The command consists of one frame received by the AS5163 (slave communication mode). This command stops the communication receiving mode, releases the reset of the DSP of the AS5163 device and starts to work in functional mode with the values of the SFR currently written. The access is performed with CMD field set to 0x7. 8.1.10 READ Figure 24 shows the format of the frame. Figure 24. Frame Organization of the READ Command ADDR2 LSB MSB LSB ADDR1 MSB LSB CMD MSB 1 DATA2 DATA1 MSB LSB MSB 1 0 1 CMD DUMMY LSB 0 0 0 P The command is composed by a first frame sent to the AS5163. The device is in slave communication mode. The device remains for the time TSWITCH in IDLE mode before changing into the master communication mode. The AS5163 starts to send the second frame transmitted by the AS5163. The access is performed with CMD field set to 0xB. When the AS5163 receives the first frame, it sends a frame with data value of the address specified in the field of the first frame. Table 17 shows the possible readable data information for the AS5163 device. An even parity bit is used to guarantee a correct data transmission. The parity bit (P) is generated by the 16 data bits. The MSB of the CMD dummy (P) is reserved for the parity information. www.austriamicrosystems.com/AS5163 Revision 2.7 23 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.11 WRITE Figure 25 shows the format of the frame. Figure 25. Frame Organization of the WRITE Command DATA LSB MSB LSB ADDR MSB LSB CMD MSB 0 0 1 1 The command consists of one frame received by the AS5163 (slave communication mode). The data byte will be written to the address. The access is performed with CMD field set to 0xC. Table 17 shows the possible write data information for the AS5163 device. Note: It is not recommended to access OTP memory addresses using this command. www.austriamicrosystems.com/AS5163 Revision 2.7 24 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.2 OTP Programming Data Table 16. OTP Data Organization Data Byte Bit Number 0 1 2 DATA15 (0x0F) 3 4 5 6 7 0 1 2 DATA14 (0x0E) 3 4 5 6 7 0 1 2 DATA13 (0x0D) 3 4 5 6 7 0 1 2 DATA12 (0x0C) 3 4 5 6 7 Symbol AMS_Test AMS_Test AMS_Test AMS_Test AMS_Test AMS_Test AMS_Test AMS_Test AMS_Test AMS_Test AMS_Test AMS_Test ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID ChipID Default FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS Chip ID Factory Settings AMS Test Area Description www.austriamicrosystems.com/AS5163 Revision 2.7 25 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 16. OTP Data Organization Data Byte Bit Number 0 1 2 DATA11 (0x0B) 3 4 5 6 7 0 1 2 DATA10 (0x0A) 3 4 5 6 7 0 1 2 DATA9 (0x09) 3 4 5 6 7 0 1 2 DATA8 (0x08) 3 4 5 6 7 Symbol ChipID MemLock_AMS KD KD KD KD KD KD ClampLow ClampLow ClampLow ClampLow ClampLow ClampLow ClampLow DAC_MODE ClampHi ClampHi ClampHi ClampHi ClampHi ClampHi ClampHi DIAG_HIGH OffsetIn OffsetIn OffsetIn OffsetIn OffsetIn OffsetIn OffsetIn OffsetIn Default FS 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Offset Diagnostic Mode, default=0 for Failure Band Low Clamping Level High DAC12/DAC10 Mode Customer Settings Clamping Level Low Kick Down Threshold Description Chip ID Lock of the Factory Setting Area www.austriamicrosystems.com/AS5163 Revision 2.7 26 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 16. OTP Data Organization Data Byte Bit Number 0 1 2 DATA7 (0x07) 3 4 5 6 7 0 1 2 DATA6 (0x06) 3 4 5 6 7 0 1 2 DATA5 (0x05) 3 4 5 6 7 0 1 2 DATA4 (0x04) 3 4 5 6 7 Symbol OffsetIn OffsetIn OffsetIn OffsetIn OffsetIn OffsetIn OP_Mode OP_Mode OffsetOut OffsetOut OffsetOut OffsetOut OffsetOut OffsetOut OffsetOut OffsetOut OffsetOut OffsetOut OffsetOut OffsetOut KDHYS KDHYS PWM Frequency PWM Frequency BP BP BP BP BP BP BP BP Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Break Point Kick Down Hysteresis Select the PWM frequency (4 frequencies) Output Offset Customer Settings Selection of Analog=‘00’ or PWM Mode=‘01’ Offset Description www.austriamicrosystems.com/AS5163 Revision 2.7 27 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 16. OTP Data Organization Data Byte Bit Number 0 1 2 DATA3 (0x03) 3 4 5 6 7 0 1 2 DATA2 (0x02) 3 4 5 6 7 0 1 2 DATA1 (0x01) 3 4 5 6 7 0 1 2 DATA0 (0x00) 3 4 5 6 7 Symbol BP BP BP BP BP BP FAST_SLOW EXT_RANGE Gain Gain Gain Gain Gain Gain Gain Gain Gain Gain Gain Gain Gain Gain Invert_Slope Lock_OTPCUST redundancy redundancy redundancy redundancy redundancy redundancy redundancy redundancy Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Redundancy Bits Clockwise /Counterclockwise rotation Customer Memory Lock Gain Customer Settings Gain Output Data Rate Enables a wider z-Range Break Point Description Note: Factory settings (FS) are used for testing and programming at AMS. These settings are locked (only read access possible). www.austriamicrosystems.com/AS5163 Revision 2.7 28 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Data Content. Redundancy (7:0): For a better programming reliability, a redundancy is implemented. In case the programming of one bit fails, then this function can be used. With an address (7:0) one bit can be selected and programmed. Redundancy Code Redundancy in decimal 0 1 2 3 4 - 10 11 - 17 18 19 - 32 33 - 46 47 - 60 61 - 72 73 74 75 76 77 78 - 83 84 - 85 86 none OP_Mode DIAG_HIGH PWM Frequency ClampHi - ClampHi ClampLow - ClampLow OP_Mode OffsetIn - OffsetIn Gain - Gain BP - BP OffsetOut - OffsetOut Invert_Slope FAST_SLOW EXT_RANGE DAC_MODE Lock_OTPCUST KD - KD KDHYS - KDHYS PWM Frequency OTP Bit Selection Lock_OTPCUST = 1, locks the customer area in the OTP and the device is starting up from now on in operating mode. Invert_Slope = 1, inverts the output characteristic in analog output mode. Gain (7:0): With this value one can adjust the steepness of the output slope. EXT_RANGE = 1, provides a wider z-Range of the magnet by turning off the alarm function. FAST_SLOW = 1, improves the noise performance due to internal filtering. BP (13:0): The breakpoint can be set with resolution of 14 bit. PWM Frequency (1:0): Four different frequency settings are possible. Please refer to Table 11. KDHYS (1:0): Avoids flickering at the KDOWN output (pin 11). For settings, refer to Table 13. OffsetOut (11:0): Output characteristic parameter ANALOG_PWM = 1, selects the PWM output mode. OffsetIn (13:0): Output characteristic parameter DIAG_HIGH = 1: In case of an error, the signal goes into high failure-band. ClampHI (6:0): Sets the clamping level high with respect to VDD. DAC_MODE disables filter at DAC ClampLow (6:0): Sets the clamping level low with respect to VDD. KD (5:0): Sets the kick-down level with respect to VDD. www.austriamicrosystems.com/AS5163 Revision 2.7 29 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.2.1 Read / Write User Data Table 17. Read / Write Data Area Region R/W User Data Address 0x10 0x11 0x12 0x17 Address 16 17 18 23 0 OCF 0 COF 0 0 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 CORDIC_OUT[7:0] CORDIC_OUT[13:8] 0 0 DSP_RES R1K_10K AGC_VALUE[7:0] Read only Read and Write Data Content: Data only for read: CORDIC_OUT(13:0): 14-bit absolute angular position data. OCF (Offset Compensation Finished): logic high indicates the finished Offset Compensation Algorithm. As soon as this bit is set, the AS5163 has completed the startup and the data is valid. COF (Cordic Overflow): Logic high indicates an out of range error in the CORDIC part. When this bit is set, the CORDIC_OUT(13:0) data is invalid. The absolute output maintains the last valid angular value. This alarm may be resolved by bringing the magnet within the X-Y-Z tolerance limits. AGC_VALUE (7:0): magnetic field indication. Data for write and read: DSP_RES resets the DSP part of the AS5163 the default value is 0. This is active low. The interface is not affected by this reset. R1K_10K defines the threshold level for the OTP fuses. This bit can be changed for verification purpose. A verification of the programming of the fuses is possible. The verification is mandatory after programming. 8.2.2 Programming Procedure Note: After programming the OTP fuses, a verification is mandatory. The procedure described below must be strictly followed to ensure properly programmed OTP fuses. Pull-up / Pull-down on OUT pin VDD=5V Wait startup time, device enters communication mode Write128 command: The trimming bits are written in the SFR memory. Read128 command: The trimming bits are read back. Upload command: The SFR memory is transferred into the OTP RAM. Fuse command: The OTP RAM is written in the Poly Fuse cells. Wait fuse time (6 ms) Write command (R1K_10K=1): Poly Fuse cells are transferred into the RAM cells compared with 10KΩ resistor. Download command: The OTP RAM is transferred into the SFR memory. Read128 command: The fused bits are read back. Write command (R1K_10K=0): Poly Fuse cells are transferred into the RAM cells compared with 1KΩ resistor. Download command: The OTP RAM is transferred into the SFR memory. Read128 command: The fused bits are read back. Pass2Func command or POR: Go to Functional mode. For further information, please refer to Application Note AN5163-10 available at www.austriamicrosystems.com www.austriamicrosystems.com/AS5163 Revision 2.7 30 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.2.3 Physical Placement of the Magnet The best linearity can be achieved by placing the center of the magnet exactly over the defined center of the chip as shown in Figure 26. Figure 26. Defined Chip Center and Magnet Displacement Radius 3.2mm 3.2mm 1 2.5mm Defined center Rd 2.5mm Area of recommended maximum magnet misalignment 8.2.4 Magnet Placement The magnet’s center axis should be aligned within a displacement radius Rd of 0.25mm (larger magnets allow more displacement) from the defined center of the IC. The magnet may be placed below or above the device. The distance should be chosen such that the magnetic field on the die surface is within the specified limits (see Figure 26). The typical distance “z” between the magnet and the package surface is 0.5mm to 1.5mm, provided the recommended magnet material and dimensions (6mm x 3mm) are used. Larger distances are possible, as long as, the required magnetic field strength stays within the defined limits. However, a magnetic field outside the specified range may still produce usable results, but the out-of-range condition will be indicated by an alarm forcing the output into the failure band. Figure 27. Vertical Placement of the Magnet N S Package surface Die surface 0. 2299±0. 100 0. 23 41±0. 10 0 www.austriamicrosystems.com/AS5163 0. 77 01±0. 1 50 Revision 2.7 31 - 36 AS5163 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 9 Package Drawings and Markings The device is available in a 14-Lead Thin Shrink Small Outline Package. Figure 28. Package Drawings and Dimensions AS5163 YYWWMZZ Symbol A A1 A2 b c D E E1 e L L1 Notes: Min 0.05 0.80 0.19 0.09 4.90 4.30 0.45 - Nom 1.00 5.00 6.40 BSC 4.40 0.65 BSC 0.60 1.00 REF Max 1.20 0.15 1.05 0.30 0.20 5.10 4.50 0.75 - Symbol R R1 S Θ1 Θ2 Θ3 aaa bbb ccc ddd N Min 0.09 0.09 0.20 0º - Typ 12 REF 12 REF 0.10 0.10 0.05 0.20 14 Max 8º - 1. Dimensions and tolerancing confirm to ASME Y14.5M-1994. 2. All dimensions are in miilimeters. Angles are in degrees. www.austriamicrosystems.com/AS5163 Revision 2.7 32 - 36 AS5163 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s Marking: YYWWMZZ. YY Year (i.e. 04 for 2004) WW Week M Assembly plant identifier ZZ Assembly traceability code JEDEC Package Outline Standard: MO - 153 Thermal Resistance Rth(j-a): 89 K/W in still air, soldered on PCB www.austriamicrosystems.com/AS5163 Revision 2.7 33 - 36 AS5163 Datasheet - R e v i s i o n H i s t o r y Revision History Revision 0.1 1.1 2.4 Date Oct 06, 2008 Nov 04, 2008 May 31, 2010 Jun 18, 2010 apg Owner Description Initial version Added package drawings and dimensions Updated according to 2.4 specification document Changed DITH_DISABLE to DAC_MODE, updated Ordering Information. Updated Absolute Maximum Ratings, Operating Conditions, Magnetic Input Specification, Electrical System Specifications, Figure 4, Table 9, Table 10, Table 14, Figure 11, Programming Procedure, Figure 28, Ordering Information. Deleted chapter on “Choosing the Proper Magnet”. Updated Section 6.3 Updated Table 5, Table 6, Table 10, Table 14, Table 15, page 29, Figure 28. 2.5 Sep 21, 2010 rfu 2.6 2.7 Oct 14, 2010 Oct 28, 2010 mub Note: Typos may not be explicitly mentioned under revision history. www.austriamicrosystems.com/AS5163 Revision 2.7 34 - 36 AS5163 Datasheet - O r d e r i n g I n f o r m a t i o n 10 Ordering Information The devices are available as the standard products shown in Table 18. Table 18. Ordering Information Ordering Code AS5163-HTSV AS5163-HTSP Description 12-Bit High Voltage Rotary Magnetic Encoder Delivery Form Tubes Tape & Reel Package 14-pin TSSOP Note: All products are RoHS compliant and austriamicrosystems green. Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect Technical Support is found at http://www.austriamicrosystems.com/Technical-Support For further information and requests, please contact us mailto: sales@austriamicrosystems.com or find your local distributor at http://www.austriamicrosystems.com/distributor www.austriamicrosystems.com/AS5163 Revision 2.7 35 - 36 AS5163 Datasheet - C o p y r i g h t s Copyrights Copyright © 1997-2010, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. 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Contact Information Headquarters austriamicrosystems AG Tobelbaderstrasse 30 A-8141 Unterpremstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact www.austriamicrosystems.com/AS5163 Revision 2.7 36 - 36