AS8220A
F l e x R a y TM B a s i s Tra n s c e i v e r
O bj e c t i v e D a ta S h e e t
1 General Description
This objective data sheet describes the intended functionality of the AS8220A bus transceiver. As long the device is not fully qualified, the parameters are not characterized in the means that parameters may change or can be updated during final product qualification and characterization. This document shows the objective of the AS8220A and this document is subjected to change without notice. The AS8220A is a high-speed automotive transceiver for fault tolerant and high speed applications, operating as the bi-directional interface between a generic communication controller and the twisted pair copper wires. The device enables two-way communication with the microcontroller with full mode handling, including the low-power modes. The transmission rates up to 10Mbps as well as the implemented Bus Guardian interface enables this transceiver the usage in fault tolerant and hard real-time applications in the stringent automotive environment. An extended diagnostic interface, offers advanced busfailure detection capabilities with the intelligent combination of bus-current measurement and logical comparators. A thermal sensor circuit with an integral shutdown mechanism prevents damage to the device in extreme temperature conditions. The symmetrical transient control for the high- and low-side driver for both the busminus and bus-plus line allows an ideal balance of communications over different network topologies, with excellent EMC performance. The product is available in SSOP14 package. Figure 1. Block Diagram
VIO STBN ERRN
VIO
2 Key Features
Data transfer up to 10 Mbps Compliant with FlexRay Electrical Physical Layer Specification V2.1 Rev. B Excellent EMC performances. High common mode range insure excellent EMI Enable pin for an optional bus guardian Automatic thermal shutdown protection Low standby current Supports 2.5, 3, 3.3, 5 V micro controllers and automatically adapts to interface levels Protection against damage due to short circuit conditions on the bus (positive and negative battery voltage) Operating temperature range -40ºC to +125ºC
3 Applications
The device is ideal for high speed automotive bus systems, backbone bus and gateways, X-by-wire systems, redundant bus systems, bus topologies with Active Stars, and safety critical applications. Designed for FlexRay, where the basic features are demanded.
AS8220A
Host Controller Interface Bus Failure Detector BP BM
RxD TxD TxEN BGE
Communication Controller Interface
Digital Logic
Transmitter
Bus Guardian Interface
Receiver
Power Supply Interface VIO VCC GND
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AS8220A Objective Data Sheet
- Applications
Contents
1 General Description ............................................................................................................................... 1 2 Key Features ........................................................................................................................................... 1 3 Applications ............................................................................................................................................ 1 4 Pin Assignments .................................................................................................................................... 4
4.1 Pin Descriptions ................................................................................................................................................4
5 Absolute Maximum Ratings .................................................................................................................. 5 6 Electrical Characteristics....................................................................................................................... 6 7 Typical Operating Characteristics ...................................................................................................... 11 8 Detailed Description ............................................................................................................................. 12
8.1 Block Description.............................................................................................................................................12 8.2 Events..............................................................................................................................................................12 8.3 Operating Modes .............................................................................................................................................12 8.3.1 NORMAL mode .....................................................................................................................................13 8.3.2 STANDBY mode ...................................................................................................................................13 8.4 Non Operating Mode .......................................................................................................................................13 8.4.1 Power Off .............................................................................................................................................13 8.5 Undervoltage Events .......................................................................................................................................13 8.5.1 Undervoltage VIO...................................................................................................................................13 8.5.2 Undervoltage VCC .................................................................................................................................13 8.6 Power On/Off Events.......................................................................................................................................14 8.7 System Description .........................................................................................................................................14 8.8 Fail Silent Behavior .........................................................................................................................................15 8.8.1 State transitions due to under voltage detection ...................................................................................15 8.8.2 State transitions due to voltage recovery detection ..............................................................................15 8.9 Mode Transitions .............................................................................................................................................15 8.9.1 ERRN Signalling ...................................................................................................................................16 8.10 Loss of ground...............................................................................................................................................16 8.11 Error Flags Description ..................................................................................................................................16 8.11.1 Bus error .............................................................................................................................................16 8.11.2 Low current on BP high side driver .....................................................................................................16 8.11.3 Low current on BP low side driver.......................................................................................................16 8.11.4 Low current on BM high side driver.....................................................................................................16 8.11.5 Low current on BM low side driver ......................................................................................................16 8.11.6 High current on BP high side driver ....................................................................................................16 8.11.7 High current on BP low side driver ......................................................................................................16 8.11.8 High current on BM high side driver ....................................................................................................17 8.11.9 High current on BM low side driver .....................................................................................................17 8.11.10 BP open line ......................................................................................................................................17 8.11.11 BM open line .....................................................................................................................................17 8.11.12 BP short circuit to VCC .......................................................................................................................17 8.11.13 BP short circuit to GND .....................................................................................................................17 8.11.14 BM short circuit toVCC .......................................................................................................................17 8.11.15 BM short circuit to GND ....................................................................................................................17 8.11.16 Short circuit between BP and BM .....................................................................................................17 8.11.17 Over temperature ..............................................................................................................................17
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AS8220A Objective Data Sheet
- Applications
8.11.18 TxEN_BGE timeout ...........................................................................................................................17 8.11.19 Error flag ...........................................................................................................................................17 8.12 Status Flags Description................................................................................................................................17 8.12.1 Power on flag ......................................................................................................................................17 8.13 Transmitter ....................................................................................................................................................18 8.14 Receiver ........................................................................................................................................................20 8.14.1 8.14.2 8.14.3 8.14.4 Bus activity and idle detection (only in NORMAL mode).....................................................................20 Bus data detection (NORMAL mode)..................................................................................................20 Receiver test signal .............................................................................................................................22 Transceiver Timing..............................................................................................................................23
8.15 Test Circuits ...................................................................................................................................................24
9 Appendix ............................................................................................................................................... 25 10 Package Drawings and Markings...................................................................................................... 31 11 Ordering Information.......................................................................................................................... 32
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AS8220A Objective Data Sheet
- Pin Assignments
4 Pin Assignments
Figure 2. Pin Assignments SSOP14 Package
VIO TxD TxEN RxD BGE STBN
1 2 3 4 5 6 7
14 13 12
VCC BP BM GND ERRN
AS8220A
11 10 9 8
Pin Descriptions
Table 1. Pin Descriptions Pin Name VIO TxD TxEN RxD BGE STBN ERRN GND BM BP VCC Pin Number 1 2 3 4 5 6 10 11 12 13 14 Description I/O supply voltage Transmit data input Transmitter enable input Receive data output Bus guardian enable input Standby input Error diagnosis output Ground Bus line Minus Bus line Plus Supply Voltage
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AS8220A Objective Data Sheet
- Absolute Maximum Ratings
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in Section 6 Electrical Characteristics on page 6 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Parameter Supply Voltage (VCC) Supply Voltage (VIO) DC Voltage at EN, STBN, ERRN, TxD, RxD, TxEN, BGE, RxEN DC Voltage at BP and BM Input current (latchup immunity) Electrostatic discharge at bus lines BP and BM Electrostatic discharge Transient voltage on BP, BM Total power dissipation (all supplies and outputs) Storage temperature Junction temperature Package body temperature Humidity non-condensing
1
Min -0.3 -0.3 -0.3 -40 -100 -4 -2 -200
Max +7.0 +7.0 VIO + 0.3 +50 100 +4 +2 +200 150
Units V V V V mA kV kV V mW ºC ºC ºC %
Notes
VIO < VCC
According to JEDEC 78 According to AEC-Q100-002 According to AEC-Q100-002 According to ISO7637 part3 test pulses a and b; class C; RL=45 W, CL= 100 pF; (see Figure 17 on page 24).
-55 -40
+150 +150 250
5
85
1. The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD020C “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn).
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AS8220A Objective Data Sheet
- Electrical Characteristics
6 Electrical Characteristics
Tvj = -40 to +150 ºC, VCC = +4.75V to +5.25V, VIO = +2.2 to VCC, RL= 45Ω, CL= 100 pF unless otherwise specified. Table 3. Electrical Characteristics Symbol Supply Voltage Tamb VCC-VIO Ambient temperature Difference of supplies STANDBY Mode VCC = 0V to +5.25V ICC VCC current consumption NORMAL mode, driver enabled NORMAL Mode, driver enabled, RBUS = ∞Ω NORMAL mode, driver disabled IIO State Transitions tSTBN_RxD tSTANDBY Transmitter VBUS_DIFF_D0 VBUS_DIFF_D1 ΔVBUS_DIFF Differential bus voltage low in NORMAL mode (Data0) Differential bus voltage high in NORMAL mode (Data1) Matching between Data0 and Data1 differential bus voltage in NORMAL mode Common mode bus voltage in case of Data0 in NORMAL mode Common mode bus voltage in case of Data1 in NORMAL mode VBPdata0 - VBMdata0; 40Ω < RL < 55Ω VBPdata1 - VBMdata1; 40Ω < RL < 55Ω VBUS_DIFF_D0 - VBUS_DIFF_D1 40Ω < RL < 55Ω VBPdata0/2 + VBMdata0/2 40Ω < RL < 55Ω VBPdata1/2 + VBMdata1/2 40Ω < RL < 55Ω -2 0.6 -0.6 2 V V Delay STBN high to RxD high with wake flag set go-to STANDBY hold time INH1 low = 20% VBAT 1 10 50 70 µs µs VIO current consumption STANDBY mode VIO = 0V to +5.25V NORMAL Mode
1
Parameter
Conditions
Min -40 -0.1
1
Typ
Max +125 3.05 30 45 15 10 5 1
Units ºC V µA mA mA mA µA mA
-5 0 0 0 -5 0
-200 0.4 * VCC 0.4 * VCC -200
200 0.6 * VCC 0.6 * VCC 200 30
mV
VBUS_COM_D0
V
VBUS_COM_D1 ΔVBUS_COM VBUS_DIFF_Idle IBPBMShortMax IBMBPShortMax IBPGNDShortMax IBMGNDShortMax
V
Matching between Data0 V BUS_COM_D0 - VBUS_COM_D1 and Data1 common mode 40Ω < RL < 55Ω voltage Absolute differential bus voltage in idle mode Absolute max current when BP is shorted to BM Absolute max current when BP is shorted to GND Absolute max current when BM is shorted to GND VBP=VBM VBP= 0V VBM= 0V
mV mV mA mA mA
+100 +100 +100
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AS8220A Objective Data Sheet
- Electrical Characteristics
Table 3. Electrical Characteristics Symbol IBP-5VShortMax IBM-5VShortMax IBP27VShortMax IBM27VShortMax IBP48VShortMax IBM48VShortMax tTxD_BUS01 tTxD_BUS10 tTxD_MISMATCH tBUS10 tBUS01 tTxEN_BUS_Idle_Active tTxEN_BUS_Active_Idle tTxEN_MISMATCH tBGE_BUS_Idle_Active tBGE_BUS_Active_Idle tBUS_Idle_Active Parameter Absolute max current when BP is shorted to -5 V Absolute max current when BM is shorted to -5 V Absolute max current when BP is shorted to 27 V Absolute max current when BM is shorted to 27 V Absolute max current when BP is shorted to 48 V Absolute max current when BM is shorted to 48 V Delay time from TxD to BUS positive edge Delay time from TxD to BUS negative edge Delay time from TxD to BUS mismatch Fall time differential bus voltage Rise time differential bus voltage Delay time from TxEN to bus active Delay time from TxEN to bus idle Delay time from TxEN to bus mismatch Delay time from BGE to bus active Delay time from BGE to bus idle Differential bus voltage transition time: idle to active Differential bus voltage transition time: active to idle TxEN timeout BP, BM input resistance BP, BM differential input resistance Idle voltage in NORMAL mode on pin BP, BM Idle voltage in STANDBY mode on pin BP, BM Idle mode; RBUS=∞ Idle mode; RBUS=∞ NORMAL mode; VTxEN = VIO STANDBY mode 0.64 10 20 0.4* VCC -0.2 0.5* VCC 0 |tTxEN_BUS_Idle_Active tTxEN_BUS_Active_Idle| Conditions VBP= -5V VBM= -5V VBP= 27V VBM= 27V VBP= 48V VBM= 48V tTxD_RISE = 5ns tTxD_FALL = 5ns tTxD_BUS10 - tTxD_BUS01 80% - 20% of VBUS 20% - 80% of VBUS -4 3.75 3.75 Min Typ Max +100 +100 +100 +100 +100 +100 50 50 4 18.75 18.75 50 50 50 50 50 30 Units mA mA mA mA mA mA ns ns ns ns ns ns ns ns ns ns ns
tBUS_Active_Idle tTxEN_timeout Receiver RBP, RBM RDIFF VBPidle, VBMidle VBPidle_low, VBMidle_low
30 3.07 40 80 0.6* VCC +0.2
ns ms KΩ KΩ V V
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AS8220A Objective Data Sheet
- Electrical Characteristics
Table 3. Electrical Characteristics Symbol IBPidle IBMidle IBPleak, IBMleak VBUSActiveHigh Parameter Absolute idle output current on pin BP Absolute idle output current on pin BM Absolute leakage current, when not powered Activity detection differential input voltage high Activity detection differential input voltage low Data1 detection differential input voltage Data0 detection differential input voltage Mismatch between Data0 and Data1 differential input voltage Delay from BUS to RxD negative edge Delay from BUS to RxD positive edge Bit time Delay time from BUS to RxD mismatch Fall time RxD voltage Rise time RxD voltage Idle detection time Activity detection time Idle reaction time Activity reaction time VCC under-voltage recovery threshold VCC undervoltage detection threshold VIO undervoltage recovery threshold VIO undervoltage detection threshold Conditions -40V < VBP < 50V -40V < VBM < 50V VBP = VBM = 5V, VCC = 0V, VBAT = 0V; VIO = 0V NORMAL mode -10V < (VBP , VBM) < 15V NORMAL mode -10V < (VBP , VBM)< 15V Pre-condition: activity already detected. NORMAL mode. -10V < (VBP , VBM)< 15V Pre-condition: activity already detected. NORMAL mode. -10V < (VBP , VBM)< 15V 2 x (⎜⎜VData0⎜- ⎜VData1⎜⎜) / (⎜VData0⎜+⎜VData1⎜) CRxD = 15 pF CRxD = 15 pF CRxD = 15 pF
3
3 3
Min 0 0 0 150
Typ
Max 7.5 7.5 +10
Units mA mA uA mV
225
400
VBUSActiveLow
-400
-225
-150
mV
VData1
150
225
300
mV
VData0
-300
-225
-150
mV
VDataErr tBUS_RxD10 tBUS_RxD01 tBIT tRxD_ASYM tRxD_FALL tRxD_RISE tBUSIdleDetection tBUSActivitiyDetection tBUSIdleReaction tBUSActivityReaction
2
10 80 80 54
% ns ns ns
CRXD=15 pF; |tBUS_RxD10- tBUS_RxD01| 80% - 20% of VRxD; CRxD=15 pF CRxD=15 pF
3 3
5 5 5 50 100 50 100 200 250 300 350
ns ns ns ns ns ns ns
20% - 80% of VRxD;
3
VBUS: 400mV → 0V VBUS: 0V → 400mV VBUS: 400mV → 0V VBUS: 0V → 400mV
Supply Voltage Monitor VCCTHH VCCTHL VIOTHH VIOTHL 3.5 2.5 1.25 0.75 4.5 3.5 2.0 1.5 V V V V
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AS8220A Objective Data Sheet
- Electrical Characteristics
Table 3. Electrical Characteristics Symbol tUV_DETECT Parameter Detection time for undervoltage at VBAT, VCC, VIO Detection time for undervoltage recovery at VCC, VIO Absolute bus current for low current detection Absolute bus current for high current detection Differential voltage on BP and BM for detecting short circuit between bus lines Bus error detection time NORMAL mode, Transmitter enabled NORMAL mode, Transmitter enabled NORMAL mode, Transmitter enabled NORMAL mode, Transmitter enabled Conditions Min 100 Typ Max 700 Units ms
tUV_REC Bus Error Detection ITHL ITHH VSHORT tBUS_ERROR Over Temperature OTTH OTTL
0.7
5
ms
5 40 225 20
mA mA mV µs
Over temperature threshold Over temperature hysteresis Threshold for detecting TxD as on logical high Threshold for detecting TxD as on logical low TxD high level input current TxD low level input current Threshold for detecting TxEN as on logical high Threshold for detecting TxEN as on logical low TxEN high level input current TxEN low level input current RxD high level output voltage RxD low level output voltage Threshold for detecting STBN as on logical high Threshold for detecting STBN as on logical low STBN high level input current IRxD = -4mA, VIO = 5V IRxD = 4mA, VIO = 5V
150 10
180 20
ºC ºC
Communication Controller Interface VTxDIH VTxDIL ITxDIH ITxDIL VTxENIH VTXENIL ITxENIH ITxENIL VRxDOH VRxDOL Host Interface VSTBNIH VSTBNIL ISTBNIH 0.7* VIO 0.3* VIO 30 100 V V µA 0.7* VIO 0.3* VIO 30 -5 100 5 0.7* VIO 0.3* VIO -5 -100 0.8* VIO 0 5 -30 1.0* VIO 0.2* VIO V V µA µA V V µA µA V V
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AS8220A Objective Data Sheet
- Electrical Characteristics
Table 3. Electrical Characteristics Symbol ISTBNIL tSTBN_DEB_STBY tSTBN_DEB_NORM VERRNOH VERRNOL Parameter STBN low level input current STBN de-bouncing time STANDBY mode STBN de-bouncing time NORMAL mode ERRN high level output voltage ERRN low level output voltage Threshold for detecting BGE as on logical high Threshold for detecting BGE as on logical low BGE high level input current BGE low level input current 0.3* VIO 30 -5 100 5 IERRN = -4mA, VIO = 5V IERRN = 4mA, VIO = 5V Conditions Min -5 0.1 0.1 0.8* VIO 0 Typ Max 5 40 2 1.0* VIO 0.2* VIO 0.7* VIO Units µA µs µs V V
Bus Guardian Interface VBGEIH VBGEIL IBGEIH IBGEIL V V µA µA
1. STBN, ERRN, TxD, RxD, TxEN, and BGE open 2. Test condition: (VBP + VBM) / 2 = 2,5V ± 5% 3. For test signal (see Figure 15)
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AS8220A Objective Data Sheet
- Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
Figure 3. Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
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AS8220A Objective Data Sheet
- Detailed Description
8 Detailed Description
The AS8220A is a high-speed fault tolerant device operating as an interface between a generic controller and the copper wire physical bus. The AS8220A is designed to extend the application range for high speed and safety critical time triggered bus systems in an automotive environment. The drivers are short circuit protected against the positive and negative supply voltage to increase the robustness and reliability of automotive systems. The AS8220A operates at baudrates up to 10 Mbps to increase the bandwidth for automotive applications.
Block Description
The electrical AS8220A high-speed bus-system transceiver is the interface between a FlexRay™ network node module and the channel. The transceiver provides differential transmit and receive capability to the bus, allowing the node module bidirectional time multiplexed binary data stream transfer. Besides the transmit and receive function, the transceiver provides low power management, supply voltage monitoring (under voltage detection) as well as bus failure detection and represents a ESD-protection barrier between the bus and the ECU. The AS8220A consists of 8 different functional blocks (see Figure 1): Table 4. Functional Blocks Functional Block Host Controller Interface (HCI) Short Description Digital interface between the transceiver and the host controller (HC) The host interface comprises the read out handler, which delivers failure and status information via the ERRN pin to the host controller.
Communication Controller Interface Digital interface between the transceiver and the FlexRay communication (CCI) controller (CC) Bus Guarding Interface (BGI) Power Supply Interface (PSI) Digital interface between the transceiver and the FlexRay bus guardian (BG) The power supply interface consists of an sub functional block, the voltage monitor (VM) and includes two analogue inhibit outputs for signalling the internal state of the transceiver The digital signals from the functional blocks of the device are fed into the internal logic where the forwarding of FlexRay messages from analogue side to digital interfaces and vice versa is done. The state machine is performed in this block and is dealing the error, wake and power-on flags. The bus failure detector is directly connected to the bus pins, in order to detect several external failure conditions which may occur on the bus. The temperature protection turns off the output driver when reaching the specified internal temperature in order to protect the device. The transmitter provides the bus signals as specified on the bus lines. The receiver captures FlexRay valid signals on the bus lines and provides received data streams to the internal logic
Internal Logic (IL)
Bus Failure Detector (BFD) Temperature Protection (TP) Transmitter Receiver
Events
Transitions in order to change between the operation modes are possible only when events are detected. The device supports two type of events, events on the host controller interface (STBN) and detection of undervoltage or supply voltage recovery. Whenever an event is recognized, a transition can be performed.
Operating Modes
The AS8220A provides the following operating modes: NORMAL: non low power mode STANDBY: low power mode
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AS8220A Objective Data Sheet
- Detailed Description
NORMAL mode
In this mode the transceiver is able to send and receive data signals on the bus. TxEN and BGE control the state of the transmitter. RxD reflects the bus data and reflect the bus state. In this mode, the transmitter state can be selected as shown in the Table 5. In case the over-temperature flag is set the transmitter is disabled. The bus wires are terminated to VCC/2 via receiver input resistances. Table 5. Transmitter State BGE H H X L TxEN L L H X TxD H L X X Transmitter state Enabled Enabled Disabled Disabled Bus State Data1 (BP is driven high, BM is driven low) Data0 (BP is driven low, BM is driven High) Idle (BP and BM are not driven) Idle (BP and BM are not driven)
tivityDetection,
If the differential bus voltage is higher than VBUSActivehigh or lower than VBUSActivelow for a time longer than tBUSActhen activity is detected on the bus (Bus = active), RxD is released. If, after the activity detection, the differential bus voltage is higher than VData1, RxD is high. If, after the activity detection, the differential bus voltage is lover than VData0, RxD is low.
If the absolute differential bus voltage is lower than VBUSActivehigh and higher than VBUSActivelow for a time longer than tBUSIdleDetection, then idle is detected on the bus (Bus=idle), RxD is switched to logical “high”
STANDBY mode
In this mode the transceiver is not able to send and receive data signals from the bus. The power consumption is significantly reduced respect the NORMAL mode. The bus wires are terminated to GND (bus state: Idle_LP).
Non Operating Mode
The AS8220A provides the following non operating mode:
Power Off
In this mode the transceiver is not able to operate. RxD is set to high and ERRN is set to low. The bus wires are not connected to GND (bus state: Idle_HZ).
Undervoltage Events
Undervoltage VIO
When VIO voltage falls below VIOTHL for a time longer than tUV_DETECT then the undervoltage VIO flag is set and it is reset when VIO exceeds the voltage threshold VIOTHH for a time longer than tUV_REC. The flag can be set or reset in all the operation modes. The flag is reset at power off.
Undervoltage VCC
When VCC voltage falls below VCCTHL for a time longer than tUV_DETECT then the undervoltage VCC flag is set and it is reset when VCC exceeds the voltage threshold VCCTHH for a time longer than tUV_REC. The flag can be set or reset in all the operation modes. The flag is reset at power off.
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AS8220A Objective Data Sheet
- Detailed Description
Power On/Off Events
Starting from power off mode a power on event occurs in case undervoltage flag is reset. Starting from every operation mode a power off event occurs in case VCC undervoltage flag is set.
System Description
Figure 9. State Diagram
Normal
C _V C
UV
Input: STBN = 1
VREC_VIO WHILE (STBN=1) OR STBN=1
Power Off
VREC_VCC
UV_VCC
UV_VCC
Standby
Input: STBN = 0
Note: In Table 7 the corresponding transition table is shown Prefix of “WHILE” is always the event and suffix in brackets checks the flags or in case of STBN the input condition. For example: VREC_VBAT WHILE (STBN=1) After the event VIO supply voltage recovery is detected, the transition is performed if STBN is “high”. Legend: UV_VIO: Undervoltage event and/or flag for VIO supply voltage UV_VCC: Undervoltage event and/or flag for VCC supply voltage VREC_VIO: Voltage recovery event and/or flag for VIO supply voltage VREC_VCC: Voltage recovery event and/or flag for VCC supply voltage
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AS8220A Objective Data Sheet
- Detailed Description
Fail Silent Behavior
In order to be fail silent, undervoltage detection on the two power supplies VIO and VCC is implemented VIO: Supply voltage for I/O digital level adaptation VCC: Supply voltage (+5V)
State transitions due to under voltage detection
In case of VIO undervoltage is detected, STANDBY mode will be entered regardless of the voltage present on pin STBN. In case VCC undervoltage is present, the device will enter power off mode (bus state: Idle_HZ), regardless on supply voltage at VIO and the voltage present on STBN.
State transitions due to voltage recovery detection
Starting from the power off, the device enters STANDBY mode only in case VCC undervoltage flag is reset.. When VCC ≤ VCCTHL the device is in power off state and the bus wires are not terminated (bus state: Idle_HZ).
Mode Transitions
In case all the undervoltage flags are reset the operation mode is selected by STBN according to Table 6. Table 6. Pin Signalling and Operating modes Inputs STBN Operation Mode OutPut RxD L Bus = Data_0 H Bus = Idle or Data_1 H RxEN L Bus = Active H Bus = Idle H
H
NORMAL
L
STANDBY
Where: H = Digital level high L = Digital level low x = Do not care Float = The analog output is not driven Table 7. Transition Table Supply Voltage Flag Event Intial Mode Normal Standby Power Off Any VIO L L →H H→L L X X VCC L L L L H→L L →H STBN H→L X H L →H X X Host Event Next Mode Standby Normal Standby Power Off
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AS8220A Objective Data Sheet
- Detailed Description
ERRN Signalling
The ERRN signalling is shown in Table 8. Table 8. ERRN signalling SUPPLY VOLTAGE FLAG EVENT VIO L L L Note: ERROR means the logic OR of the error flags HOST COMMAND STBN H L X ERRN not failure H L
Loss of ground
In case the ground of the device is disconnected and the host pins are open, the bus lines are switched to Idle_HZ.
Error Flags Description
Bus error
The bus error flag is set when 2 consecutive rising edges on the TxD pin without any rising edge on the RxD pin are detected or when 2 consecutive falling edges on the TxD pin without any falling edge on the RxD pin are detected. This flag is reset when a rising edge on the TxD pin is followed by a rising edge on RxD pin before of the next TxD rising edge or when a falling edge on the TxD pin is followed by a falling edge on RxD pin before of the next TxD falling edge. This flag can be set or reset only in NORMAL mode when the transmitter is enabled. The flag is reset at power off.
Low current on BP high side driver
This flag can only be set/reset in NORMAL mode when the driver is enabled and during the transmission of a stable Data1 longer than tBUS_ERROR. If the absolute value of the BP pin current is lower than ITHL after tBUS_ERROR since the driver enable signal then the flag is set otherwise it is reset. The flag is reset at power off.
Low current on BP low side driver
This flag can only be set/reset in NORMAL mode when the driver is enabled and during the transmission of a stable Data0 longer than tBUS_ERROR. If the absolute value of the BP pin current is lower than ITHL after tBUS_ERROR since the driver enable signal then the flag is set otherwise it is reset. The flag is reset at power off.
Low current on BM high side driver
This flag can only be set/reset in NORMAL mode when the driver is enabled and during the transmission of a stable Data0 longer than tBUS_ERROR. If the absolute value of the BM pin current is lower than ITHL after tBUS_ERROR since the driver enable signal then the flag is set otherwise it is reset. The flag is reset at power off.
Low current on BM low side driver
This flag can only be set/reset in NORMAL mode when the driver is enabled and during the transmission of a stable Data1 longer than tBUS_ERROR. If the absolute value of the BM pin current is lower than ITHL after tBUS_ERROR since the driver enable signal then the flag is set otherwise it is reset. The flag is reset at power off.
High current on BP high side driver
This flag can only be set/reset in NORMAL mode when the driver is enabled and during the transmission of a stable Data1 longer than tBUS_ERROR. If the absolute value of the BP pin current is higher than ITHH after tBUS_ERROR since the driver enable signal then the flag is set otherwise it is reset. The flag is reset at power off.
High current on BP low side driver
This flag can only be set/reset in NORMAL mode when the driver is enabled and during the transmission of a stable Data0 longer than tBUS_ERROR. If the absolute value of the BP pin current is higher than ITHH after tBUS_ERROR since the driver enable signal then the flag is set otherwise it is reset. The flag is reset at power off.
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AS8220A Objective Data Sheet
- Detailed Description
High current on BM high side driver
This flag can only be set/reset in NORMAL mode when the driver is enabled and during the transmission of a stable Data0 longer than tBUS_ERROR. If the absolute value of the BM pin current is higher than ITHH after tBUS_ERROR since the driver enable signal then the flag is set otherwise it is reset. The flag is reset at power off.
High current on BM low side driver
This flag can only be set/reset in NORMAL mode when the driver is enabled and during the transmission of a stable Data1 longer than tBUS_ERROR. If the absolute value of the BM pin current is higher than ITHH after tBUS_ERROR since the driver enable signal then the flag is set otherwise it is reset. The flag is reset at power off.
BP open line
This flag is the logical “AND” between: low current on BP high side and low current on BP low side.
BM open line
This flag is the logical “AND” between: low current on BM high side and low current on BM low side.
BP short circuit to VCC
This flag is the logical “AND” between: low current on BP high side and high current on BP low side.
BP short circuit to GND
This flag is the logical “AND” between: high current on BP high side and low current on BP low side.
BM short circuit toVCC
This flag is the logical “AND” between: low current on BM high side and high current on BM low side.
BM short circuit to GND
This flag is the logical “AND” between: high current on BM high side and low current on BM low side.
Short circuit between BP and BM
This flag can only be set or reset in NORMAL mode when the driver is enabled. After a time tBUS_ERROR since TxD edge if the absolute value of the differential bus voltage is lower than VSHORT then the flag is set otherwise it is reset. he flag is reset at power off.
Over temperature
This flag can only be set or reset in the non low power modes. The flag is set when the junction temperature exceeds OTTH and it is reset when the junction temperature falls below OTTL.
TxEN_BGE timeout
This flag can only be set in NORMAL mode when the driver is enabled (TxEN is low and BGE is high) for a time longer than tTxEN_max. It is reset every transition on TxEN or BGE or if the device exits NORMAL mode. If the flag is set the driver is disabled.
Error flag
This flag is set if at least one error flag or if VIO flag is set and it is reset if none of the previous flag is set.
Status Flags Description
Power on flag
The power on flag is set leaving the power off state and it is reset entering a low power mode after a non low power mode.
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AS8220A Objective Data Sheet
- Detailed Description
Transmitter
The transmitter generates out of a digital input signal on TxD the FlexRay differential bus voltage. The transmitter is only active in NORMAL mode when BGE is on logical high and TxEN is on logical low. Figure 10. Transmitter characteristics (TxD → BUS)
VTxD
70% * VIO 30% * VIO Data1: x * tBIT Data0: x * tBIT
VBUS
tTxD_BUS01 VBUS_DIFF_D1 80% * VBUS_DIFF
+ VBUS_DIFF_Idle - VBUS_DIFF_Idle
tTxD_BUS10
tBUS01
tBUS01
20% * VBUS_DIFF VBUS_DIFF_D0 Data1: x * tBIT Data0: x * tBIT
Figure 11. Transmitter characteristics (TxEN → BUS)
VTxEN
70% * VIO 30% * VIO < tTxEN_timeout < tTxEN_timeout
VBUS
tTxEN_BUS_Active_Idle VBUS_DIFF_D1 300 mV
+ VBUS_DIFF_Idle - VBUS_DIFF_Idle
tTxEN_BUS_Idle_Active
tBUS_Active_Idle
tBUS_Idle_Active
- 300 mV VBUS_DIFF_D0
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- Detailed Description
Figure 12. Timing characteristics (BGE → BUS)
VBGE
70% * VIO 30% * VIO < tTxEN_timeout < tTxEN_timeout
VBUS
tBGE_BUS_Active_Idle VBUS_DIFF_D1 300 mV
+ VBUS_DIFF_Idle - VBUS_DIFF_Idle
tBGE_BUS_Idle_Active
tBUS_Active_Idle
tBUS_Idle_Active
- 300 mV VBUS_DIFF_D0
In NORMAL mode the transmitter drives on the bus Idle in case no data are transmitted. In STANDBY mode the transmitter drives Idle_LP (idle low power) on the bus pins. In POWER OFF mode the bus pins shows Idle_HZ (idle high impedance).
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- Detailed Description
Receiver
The receiver generates from the FlexRay differential bus voltage a digital signal on the RxD pin. RxD shows the data (Data0 and Data1). The receiver is only active in NORMAL mode. Figure 13. Timing characteristics of the bus signals to RxD
VBUS
VBUS_ ActiveHigh VData1
+VBUS_DIFF_Idle - VBUS_DIFF_Idle
VBUS_ ActiveLow VData0 Data0: x * tBIT Data1: x *tBIT
VRxD
tBUS_RxD10
tBUS_RxD01 tRxD_RISE tRxD_FALL
70% *VIO 30% *VIO
Bus activity and idle detection (only in NORMAL mode)
If the absolute differential bus voltage is higher than VBUSActiveLow and less than VBUSActiveHigh for a time longer than tBUSIdleDetection, bus Idle is detected, RxD is switched to logical high after a time tBUSIdleReaction. If the absolute differential bus voltage is higher than VBUSActiveHigh or lower than VBUSActiveLow for a time loner than tBUSActivitiyDetection, bus Activity is detected, RxD is following the detected bus data states as indicated below with a time tBUSActivityReaction. Table 9. Logic table for receiver bus signal detection Receiver Operation mode NORMAL mode Bus signals Idle Data0 Data1 RxD H L H
Bus data detection (NORMAL mode)
If, after the activity detection the differential bus voltage is higher than VData1, RxD will be high after a time tBUS_RxD01. If, after the activity detection the differential bus voltage is lower than VData0, RxD will be low after a time tBUS_RxD10.
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- Detailed Description
Figure 14. Receiver characteristics (BUS → RxD, )
VRxD
VBUS
VBUS_ ActiveLow VData0 Data0 Activity VBUS_ ActiveHigh VData1 Data1 Activity
VBUS
Idle
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Receiver test signal
Figure 15. Receiver test signal
V BUS
400 mV
22 ns
22 ns
300 mV
-300 mV
-400 mV tBIT
RxD
tBUS_RxD01
tBUS_RxD10
V BUS
400 mV
22 ns
22 ns
300 mV
-300 mV
-400 mV tBIT
RxD
tBUS_RxD10
tBUS_RxD01
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tTxD_BUS01 tTxD_BUS10 tBGE_BUS_Idle_Active tTxEN_BUS_Idle_Active
0.7 * Vcc tBGE_BUS_Active_Idle tTxEN_BUS_Active_Idle
Transceiver Timing
AS8220A Objective Data Sheet
Figure 16. Timing Diagram
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80 % tBUS_Idle_Active 30 mV -300 mV -300 mV 30 mV -300 mV 20 % tBUS_Active_Idle tBUS_RxD10 tBUSIdleReaction tBUSActivityReaction tBUS01 tBUS10
TxD
0.3 * Vcc
- Detailed Description
BGE
0.7 * Vcc
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TxEN
0.3 * Vcc
300 mV
VBUS
0.7 * VIO
RxD
0.3 * VIO
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tBUS_RxD01
AS8220A Objective Data Sheet
- Detailed Description
Test Circuits
Figure 17. Test Circuit for Automotive Transients
+5V Transients in accordance with ISO: 7637 test pulses 1, 2, 3a, 3b, 4, 5 Test conditions Normal mode bus idle : Normal mode bus active(TXD=5 MHz, TXEN=1kHz)
100nF
14 VCC
1 VIO RXD 4
15pF
AS8220
BP
13
1nF ISO7637 PULSE GENERATOR
BM
12
RL
CL 1nF
Figure 18. Test circuit for dynamic characteristics
+5V
100nF
14 VCC
1 VIO RXD 4
AS 8220
BP
15pF 13
BM
12
RL
CL
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- Appendix
9 Appendix
The following table shows the comparison of conventions used in AS8220A datasheet and FlexRay Electrical Physical Layer Specification V2.1 Rev. B. Table 10. Comparison table AS8220A Datasheet Symbol General Parameters Supply Voltage Tamb VCC - VIO ICC IIO State Transitions tSTBN_RxD tSTANDBY Transmitter VBUS_DIFF_D0 VBUS_DIFF_D1 Differential bus voltage low in NORMAL mode (Data0) Differential bus voltage high in NORMAL mode (Data1) Delay STBN high to RxD high with wake flag set go-to STANDBY hold time Ambient temperature Difference of supplies VCC current consumption VIO current consumption T Ambient temperature Battery Supply Voltage (VBAT) Supply Voltage (VCC) Supply Voltage (VIO) DC Voltage at EN, STBN, ERRN, TxD, RxD, TxEN, BGE, RxEN DC Voltage on pin WAKE, INH1, INH2 DC Voltage at BP and BM Input current (latchup immunity) Electrostatic discharge at bus lines BP, BM, VBAT, WAKE Electrostatic discharge Transient voltage on BP, BM Transient voltage on VBAT Total power dissipation (all supplies and outputs) Storage temperature Junction temperature Package body temperature Humidity non-condensing uESDExt uESDint ESD protection on pins that lead to ECU external terminals ESD on all other pins Parameter FlexRay Electrical Physical Layer Specification V2.1 RevB Name Description
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- Appendix
Table 10. Comparison table AS8220A Datasheet Symbol Parameter Matching between Data0 and Data1 differential bus voltage in NORMAL mode Common mode bus voltage in case of Data0 in NORMAL mode Common mode bus voltage in case of Data1 in NORMAL mode Matching between Data0 and Data1 common mode voltage Absolute differential bus voltage in idle mode Absolute max current when BP is shorted to BM Absolute max current when BP is shorted to GND Absolute max current when BM is shorted to GND Absolute max current when BP is shorted to -5 V Absolute max current when BM is shorted to -5 V Absolute max current when BP is shorted to 27 V Absolute max current when BM is shorted to 27 V Absolute max current when BP is shorted to 48 V Absolute max current when BM is shorted to 48 V Delay time from TxD to BUS positive edge Delay time from TxD to BUS negative edge Delay time from TxD to BUS mismatch Fall time differential bus voltage Rise time differential bus voltage FlexRay Electrical Physical Layer Specification V2.1 RevB Name Description
VBUS_DIFF
-
-
VBUS_COM_D0
-
-
VBUS_COM_D1
-
-
VBUS_COM VBUS_DIFF_Idle IBPBMShortMax IBMBPShortMax IBPGNDShortMax IBMGNDShortMax IBP-5VShortMax IBM-5VShortMax IBP27VShortMax IBM27VShortMax IBP48VShortMax IBM48VShortMax tTxD_BUS01 tTxD_BUS10 tTxD_MISMATCH tBUS_10 tBUS_01
uBDTxidle IBPBMShortMax IBMBPShortMax IBPGNDShortMax IBMGNDShortMax IBP-5VShortMax IBM-5VShortMax IBPBAT27VShortMax IBMBAT27VShortMax IBPBAT48VShortMax IBMBAT48VShortMax dBDTx10 dBDTx01 dTxAsym dBusTx10 dBusTx01
Absolute value of uBus, while Idle Absolute maximum output current when BP shorted to BM Absolute maximum output current when shorted to GND Absolute maximum output current when shorted to GND Absolute maximum output current when shorted to -5V A Absolute maximum output current when shorted to -5V Absolute maximum output current when shorted to 27V Absolute maximum output current when shorted to 27V Absolute maximum output current when shorted to 48V Absolute maximum output current when shorted to 48V Transmitter delay, negative edge Transmitter delay, positive edge Transmitter delay mismatch | dBDTx10 - dBDTx01 | Fall time differential bus voltage (80% → 20%) Rise time differential bus voltage (20% → 80%)
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AS8220A Objective Data Sheet
- Appendix
Table 10. Comparison table AS8220A Datasheet Symbol tTxEN_BUS_Idle_Acti
ve le
FlexRay Electrical Physical Layer Specification V2.1 RevB Name dBDTxia dBDTxai dBDTxDM dBDTxia dBDTXai dBusTxia dBusTxai Description Propagation delay idle →active Propagation delay active → idle | dBDTxia - dBDTxai | Propagation delay idle → active Propagation delay active → idle Transition time idle → active Transition time active → idle Receiver common mode input resistance Bus bias voltage during BD_Normal mode Bus bias voltage during low power modes Absolute leakage current, when not powered Upper receiver threshold for detecting activity Lower receiver threshold for detecting activity Receiver threshold for detecting Data_1 Receiver threshold for detecting Data_0 Mismatch of receiver thresholds Receiver delay, negative edge Receiver delay, positive edge
Parameter Delay time from TxEN to bus active Delay time from TxEN to bus idle Delay time from TxEN to bus mismatch Delay time from BGE to bus active Delay time from BGE to bus idle Differential bus voltage transition time: idle to active Differential bus voltage transition time: active to idle TxEN timeout
tTxEN_BUS_Active_Id tTxEN_MISMATCH tBGE_BUS_Idle_Activ
e e
tBGE_BUS_Active_Idl tBUS_Idle_Active tBUS_Active_Idle tTxEN_timeout Receiver RBP, RBM RDIFF VBPidle, VBMidle VBPidle_low, VBMidle_low IBPidle IBMidle IBPleak, IBMleak VBUSActiveHigh VBUSActiveLow VData1 VData0 VDataErr tBUS_RxD10 tBUS_RxD01
BP, BM input resistance BP, BM differential input resistance Idle voltage in NORMAL mode on pin BP,BM Idle voltage in NORMAL mode on pin BP, BM Absolute idle output current on pin BP Absolute idle output current on pin BM Absolute leakage current, when not powered Activity detection differential input voltage high Activity detection differential input voltage low Data1 detection differential input voltage Data0 detection differential input voltage Mismatch between Data0 and Data1 differential input voltage Delay from bus to RxD negative edge Delay from bus to RxD positive edge
RCM1, RCM2 uBias uBias iBPLeak, iBMLeak uBusActiveHigh uBusActiveLow uData1 uData0 uData dBDRx10 dBDRx01
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- Appendix
Table 10. Comparison table AS8220A Datasheet Symbol tBIT tRxD_ASYM tBUSIdleDetection tBUSActivityDetection tBUSIdleReaction tBUSActivityReaction Supply Voltage Monitor VCCTHH VCCTHL VIOTHH VIOTHL tUV_DETECT tUV_REC Bus Error Detection ITHL ITHH VSHORT Absolute bus current for low current detection Absolute bus current for high current detection Differential voltage on BP and BM for detecting short circuit between bus lines Bus error detection time Detection only required while actively transmitting a data frame, error indication to host latest when transmission stops. VCC undervoltage recovery threshold VCC undervoltage detection threshold VIO undervoltage recovery threshold VIO undervoltage detection threshold Detection time for undervoltage at VCC, VIO Detection time for undervoltage recovery at VCC, VIO uUVCC uUVIO dUVCC, dUVIO Undervoltage detection threshold Undervoltage detection threshold Undervoltage reaction time Parameter Bit time Delay time from bus to RxD mismatch Idle detection time Activity detection time Idle reaction time Activity reaction time FlexRay Electrical Physical Layer Specification V2.1 RevB Name dRxAsym dIdleDetection dActivityDetection dBDRxai dBDRxia Description Receiver delay mismatch | dBDRx10 – dBDRx01 | Filter-time for idle detection Filter-time for activity detection Idle reaction time Activity reaction time
tBUS_ERROR Over Temperature OTTH OTTL
-
Over temperature threshold Over temperature hysteresis
-
Communication Controller Interface VTxDIH Threshold for detecting TxD as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high
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- Appendix
Table 10. Comparison table AS8220A Datasheet Symbol VTxDIL ITxDIH ITxDIL VTxENIH Parameter Threshold for detecting TxD as on logical low TxD high level input current TxD low level input current Threshold for detecting TxEN as on logical high Threshold for detecting TxEN as on logical low TxEN high level input current TxEN low level input current RxD high level output voltage FlexRay Electrical Physical Layer Specification V2.1 RevB Name uVIO-IN-LOW uVIO-IN-HIGH Description Threshold for detecting a digital input as on logical low Threshold for detecting a digital input as on logical high Threshold for detecting a digital input as on logical low Output voltage on a digital output, when in logical high state Output voltage on a digital output, when in logical low state
VTXENIL ITxENIH ITxENIL VRxDOH
uVIO-IN-LOW uVIO-OUT-HIGH
VRxDOL Host Interface VSTBNIH
RxD low level output voltage
uVIO-OUT-LOW
Threshold for detecting STBN as on logical high Threshold for detecting STBN as on logical low STBN high level input current STBN low level input current STBN de-bouncing time low power modes STBN de-bouncing time non low power modes ERRN high level output voltage
uVIO-IN-HIGH
Threshold for detecting a digital input as on logical high Threshold for detecting a digital input as on logical low Output voltage on a digital output, when in logical high state Output voltage on a digital output, when in logical low state
VSTBNIL ISTBNIH ISTBNIL tSTBN_DEB_LP tSTBN_DEB_NLP VERRNOH
uVIO-IN-LOW uVIO-OUT-HIGH
VERRNOL
ERRN low level output voltage
uVIO-OUT-LOW
Bus Guardian Interface VBGEIH Threshold for detecting BGE as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high
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- Appendix
Table 10. Comparison table AS8220A Datasheet Symbol VBGEIL IBGEIH IBGEIL Parameter Threshold for detecting BGE as on logical low BGE high level input current BGE low level input current FlexRay Electrical Physical Layer Specification V2.1 RevB Name uVIO-IN-LOW Description Threshold for detecting a digital input as on logical low -
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AS8220A Objective Data Sheet
- Package Drawings and Markings
10 Package Drawings and Markings
Figure 19. package Diagram
Table 11. package Dimensions Symbol Min Typ A 1.73 1.86 A1 0.05 0.13 A2 1.68 1.73 b 0.25 b1 0.25 0.30 C 0.09 C1 0.09 0.15 D See Variations E 5.20 5.30 e 0.65 BSC H 7.65 7.80
Max 1.99 0.21 1.78 0.38 0.33 0.20 0.16 5.38 7.90
Symbol L L1 N R AA AB AC AD AE AF
Min 0.63
0º 0.09 6.07 6.07 7.07 8.07 10.07 10.07
Typ 0.75 1.25 REF See Variations 4º 0.15 6.20 6.20 7.20 8.20 10.20 10.20
Max 0.95
8º 6.33 6.33 7.33 8.33 10.33 10.33
Note: 1. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters, angle is in degrees. 3. N is the total number of terminals.
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- Ordering Information
11 Ordering Information
Table 12. Ordering Information Type Marking Description Delivery Form Package
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AS8220A Objective Data Sheet
- Ordering Information
Copyrights
Copyright © 1997-2008, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact
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