AS8530

Datasheet AS8530 L IN Tr a ns ce i ve r w it h I nt eg ra t e d Volt a ge Re gul at or a nd MCU Interface for Automotive Applications 1 General Description The AS8530 is a general purpose companion IC for sensor and actuator LIN slaves offering LIN transceiver and low drop voltage regulator. It also provides a 2-wire microcontroller interface through shared EN and TX pins to access a window watchdog with RC oscillator, control registers, backup registers and monitoring information. The IC is fabricated in a high voltage CMOS technology which is able to withstand voltages up to 42V. The product is available in ep-SOIC8 package. Typically 45µA quiescent current in standby mode, Typically 35µA quiescent current in sleep mode Under voltage reset with factory options LIN bus transceiver l conforming to LIN 2.1, TX time out fail safe feature, over temperature warning and shut down Window watchdog if factory enabled Micro controller 2-wire interface through shared pins for watchdog trigger, monitoring, register read /write Chip ID for traceability and module ID 8 Backup registers to store data during VCC shut down ep-SOIC8 package -40ºC to +125ºC ambient operating temperature 2 Key Features Operating voltage 6V to 18V Linear, low-drop voltage regulator: VCC = 5V ±5% or 3.3V ±5% as a factory programming option 50mA load current Operating modes: Normal and Standby or Normal and Sleep as a factory option Figure 1. AS8530 LIN Transceiver Block Diagram 3 Applications The AS8530 is a System Basis Chip for automotive LIN networked sensor or actuator slaves. VSUP LDO VCC POR-VSUP Temperature Limiter TSHD AS8530 Control Signals POR-VCC RESET_VSUP_N RESET_VCC_N EN Mode Control LIN Wakeup WWD Output Reset Block RESET RESET_VSUP_N 2-Wire Interface Window Watchdog (WWD) VSUP Receiver RX 30k Transmitter Slew Control VCC 15k LIN TX GND LIN Transceiver www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 1 - 32 AS8530 Datasheet - C o n t e n t s Contents 1 General Description .................................................................................................................................................................. 2 Key Features............................................................................................................................................................................. 3 Applications............................................................................................................................................................................... 4 Pin Assignments ....................................................................................................................................................................... 4.1 Pin Descriptions.................................................................................................................................................................................... 1 1 1 4 4 5 Absolute Maximum Ratings ...................................................................................................................................................... 6 Electrical Characteristics........................................................................................................................................................... 6.1 Operating Conditions............................................................................................................................................................................ 6.2 Digital Inputs and Outputs .................................................................................................................................................................... 6.3 Detailed System and Block Specifications ........................................................................................................................................... 6.4 Low Dropout Regulator......................................................................................................................................................................... 6.5 LIN Transceiver .................................................................................................................................................................................... 6.5.1 6.5.2 6.5.3 6.5.4 5 6 6 6 7 7 8 6.3.1 Electrical System Specifications .................................................................................................................................................. 7 DC Electrical Characteristics ....................................................................................................................................................... 8 AC Electrical Characteristics ....................................................................................................................................................... 9 Temperature Limiter .................................................................................................................................................................. 10 TX Timeout Watchdog ............................................................................................................................................................... 10 11 12 6.6 VCC Undervoltage Reset and Window Watchdog.............................................................................................................................. 6.7 Two Port Serial Interface .................................................................................................................................................................... 7 Detailed Description................................................................................................................................................................ 7.1 Voltage Regulator (LDO) .................................................................................................................................................................... 7.2 Temperature Limiter............................................................................................................................................................................ 7.3 VSUP Undervoltage Reset ................................................................................................................................................................. 13 13 13 13 7.3.1 VSUP Undervoltage in Normal Mode......................................................................................................................................... 13 7.3.2 VSUP Undervoltage in Standby Mode / Sleep Mode................................................................................................................. 13 7.3.3 VSUP Undervoltage in Low Slew Mode..................................................................................................................................... 13 7.4 RESET................................................................................................................................................................................................ 7.5 VCC Undervoltage Reset ................................................................................................................................................................... 7.6 Window Watchdog (WWD) ................................................................................................................................................................. 7.7 LIN Transceiver .................................................................................................................................................................................. 7.8 Operating Modes and States.............................................................................................................................................................. 7.8.1 7.8.2 7.8.3 7.8.4 7.8.5 Normal Mode ............................................................................................................................................................................. Standby Mode............................................................................................................................................................................ Sleep Mode................................................................................................................................................................................ Temporary Shutdown Mode ...................................................................................................................................................... Thermal Shutdown State ........................................................................................................................................................... 14 14 14 15 15 15 15 15 16 16 17 7.9 State Diagram..................................................................................................................................................................................... 8 Application Information ........................................................................................................................................................... 8.1 Initialization......................................................................................................................................................................................... 8.2 Wake-Up............................................................................................................................................................................................. 8.3 Over-Temperature Shutdown ............................................................................................................................................................. 8.4 LIN BUS Transceiver .......................................................................................................................................................................... 18 18 19 19 19 8.4.1 Transmit Mode........................................................................................................................................................................... 19 8.4.2 Receive Mode............................................................................................................................................................................ 20 www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 2 - 32 AS8530 Datasheet - C o n t e n t s 8.5 RX and TX Interface ........................................................................................................................................................................... 8.6 MODE Input EN.................................................................................................................................................................................. 8.7 Serial Port Interface............................................................................................................................................................................ 8.8 Control and Diagnosis Registers ........................................................................................................................................................ 20 21 23 26 8.7.1 Device Configuration using 2-Wire Serial Port .......................................................................................................................... 23 8.8.1 Definition of Control and Status Registers................................................................................................................................. 26 9 Package Drawings and Markings ........................................................................................................................................... 10 Ordering Information............................................................................................................................................................. 28 31 www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 3 - 32 AS8530 Datasheet - P i n A s s i g n m e n t s 4 Pin Assignments Figure 2. Pin Assignments (Top View) EN VSUP LIN 1 8 VCC RESET 2 7 AS8530 3 6 TX VSS 4 5 RX 4.1 Pin Descriptions Table 1. Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name EN VSUP LIN VSS RX TX RESET VCC Pin Type Digital input with pull-down Supply pad Analog I/O Supply pad Digital output with pull-up Digital input with pull-up Digital output Supply pad 2kV ESD LIN transceiver receive signal, data out in test mode LIN transceiver transmit signal, clock in test mode Digital output referenced to VCC, active low Regulated 5V / 3.3V supply for loads up to 50mA. OTP selectable Special Requirements 2kV ESD Load dump (42V max), 4kV HBM ESD, Jump start (27V max) Conforms to LIN 2.1, 6kV HBM ESD Description Enable high-voltage compatible pin with pull down to VSS and ½ VCC trigger level, active high. Battery supply LIN Bus www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 4 - 32 AS8530 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 6 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Parameter Electrical Parameters VSUP EN DC Supply Voltage VCC LIN RESET, RX, TX Input current (latchup immunity) Iscr Electrostatic Discharge Electrostatic Discharge (ESD) Norm: AEC-Q-100-002 Continuous Power Dissipation Total operating power dissipation (all supplies and outputs) Pt Temperature Ranges and Storage Conditions Storage temperature (Tstrg) -55 +150 ºC The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/ JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). Represents a maximum floor life time of 168h 0.25 W epSOIC8 in still air, soldered on JEDEC standard board @125º ambient, static operation = no time limit ±2 ±4 ±6 kV For on board signals VCC, TX, RX, Reset For VSUP LIN to VSS, HBM Model -0.3 -0.3 -0.3 -27 -0.3 -100 42 VSUP + 0.3 7 +40 VCC + 0.3 100 V V V V V mA Norm: JEDEC 78 Transient up to 500ms duration Min Max Units Comments Package body temperature (Tbody) +260 ºC Humidity non-condensing Moisture Sensitive Level 5 3 85 % www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 5 - 32 AS8530 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics 6.1 Operating Conditions Symbol VSUP VSS TAMB Isupp Parameter Positive Supply Voltage Negative Supply Voltage Ambient temperature Supply Current Maximum junction temperature (TJ) 150ºC Conditions Normal operating condition Min 6 0 -40 +125 65 Typ Max 18 Units V V ºC mA 6.2 Digital Inputs and Outputs All pull-up, pull-downs have been implemented with active devices. RESET and RX have been measured with 100pF load. Symbol Parameter Conditions EN Input VIH VIL ILEAK Ipd_en VIH VIL ILEAK Ipu High level input voltage Low level input voltage Input leakage current Pull down current High level input voltage Low level input voltage Input leakage current Pull up current TX = VCC TX pulled to VSS RESET VOH VOL High level output voltage Low level output voltage IOUT = 1 mA, VSUP ≥ 6V VSUP ≥ 6V RX VOH VOL High level output voltage Low level output voltage IOUT = 1 mA, VSUP ≥ 6V VCC 0.5 VSS + 0.4 V V VCC 0.5 VSS + 0.4 V V -1 -30 TX 0.8VCC 0.2VCC +1 -10 V V µA µA EN = L EN = VCC -1 20 High Voltage Pin which can also be connected to VSUP 0.8VCC 0.2VCC +1 40 V V µA µA Min Typ Max Units www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 6 - 32 AS8530 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.3 Detailed System and Block Specifications 6.3.1 Electrical System Specifications Parameter Normal mode IDDnom 1 Symbol Conditions No load on VCC, LIN recessive, VSUP= 12V No load on VCC, LIN dominant, VSUP = 12V Up to 125°C ambient (no load), VSUP= 12V Up to 125°C ambient (no load), VSUP=12V Min Typ 300 700 45 35 Max Units µA µA µA µA Current consumption Stand-by mode Sleep mode 1. No external load on the LIN bus 6.4 Low Dropout Regulator The LDO block is a linear voltage regulator, which provides a regulated (band-gap stabilized) output voltage (VCC) from the battery supply voltage (VSUP). (6V < VSUP < 18V for option 1, 6V 500µA) 2.2 1 100 0.02 10 1 100 0.02 50 5 3.135 2.97 2.97 3.3 3.3 Conditions Option 1 Option 2 Min 4.75 3.135 -40 6 4.75 4.5 4.5 12 5.0 Typ Max 5.25 3.465 150 18 5.25 5.5 5.5 5.5 3.465 3.63 3.63 3.63 250 250 8 10 1 10 10 220 1 100 10 220 1 mA mV/V mV/mA mV/mA µF Ω nF Ω µF Ω nF Ω V Units V ºC V VCC Output Voltage Range www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 7 - 32 AS8530 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.5 LIN Transceiver 6.5.1 DC Electrical Characteristics (4.5V < VCC < 5.5V; 6V < VSUP < 18V; -40°C < TJ < 150°C, VBUS is the voltage on the LIN node. All voltages are with respect to ground (VSS); positive current flows into the pin. Symbol Driver Ibus_lim LIN_VOL Pull-up resistor Ibus_leak_rec Receiver Ibus_leak_dom Ibus_no_GND Ibus_no_bat Vbus_dom Vbus_rec Vbus_cnt Vhys Vbus_cnt = (Vth_dom + Vth_rec)/2 Vhys = (Vth_dom – Vth_rec) 3 Parameter Conditions 1 Min Typ Max Units Current limitation in Dominant State LIN = VSUP_max 40 120 200 mA Output Voltage BUS (dominant state), ILIN = 40mA (short-circuit condition tested at VOL = 2.5V) Normal mode (recessive BUS level on TX pin) Driver OFF; VSUP = 7.0V, 8V < VBUS < 18 Input Leakage current at receiver Driver OFF; Vbus = 0V; VSUP = 12V; VCC = 5V VSS = VSUP; VSUP = 12V; 2 0V < VBUS < 18V, VCC = 5V VSUP = VSS; 0V < VBUS < 18V, VCC = VSS 2 2 20 40 60 20 V kΩ µA Input Leakage current at receiver -1 -1 1 100 0.4 0.6 mA mA µA VSUP VSUP 0.525 0.175 VSUP VSUP 3 0.475 0.05 1. This failure condition triggers thermal shut down when shut down temperature threshold is exceeded. 2. Not production tested. 3. Vth_dom: Receiver threshold of the recessive to dominant LIN bus edge Vth_rec : Receiver threshold of the dominant to recessive LIN bus edge www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 8 - 32 AS8530 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.5.2 AC Electrical Characteristics Symbol Conditions Vth_rec(max) = 0.744 x VSUP; Vth_dom(max) = 0.581 x VSUP; VSUP = 6.0V to 18V; tbit = 50μs; D1 = tbus_rec(min) / (2 x tbit) Vth_rec (min) = 0.422 x VSUP; Vth_dom (min) = 0.284 x VSUP; VSUP = 6V to 18V; tbit = 50μs; D2 = tbus_rec(max) / (2 x tbit) Vth_rec (max) = 0.778 x VSUP; Vth_dom (max) = 0.616 x VSUP; VSUP = 6.0V to 18V; tbit = 96μs; D3 = tbus_rec(min) / (2 x tbit) Vth_rec (min) = 0.389 x VSUP; Vth_dom (min) = 0.251 x VSUP; VSUP = 6V to18V; tbit = 96μs; D4 = tbus_rec(max) / (2 x tbit) VCC = 5V; Propagation delay bus dominant to RX LOW VCC = 5V; Propagation delay bus dominant to RX HIGH Receiver Delay symmetry Wake-up delay time Transition from standby mode to normal mode (clock frequency is 128kHz ± 25%) Transition from normal mode to standby mode (clock frequency is 128kHz ± 25%) Receiver De-bounce time Guaranteed by design 1 220 -2 30 4 6 3 250 0.417 Min 0.369 Typ Max Units LIN Driver, Bus load conditions (CBUS ; RBUS): 1nF; 1kΩ / 6,8nF; 660Ω / 10nF; 500Ω D1 (worst case 20Kbps transmission) D2 (worst case 20kbps transmission) 0.581 D3 (worst case 10.4kbps transmission) D4 (worst case 10.4kbps transmission) tdLR tdHR tRS twake tsln tnsl trec_deb Cint 0.59 6 6 2 150 µs µs µs µs Clock cycles Clock cycles µs pF Note: Sleep-mode to Normal mode transition is identical to the Power-ON sequence after the remote wakeup event on LIN bus. The transition time will include the tRes (RESET time) and start-up time for the LDO. www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 9 - 32 AS8530 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s Figure 3. LIN Timing tbit TXD tbit tbus_dom(max) LIN Vth_rec(max) Vth_dom(max) Vth_rec(min) Vth_dom(min) tbus_rec(min) tbus_dom(min) tbus_rec(max) 6.5.3 Temperature Limiter Parameter Shut down temperature Conditions Junction temperature During shut down, the sensor must be powered by VSUP. Thermal shut down disables LDO and sets all drivers to high impedance, the IC returns from shut down with POR. The temperature beyond which the warning flag is set. The return temperature when the warning flag is cleared Min 139 Typ Max 171 Units ºC Tsd Symbol Tret Return temperature 121 149 ºC Totset Totclear Over-temp warning flag set Over-temp warning flag clear 121 103 149 127 ºC ºC 6.5.4 TX Timeout Watchdog Parameter Time out duration (dominant state) Conditions Min 0.5 Typ 1 Max 2 Units s Symbol tlin_wdog www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 10 - 32 AS8530 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.6 VCC Undervoltage Reset and Window Watchdog The values in this table are valid for normal and standby modes. All parameters are tested, unless mentioned otherwise. Symbol Vuvr_off Vuvr_on Vuvr1_off Vuvr1_on Vuvr2_off Vuvr2_on Vuvr3_off Vuvr3_on Vhyst_vcc trr Vsuvr_off Vsuvr_on WD_TCL WD_TSV tRes Tshd Parameter VCC under-voltage threshold off (Default) VCC under voltage threshold on (Default) VCC under voltage threshold off (Factory Option) VCC under voltage threshold on (Factory Option) VCC under voltage threshold off (Factory Option) VCC under voltage threshold on (Factory Option) VCC under-voltage threshold off (Factory Option) VCC under voltage threshold on (Factory Option) Hysteresis of under-voltage threshold on/off VCC Spike filter on VCC VSUP under-voltage threshold off VSUP under-voltage threshold on WWD non-service time (if factory enabled) WWD Service – time (if factory enabled) Reset delay time Temporary shutdown reset active time BOR level (considered to be the Master Reset for AS8530) RESET will be generated 12 Conditions Rising edge of VCC Falling edge of VCC Rising edge of VCC Falling edge of VCC Rising edge of VCC Falling edge of VCC Rising edge of VCC Falling edge of VCC 1 Min 2.55 2.3 3.0 2.75 3.5 3.25 4.0 3.75 0.1 4 Typ Max 2.95 2.7 3.4 3.15 3.9 3.65 4.4 4.15 Units V V V V V V V V V µs 1 1 1 1 1 Default and all other factory options To remove disturbance 0.25 0.4 3.85 3.25 0-75 75-150 6 0.1 0 -100 0-125 V V ms ms ms s RESET will not be generated 1 100-200 125-250 8 12 1 4ms, 16ms, 32ms (typ) are factory options (min = -25% and max = +50% of typical) 1. These are factory options which could be made available on specific request. 2. -40%, -20%, +20%, +60%, and +100% timings are available as factory options. www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 11 - 32 AS8530 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.7 Two Port Serial Interface Symbol General BR2WIRE_SPI TENSCLK_H TENSCLK_L Write timing tDI_SU tDI_HD Read timing tDO_S tDO_HD tDO_D tDI_HZ Data out setup time Data out hold time Data out delay Data in to high impedance delay Time for the Microcontroller to release the TX bus 20 20 To enter into 2-Wire SP mode To enter into Sleep/Standby mode 2 5 5 10 130 135 80 80 ns ns ns ns Data in setup time Data in hold time 20 10 ns ns Bit rate Clock high time Clock low time 2 2 250 Kbps µs µs Parameter Conditions Min Typ Max Units Timing parameters when entering 2-Wire SP mode Ttx_su Ttx_hd Ttx_SP_trigger TSTNDY_trigger Ten_ENSCLK TX setup time before EN goes Low TX hold time after EN goes High EN falling edge to TX falling edge TX high time from EN falling edge EN falling edge to start of 2-wire serial port clock ns ns µs cycles cycles www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 12 - 32 AS8530 Datasheet - D e t a i l e d D e s c r i p t i o n 7 Detailed Description The AS8530 chip consists of a low drop-out regulator and a LIN bus transceiver, which is a bi-directional bus interface for data transfer between LIN bus and the LIN protocol controller. Additionally integrated is a RESET unit with a power-on-reset delay and a programmable window watchdog. It also includes a watchdog time-out on LIN TX node to indicate if the microcontroller is stuck in a loop and to release unintentional LIN bus dominant state. 7.1 Voltage Regulator (LDO) The voltage regulator has three operating modes. The features of the operating modes are given below: Normal mode: Stability to be better ±0.25V over input range and temperature for load current up to 50mA. The LDO Output provides a voltage of 5V or 3.3V as OTP option. Standby mode: The Standby mode is a low quiescent current mode used in car applications that are always switched on. The load current in standby mode is 5mA. Quiescent current (no load) is less than 45mA typically at room temperature. Sleep mode: Power down or temporary shutdown of the regulator can be set by a register bit. This bit can be written through 2-wire MCU interface. The LDO takes the input from bandgap and scales it up to the required voltage. The LDO starts charging only after the POR-VSUP event occurs (RESET_VSUP_N switched from low to high). The LDO can be powered-down by a control signal (temporary shutdown register) for the temporary shutdown mode. 7.2 Temperature Limiter Temperature limiter produces a power down when temperature exceeds 155ºC ±10%. It powers up and generates a reset when it returns to 135ºC ±10% junction temperature. During thermal shut down, temperature sensor is supplied by VSUP. During the temperature ramp-up phase, as soon as the temperature exceeds 135ºC ±10%, a warning signal is issued and is written into the diagnostic register, which can be read through the SP interface. 7.3 VSUP Undervoltage Reset VSUP undervoltage reset generates a reset RESET_VSUP_N, switched from low to high when VSUP ramps up above VSUVR_OFF. This is used to enable proper initialization of mode control and diagnostic registers. If VSUP < VSUVR_ON, then RESET_VSUP_N switches from high level to low level (active). This is considered to be the master reset and will have the highest priority over all other signals. As soon as VSUP < VSUVR_ON, the LDO, LIN Transceiver is completely shut off and system comes to a complete stop. AS8530 enters into the normal operating mode only after VSUP > VSUVR_OFF. 7.3.1 7.3.2 VSUP Undervoltage in Normal Mode VSUP Undervoltage in Standby Mode / Sleep Mode Supply Voltages below VSUVR_OFF and above VSUVR_ON do not influence the voltage regulator. The output voltage VCC follows VSUP. No exit from the sleep mode or standby mode take place if the VSUP voltage drops down to VSUVR_OFF. If VSUP goes below VSUVR_ON, RESET_VSUP_N is active and resets the mode control and diagnostic register. The voltage regulator, LIN Transceiver modules are turned off. If VSUP rises again above VSUVR_OFF, RESET_VSUP_N is switched from low to high. The system enters normal mode where LIN Transceiver and LDO are switched on. 7.3.3 VSUP Undervoltage in Low Slew Mode The behavior of AS8530 at low VSUP voltages is equal to the sleep mode. The low slew mode (set by control register through serial interface as an option) will be cancelled, if VSUP drops below VSUVR_ON in this mode. The AS8530 enters the normal mode, if VSUP rises again above VSUVR_OFF. www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 13 - 32 AS8530 Datasheet - D e t a i l e d D e s c r i p t i o n 7.4 RESET Reset generates an external RESET signal to reset the microcontroller and all other external circuits. The reset functionality is illustrated in Figure 4. Reset consists of a digital buffer at the output. RESET signal can be affected by RESET_VCC_N (which is the under-voltage reset on VCC) and Window watchdog output. All those conditions which cause a drop in the VCC voltage will be detected from the low voltage reset unit, which in-turn generates a reset signal. States like Temporary shut-down, Over-temperature monitor will influence the RESET output through RESET_VCC_N signal only. Figure 4. Reset Functionality VSUP T>Tj T Tsd 128msec Temperature > Tsd otp_load Temporary Shutdown RESET TIMEOUT Tem shu porar tdo y wn RESET time > tRES Vcc < Vuvr_on || wwdtimeout test_en Temperature > Tsd rwake SLEEP Standby & sleep NORMAL RX=0 WAIT_TEST Temperature > Tsd y ndb sta by and ! st RX =0 otp _en y ar or n mp ow Te hutd s Temperature > Tsd Txwd_timeout STANDBY orary Temp wn o shutd Vcc < Vuvr_on ary por n Tem utdow sh TX=1 rw ak e_ wa it WAIT_OTP rwake Temperature > Tsd STANDBY WAIT Vcc < Vuvr_on Vcc < Vuvr_on || wwdtimeout TXWD WAIT Temperature > Tsd www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 17 - 32 AS8530 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8 Application Information 8.1 Initialization When the power supply is switched on, if VSUP > VSUVR_OFF, RESET_VSUP_N becomes inactive (high). After this, the voltage regulator starts with a default LDO output setting of 3.3V and Vuvr_off setting of 2.75V. If VCC > Vuvr_off (2.75V), active-low PORN_2_OTP is generated. The rising edge of PORN_2_OTP loads contents of fuse onto the OTP latch after load access time TLoad. LOAD_OTP_IN_PREREG signal loads contents of OTP latch onto the pre-regulator domain register. This register gives actual settings of LDO, Vuvr_off and Reset Timeout period TRes. This is done because the OTP block is powered by the VCC. If VCC > Vuvr_off (phase 2), Reset timeout is restarted. RESET signal is deasserted after Reset Timeout period TRes (phase 2) and then device enters into normal mode. The circuit initializes correctly also for very slow ramp on VSUP (of the order of 0.5V/min). Figure 7. Initialization Sequence for AS8530 Vsuvr_off VSUP RESET_VSUP_N PHASE 1 PHASE 2 LDO On Vuvr_off = from OTP Block, LDO setting = from OTP Block tRES = from OTP Block Device Settings LDO Off LDO On Vuvr_off = 2.75V, LDO setting = 3.3V tRES = 4msec Vuvr_off Vuvr_off VCC RESET_VCC_N PORN_2_OTP 6 Cycles of RC-Oscillator LOAD_OTP_IN_PREREG RESET If Phase 1 POR threshold != Phase 2 POR threshold Tres = Reset Timeout from OTP Block If Phase 1 POR threshold == Phase 2 POR threshold Tres = Reset Timeout from OTP Block www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 18 - 32 AS8530 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 4. VSUP>Vsuvr_on and VCC Vthr_cnt + 0.5 * Vthr_hys → RX = high This output is a push-pull driver between VCC and GND with an output current of 1mA. Figure 10. RX Output Circuitry AS8530 VCC RX MCU 8.6 MODE Input EN The AS8530 is switched from normal mode to the standby/sleep mode with a falling edge on EN and keeping TX high for TSTNDY_trigger time. Device is switched from standby mode to normal mode with a rising edge at the EN pin. The mode change for AS8530 with a falling edge at EN can be done independently from the state of the bus transceiver. Device enters into Serial port mode by forcing EN low and driving TX high to low within Ttx_SP_trigger time after EN forced to low. This ensures the direct control of device to enter into Standby/Sleep mode by microcontroller using EN pin. Figure 11. EN Pin Functionality Entry into Serial Port Mode Ten_ENSCLK EN TX Ttx_su Normal Mode RD LEN LEN A4 WR 1 0 D3 D2 D1 D0 TSTNDY_trigger Ttx_hd Standby/Sleep Mode Ttx_su Ttx_SP_trigger Normal Mode Serial Port Mode Normal Mode The EN input has an internal active pull down to secure that if this pin is not connected, a low level will be generated. www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 21 - 32 AS8530 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Figure 12. Enable Controlled via. MCU Cload EN VBAT + MCU + 5V VCC AS8530 VSUP LIN VSS RESET TX RX If the application doesn’t need the wake up capability of the AS8530, a direct connection EN to VCC is possible. In this case the AS8530 operates in permanent normal mode. Also possible is the external (outside of the module) control of the EN line via. VSUP signal as shown below. Figure 13. Permanent Normal Mode Cload EN VBAT + MCU + 5V VCC AS8530 VSUP LIN VSS RESET TX RX www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 22 - 32 AS8530 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.7 Serial Port Interface The interface is essentially used to trigger the window watchdog, to access test mode and read out diagnostic information for the AS8530. The description of this interface and the protocol is explained below. Information on block status and errors can be displayed by diagnosis registers. 8.7.1 Device Configuration using 2-Wire Serial Port The AS8530 device configuration register is programmed via a 2-wire Serial Programming Interface. EN/SCL is used as Serial Clock and TX/ SDA_IO is used as Serial Data. EN is used as clock input to access serial port registers in serial port mode. Also EN is used to control transition from normal mode to standby/sleep mode. The TX input of the device will be multiplexed as following: LIN TX for transmitting data from microcontroller on LIN bus SDA_IO for Serial data input/output, this will be used for serially accessing data from configuration and status register SP Frame. A frame is formed by first byte for command and address/configuration and following bit stream that can be formed by an integer number of bytes. Command is coded RD/WR on the first bits, length of the transfer is indicated by LEN1, LEN2 bits while address is given on LSB 5 bits. Table 6. Command Bits Command Bits RD/WR RD/WR 0 1 LEN1 Command WRITE READ LEN2 ADDRESS ADDRESS A4 Register Address or Transmission Configuration A3 A2 Description Writes data byte on the given starting address. Read data byte from the given starting address. A1 A0 Table 7. Transfer Length LEN1 0 0 1 1 LEN2 0 1 0 1 Length 1 2 4 8 Description Transfer consists of single Data phase. After completion of single Data phase device comes out of Serial port interface. Transfer consist of two Data phase. Transfer consist of four Data phase. Transfer consist of eight Data phase. Write Command. For Write command RD/WR = 0 After the command code, length of the transfer is send in next two bits, the address of register to be written has to be provided from the MSB to the LSB. Then one, two, four, or eight data bytes can be transferred from the MSB to the LSB. For each data byte following the first one, used address is the incremented value of the previously written address. Each bit of the frame has to be driven by the 2-Wire SP master on the SP clock (EN pin) positive edge and the 2-Wire SP slave (device) samples this bit on the next SP clock (EN pin) negative edge. In the following figures two examples of write command (without and with address self-increment). Figure 14. Protocol for Serial Data Write with Length = 1 EN TX 0 LEN1 LEN0 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Command & Address Phase Data Phase LEN1 = 0 LEN0 = 0 Length of Transaction = 1 Transfer edge Sampling edge Data D7 – D0 is moved to Address A4..A0 here www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 23 - 32 AS8530 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Figure 15. Protocol for Serial Data Write with Length = 4 EN TX 1 10 AAAAA 43210 D D DDD DDD DD D DDD DD DD DDDD DD DD D DD DD D 7 6 543 210 76 5 432 10 76 5432 10 76 5 43 21 0 LEN1 LEN0 Command & Address Phase LEN1 = 1 LEN0 = 0 Length = 4 Data1 Phase Data2 Phase Data3 Phase Data4 Phase Data D7-D0 is moved to Address A4-A0 + 3 here Data D7-D0 is moved to Address A4-A0 here Data D7-D0 is moved to Address A4-A0 + 1 here Data D7-D0 is moved to Address A4-A0 + 2 here Read Command. For Read command RD/WR=1. After the command code, length of the transfer is send in next two bits, the address of register to be read has to be provided from the MSB to the LSB. Then one, two, four or eight data bytes can be transferred from the SPI slave to the master, always from the MSB to the LSB. Each bit of the command and address sections of the frame have to be driven by the 2-Wire SP master on the SP clock (EN pin) positive edge and the 2-Wire SP slave (device) samples this bit on the next SP clock (EN pin) negative edge. Each bit of the data phase of the frame has to be driven by the 2-Wire SP slave (device) on the SP clock (EN pin) positive edge and the 2-Wire SP master samples this bit on the next SP clock (EN pin) negative edge. The following figures illustrate two examples of read command (without and with address self-increment.) Figure 16. Protocol for Serial Data Read with Length = 1 EN TX 0 LEN1 LEN0 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Command & Address Phase Data Phase LEN1 = 0 LEN0 = 0 Length of Transaction = 1 Transfer edge Sampling edge Data D7 – D0 at address A4 ..A0 is read here Transfer edge Sampling edge www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 24 - 32 AS8530 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Figure 17. Protocol for Serial Data Read with Length = 4 EN TX 1 10 AAAAA 43210 D D DDD DDD DD D DDD DD DD DDDD DD DD D DD DD D 7 6 543 210 76 5 432 10 76 5432 10 76 5 43 21 0 LEN1 LEN0 Command & Address Data2 Phase Data3 Phase Data4 Phase Data1 Phase Phase Data D7-D0 at Data D7-D0 at Data D7-D0 at Data D7-D0 at Data D7-D0 at LEN1 = 1 LEN0 = 0 Address A4-A0 Address A4-A0 +1 Address A4-A0 +2 Address A4-A0 +3 Address A4-A0 +4 Length = 4 is read here is read here is read here is read here is read here Timing. The following figures illustrate timing waveforms and parameters. Figure 18. Timing for Writing TENSCLK_H TENSCLK_L EN TDI_SU TDI_HD DATAI DATAI TX Figure 19. Timing for Reading TENSCLK_H TENSCLK_L TD0_D EN TDI_SU TDI_HD DATAI TDI_HZ DATAO TD0_D DATAO TX www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 25 - 32 AS8530 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.8 Control and Diagnosis Registers The serial interface can be used as interface between the ASSP AS8530 and an external micro-controller. The interface is a slave and only the micro-controller can start the communication. This interface will be used for device configuration, entering into test mode and carrying out diagnostic options. Refer to Table 8 for details on the configuration registers. 8.8.1 Definition of Control and Status Registers A total of 32 control, diagnosis and test registers, each of 8-bit can be accessed using the 2-wire serial interface. Table 8 provides a description of all control and status registers. Table 8. Configuration Registers Address Register Name POR Value RD / WR D0 Reserved D1 Reserved D2 Reserved 0 x 03 Device Configuration Register On POR_VCC 0000_1111 RD / WR D3 Enable / Disable LIN Transceiver 0 1 On POR_VSUP 0000_0001 Disabled Enabled Description Control and Configuration Register D7…D4 Reserved 0 x 04 Device Control Register RD / WR D7... D1 Reserved D0 Temporary shutdown control bit 0 x 05 Temporary Shutdown Register On POR_VCC 0000_0000 RD / WR 0 1 No Temporary shutdown Enter into Temporary shutdown D7…D1 Reserved D0 Window Watch Dog Trigger 0 x 06 Window Watch Dog Trigger Register On POR_VCC 0000_0000 WR This bit will be set by MCU to indicate trigger event. If this trigger occurs outside the Window of Watch dog counter, then RESET signal is asserted. Also on this trigger WWD counter is restarted and this bit will be cleared internally within 2 cycles of 128KHz clock. D7 … D1 Reserved 0 x 07 Low Side Driver Data Register On POR_VCC 0000_0000 RD / WR D7 … D0 Reserved www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 26 - 32 AS8530 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 8. Configuration Registers Address Register Name POR Value RD / WR Description D7..D0 = DR[7:0] 8 LSB bits of the 24 bit Diagnostic Register D0 PORVSUP (set when VSUP < Vsuvr_on, cleared after µC read) D1 UVVCC Under voltage VCC (set when VCC < Vuvr_on, cleared after µC read) D2 OTEMP160 Over-temperature Reset. (set when temp > Tsd, cleared after µC read) 0 x 08 Diagnostic Register 1 On POR_VSUP 0000_0011 RD D3 OTEMP140 Over-temperature warning (set when temp > Totset, cleared after µC read) D4 OVVBAT Overvoltage VBAT. (set when VSUP > Vovthh, cleared after µC read) D5 Reserved D6 RWAKE Remote Wakeup (set on Remote Wakeup event on LIN Bus, cleared after µC read) D7 WWDT Window watchdog timeout. (set on failure of Window watchdog timeout, cleared after µC read) D7..D0 = DR[15:8] next 8 LSB bits of the 24 bit Diagnostic Register. 0 x 09 Diagnostic Register 2 On POR_VSUP 0000_0000 RD D0 TXTIMEOUT Tx timeout of 1sec. (set on TX low > 1sec, cleared after µC read) D1 TEMPSHUT this bit is set on entering into temporary shutdown state and cleared after µC read. D7 D2 Reserved Note: When the device is powered ON @ ambient temperature of 125ºC, the status of the OVTEMP140 can be HIGH indicating an over temperature warning. This is because 125ºC is within the limits for the OVTEMP140. Diagnosis Register www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 27 - 32 AS8530 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 9 Package Drawings and Markings The device is available in a ep-SOIC8 package. Figure 20. Drawings and Dimensions YYWWIZZ AS8530* * The device marking for the VCC=5V option will change to AS85305. www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 28 - 32 AS8530 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s Symbol A A1 A2 b c D D1 E E1 E2 e L Min 0.00 1.25 0.31 0.17 2.24 1.55 0.41 Nom 4.90 BSC 3.10 6.00 BSC 3.90 BSC 2.41 1.27 BSC 0.64 Max 1.70 0.15 0.51 0.25 3.20 2.51 0.89 Symbol L1 L2 h θ aaa bbb ccc ddd eee fff N Min 0.25 0º - Nom 1.04 REF 0.25 BSC 0.10 0.20 0.10 0.25 0.10 0.15 8 Max 0.50 8º - Notes: 1. 2. 3. 4. Dimensions and tolerancing conform to ASME Y14.5M -1994. All dimensions are in miilimeters. Angles are in degrees. Datums A and B to be determined at datum H. Extrusion of exposed area in bottom side is 0.20mm typical. Marking: YYWWIZZ. YY Last two digits of the manufacturing year WW Manufacturing Week I Plant Identifier ZZ Traceability Code www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 29 - 32 AS8530 Datasheet - R e v i s i o n H i s t o r y Revision History Revision 1.0 Date 26 Nov, 2010 29 Nov, 2010 Owner mbl kpt Description Initial release Marking details updated under Ordering Information. Note: Typos may not be explicitly mentioned under revision history. www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 30 - 32 AS8530 Datasheet - O r d e r i n g I n f o r m a t i o n 10 Ordering Information The devices are available as the standard products shown in Table 9. Table 9. Ordering Information Ordering Code AS8530-ASOT-001 AS8530-ASOT-002 1 Marking AS85305 AS8530 Description VCC = 5V VCC = 3.3V Delivery Form Tape & Reel Tape & Reel Package ep-SOIC8 ep-SOIC8 1. For both product versions, the RESET delay time tRes as well as undervoltage threshold are set to default value and window watchdog is disabled. On special request, optional factory settings can be made available on specific vendor addendum. Note: All products are RoHS compliant and austriamicrosystems green. Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect Technical Support is available at http://www.austriamicrosystems.com/Technical-Support For further information and requests, please contact us mailto: sales@austriamicrosystems.com or find your local distributor at http://www.austriamicrosystems.com/distributor www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.0 31 - 32 AS8530 Datasheet - C o p y r i g h t s Copyrights Copyright © 1997-2010, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. 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