AP2011SA

AP2011 Synchronous PWM with VFC Controller Features - Single 10V to 40V Supply Application - 1.25V + 2.0% Voltage Reference - Virtual Frequency ControlTM. - Fast Transient Response. - Synchronous Operation for High Efficiency - Current Limit Function. - Small Size with Minimum External Components - Soft Start and Shutdown Functions - Industrial Temperature Range - Under Voltage Lockout Function - SOP-14L Pb-Free Package General Description The AP2011 is a low-cost, full featured, synchronous voltage-mode controller designed for use in single ended power supply applications where efficiency is of primary concern. Synchronous operation allows for the elimination of heat sinks in many applications. The AP2011 is ideal for implementing DC/DC converters needed to power advanced microprocessors in low cost systems or in distributed power applications where efficiency is important. Internal level-shift, high-side drive circuitry, and preset shoot-thru control, allows the use of inexpensive 1P+1N-channel power switches. AP2011’s features include temperature ompensated voltage reference, Virtual Frequency ControlTM method to reduce external component count, an internal virtual frequency 200KHz oscillator, under-voltage lockout protection, soft-start, shutdown function and current sense comparator circuitry. Virtual Frequency Control is a trademark of PWRTEK, LLC. Applications - Microprocessor Core Supply - Low Cost Synchronous Applications - Voltage Regulator Modules (VRM) - Networking Power Supplies - Sequenced Power Supplies - Telecommunication Power Supplies. Pin Assignments (Top View) PGATE VCC PVCC PDRV PGND NGATE VIN 1 2 3 5 6 7 14 13 12 10 Pin Descriptions Pin Name VREF PHASE SGND OCSET FB SS/SHDN CAP 4 AP2011 11 9 8 PGATE VCC PVCC PDRV PGND NGATE VIN CAP SS/ SHDN FB OCSET Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Description Level shift-gate driver Internal regulator voltage Power VCC PMOS Gat driver Power Ground Low side driver output (N MOSFET) Chip supply voltage Charge pump pin Soft start, a capacitor to ground sets the slow start time/set low for shutdown function. Feedback input Sets the converter over-current trip point Signal Ground Input from the phase node between the MOSFETs Reference voltage SOP-14L Ordering Information AP2011 X Package S: SOP-14L X Packing Blank : Tube A : Taping SGND PHASE VREF Anachip Corp www.anachip.com.tw 1/9 Rev. 1.1 Apr 1, 2005 AP2011 Synchronous PWM Controller Block Diagram GND VCC 1.25V VOLTAGE REFERENCE + VREF INTERNAL REGULATOR 8V PGATE BIAS + VIN CAP PGATE OCSET PHASE 70uA ERROR COMP + UNDER VOLTAGE - - FB SS/SHDN + PVCC R S CROSS CURRENT CONTROL Q DRVP PDRV - - 0.3V VCC 12ua VIRTUAL FREQ OSCILLATOR 200kHz 2ua DRVN NGATE PGND 0.2V + - Q S QB R + 0.9V Virtual Frequency Control - Patent Number 6,456,050. - AP2011 FUNCTIONAL BLOCK DIAGRAM Absolute Maximum Ratings Symbol VIN VPHASE ΘJC VCC to GND PHASE to GND Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering) 10 Sec. Parameter Range. 0 to 42 0 to 42 60 150 -40 to +85 -65 to +150 300 Unit V V o o C/W C/W o o o ΘJA TOP TST TLEAD C C C Anachip Corp www.anachip.com.tw 2/9 Rev. 1.1 Apr 1, 2005 AP2011 Synchronous PWM Controller Electrical Characteristics Unless specified: VIN=20V; GND = 0V;VO = 5V; TJ = 25 C o Symbol Power Supply VIN IIN ∆VLoad ∆VLINE VCC VIN -VCC VIN -PGATE Parameter Supply Voltage (Recommended) Supply Current Load Regulation Line Regulation Internal Regulator Voltage VCC Dropout Voltage P-Gate to Source Voltage (Off) Conditions Min. 10 8 -0.4 80 100 Typ. 8 50 110 8.5 1.5 -0.2 60 0.2 85 150 70 1.25 10 2 6.8 6.5 300 Max. 40 10 70 150 9 3.0 1 250 1.275 +2 12 2.7 - Unit V mA mV mV V V V dB uA % nS uA V % uA uA V V mV 0A < ILoad < 3A VIN= 10V to 40V ILoad =1A VIN =10V to 40V VIN =10V VIN =40V Error Comparator AOL Gain (AOL) IB Input Bias Oscillator DCMAX Oscillator Max Duty Cycle Dead Time Over Current Set Isink Reference Voltage Accuracy Charge Current VIN –1.5V < VOCSET < VIN 0 C to 70 C o o Protection TDEAD IOCSET 1.225 -2 8.0 1.3 - Reference VREF Soft Start ISSC VSS = 1.5V VSS = 1.5V ISSD Discharge Current Under voltage lockout (UVLO) VUT Upper Threshold Voltage (VCC) VLWT Lower Threshold Voltage (VCC) VHT Hysteresis (VCC) TA = 25ºC Note 1. Specification refers to Typical Application Circuit. Note 2. This device is ESD sensitive. Use of standard ESD handling precautions is required. Note 3. Abnormal condition; Ex: over-current, output over-voltage, under-voltage lockout, soft-start disappear. Note 4. VCC pin should not be used to externally source current. It is not short protected. Anachip Corp www.anachip.com.tw 3/9 Rev. 1.1 Apr 1, 2005 AP2011 Synchronous PWM Controller Typical Application Circuit VIN=10V~28V(10V~40V) Cin 470u (50V) R3 6.8 ohm C6 0.1u (50V) VIN VCC PVCC CAP SS/SHDN VREF C4 0.1u SGND NGATE PGND FB PGATE OCSET 10n (50V) R4 6.8K D1 Optional C2 1u(50V) C1 100n C3 300n Cboost PDRV 47n(50V) PHASE Q2 AF9435 (AF4835) (9563) Lout 22u Vout=5V Cout 680u Q1 AF9410 (AF4410) (9985) D2 Optional R1 3K 10n C5 47n R2 1K VOUT= VFB × (1 + VFB = 1.25V R2 = 820 ~ 5.1K R1 R2 ) Typical Performance Characteristics PMOS: AF4835; NMOS: AF4410 95 PMOS: AP9563; NMOS: AP9985 85 Efficiency (Vout=5V) Efficiency (Vout=5V) Vin=12V Efficiency (%) 90 Vin=20V 85 Vin=30V 80 0 1 2 Efficiency (%) 80 Vin=40V 75 70 Iout (A) 3 4 5 0 1 2 Iout (A) 3 4 5 Anachip Corp www.anachip.com.tw 4/9 Rev. 1.1 Apr 1, 2005 AP2011 Synchronous PWM Controller Typical Performance Characteristics 1.2 Load Regulation (Vin=12V; Vout=5V) 1.4 1.2 Line Regulation (Vout=5V) Load Regulation (%) 1 Line Regulation (%) 0.8 0.6 0.4 0.2 0 0 1 2 1 0.8 0.6 0.4 0.2 0 0 10 20 30 40 Iout (A) 3 4 5 Vin (V) Vin v.s. Icc (No external component) 8.31 8.3 8.29 20 16 Icc (mA) 12 8 4 0 10 15 20 Vin v.s. Icc (Operation current) 8.28 Icc (mA) 8.27 8.26 8.25 8.24 8.23 25 30 35 40 Vin (V) 10 15 20 25 Vin (V) 30 35 40 8.55 8.5 8.4 8.35 8.3 8.25 8.2 8.15 8.1 -25 8.45 Internal Regulator Voltage (Vin=12V; Vout=5V) 9 8.5 8 7.5 7 6.5 6 5.5 5 4.5 4 2 3 R4 v.s. Current limit (Vin=12V; Vout=5V) 0 Junction Temperature (oC) 25 50 75 100 Current limit (A) Vcc (V) 4 5 R4 (K) 6 7 8 9 Anachip Corp www.anachip.com.tw 5/9 Rev. 1.1 Apr 1, 2005 AP2011 Synchronous PWM Controller Virtual Frequency Control Virtual Frequency Control combines the advantages of constant frequency and constant off-time control in a single mode of operation. This allows fix frequency, precision switching voltage regulator control with fast transient response and the smallest solution size. Switch duty cycle can be adjusted from 0% to 100% on a pulse by pulse basis when responding to transient conditions. Both 0% and 100% duty cycle operation can be maintained for extended periods of time in response to load or line transients. Figure 1 depicts a simplified operation of the Virtual Frequency Control technique: The VFC oscillator generates a pulse of a known duration (VFC_Pulse). The regulator loop responds by returning a complementary feedback pulse (FB_Pulse). The FB_Pulse duration is a result of external conditions such as inductor size, the voltage across the inductor and the duration of the VFC_Pulse. A VFC control loop is then formed whereby the duration of the VFC_Pulse is modified as a result of the FB_Pulse duration. The VFC loop arrives at a state of equilibrium, where the operating frequency remains inherently constant. VIN ERROR COMP Vref + - GATE CONTROL LOGIC VFC Pulse FB Pulse Lout Cout Vout Rfb1 Rfb2 VIRTUAL FREQ OSCILLATOR DON > 0.1, 240-50 × (1DON < 0.1, ) - VIN VIN 10000 × VOUT/ VIN VOUT 5.9 - 0.01VIN Figure 1: Virtual Frequency Control LoopSynchronous single supply application. Virtual frequency control is a technique that provides stable, constant frequency of operation for pulse controlled architectures such as constant off-time/on-time. This is all done internal to the IC with minimal number of components and without the need for connections to external terminals such as input and/or output. No external compensation is required, thus providing a low cost, high performance fix frequency solution for switching voltage regulators. Virtual Frequency Control is a trademark of PWRTEK, LLC. Anachip Corp www.anachip.com.tw 6/9 Rev. 1.1 Apr 1, 2005 AP2011 Synchronous PWM with VFC Controller Function Description Synchronous Buck Converter Primary VCORE power is provided by a synchronous, voltage-mode pulse width modulated (PWM) controller. This section has all the features required to build a high efficiency synchronous buck converter, including soft-start, shutdown, and cycle-by-cycle current limit. Referring to the functional block diagram FIG 1, the output voltage of the synchronous converter is set and controlled by the output of the error comparator. The external resistive divider reference voltage, is derived from an internal trimmed-bandgap voltage reference. The inverting input of the error comparator receives its voltage from the FB pin. The internal oscillator uses an on-chip capacitor and trimmed precision current sources to set the virtual oscillation frequency to 200Khz. The virtual frequency oscillator sets the PWM latch. This pulls DRVN low, turning off the low-side N_MOSFET and DRVP is pulled low, turning on the high-side P-MOSFET (once the cross-current control allows it). The triangular voltage ramp at the FB pin is then compared against the reference voltage at the inverting input of the error comparator. When the FB voltage increases above the reference voltage, the comparator output goes high. This pulls DRVP high, turning off the high-side P-MOSFET, and DRVN is pulled high, turning on the low-side N-MOSFET (once the cross-current control allows it). The Virtual Frequency Oscillator then generates a programmed off time to allow the FB voltage to return to the valley voltage of the triangular ramp. At the end of the off time the PWM latch is set and the cycle repeats again. Under Voltage Lockout The under voltage lockout circuit of the AP2011 assures that the high-side P-MOSFET driver outputs remain in the off state whenever the supply voltage drops below set parameters. Lockout occurs if VCC falls below 6.5V. Normal operation resumes once VCC rises above 6.8V. RDS(ON) Current Limiting The current limit threshold is set by connecting an external resistor from the VCC supply to OCSET. The voltage drop across this resistor is due to the 70uA internal sink sets the voltage at the pin. This voltage is compared to the voltage at the PHASE node. This comparison is made only when the high-side drive is high to avoid false current limit triggering due to uncontributing measurements from the MOSFETs off-voltage. When the voltage at PHASE is less than the voltage at OCSET, an overcurrent condition occurs and the soft start cycle is initiated. The synchronous switch turns on and SS/ SHDN starts to sink 2uA. When SS/ SHDN reaches 0.2V, it then starts to source 10uA and a new cycle begins. When the soft start voltage is below 0.9V the cycle is controlled with pulse by pulse current limiting. Soft Start Initially, SS/ SHDN sources 10uA of current to charge an external capacitor. The inverting input of the error comparator is clamped to a voltage proportional to the voltage on SS/ SHDN . This limits the on-time of the high-side P-MOSFET, thus leading to a controlled ramp-up of the output voltages. Anachip Corp www.anachip.com.tw 7/9 Rev. 1.1 Apr 1, 2005 AP2011 Synchronous PWM Controller Function Description Hiccup Mode During power up, the SS/ SHDN pin is internally pulled low until VCC reaches the under-voltage lockout level of 6.8V. Once VCC has reached 6.8V, the SS/ SHDN pin is released and begins to source 10uA of current to the external soft-start capacitor. As the soft-start voltage rises, the inverting input of the error comparator is clamped to this voltage. When the error signal reaches the level of the internal 1.25V reference, the output voltage is to have reached its programmed voltage. If an over-current condition has not occurred the soft-start voltage will continue to rise and level off at about 2.4V. An over-current condition occurs when the high-side drive is turned on, but the PHASE node does not reach the voltage level set at the OCSET pin. Once an over-current occurs, the high-side drive is turned off and the low-side drive turns on and the SS/ SHDN pin begins to sink 2uA. The soft-start voltage will begin to decrease as the 2uA of current discharge the external capacitor. When the soft-start voltage reaches 0.2V, the SS/ SHDN pin will begin to source 10uA and begin to charge the external capacitor causing the soft-start voltage to rise again. If the over-current condition is no longer present, normal operation will continue. If the over-current condition is still present, the SS/ SHDN pin will again begin to sink 2uA. This cycle will continue indefinitely until the over-current condition is removed. In order to prevent substrate glitching, a small-signal diode should be placed in close proximity to the chip with cathode connected to PHASE and anode connected to GND. Marking Information (Top View) 14 8 Logo Part No. ID code: internal Xth week: 01~52 7 AP2011 YY WW X 1 SOP-14L Year: "01" =2001 "02" =2002 ~ Anachip Corp www.anachip.com.tw 8/9 Rev. 1.1 Apr 1, 2005 AP2011 Synchronous PWM Controller Package Information Package Type: SOP-14L E1 Pin 1 indent Gage Plane E L Θ Detail A D 7o (4x) A2 A 0.015x45o 7o(4x) C A1 y e b Detail A Symbol A A1 A2 b C D E E1 e L Y Dimensions In Millimeters Min. Nom. Max. 1.47 1.60 1.730 0.10 Dimensions In Inches Min. Nom. Max. 0.0580 0.063 0.0680 0.0040 1.45 0.41 0.20 8.64 6.00 3.90 1.27 0.71 0.250 0.510 0.250 8.740 6.200 3.990 0.057 0.016 0.008 0.340 0.236 0.153 0.050 0.028 0.0100 0.33 0.19 8.53 5.80 3.80 0.0130 0.0075 0.3360 0.2283 0.1496 0.0200 0.0098 0.3440 0.2441 0.1571 0.38 1.270 0.076 8O 0.0150 0.0500 0.0030 8O 0O θ - 0O - Anachip Corp www.anachip.com.tw 9/9 Rev. 1.1 Apr 1, 2005 0.010