AWT1921S11

Integrated High Power Amp 1610 MHz FEATURES • • • • • • High Output Intercept Point High Linearity True Surface Mount Package Internal Bias Circuit Requiring Nominal Input Voltages + 10% Low Cost Off Chip Output Matching Circuit Allows Application Optimization AWT1921 PRELIMINARY DATA SHEET - Rev 1.0 PRODUCT DESCRIPTION The AWT1921 is a four stage monolithic amplifier for use in communication systems that require high gain and output intercept point. The device has been specifically designed for fixed satellite access equipment and handset booster amplifier applications. Table 1: Pin Description PIN 1,14,15,28, slug 2 27 4 3 5,6,7,8 9,10 11 26 12 13 16,17 18-25 N AME GND VGS1 & RFIN V DD V D2 V D1 GND V D3 VGS2 VREF V SS VGS3 VGS4 V D4 D ESC R IPTION AC and RF Ground Fi rst Stage Gate termi nal & RF Input Posi ti ve Supply of Bi as C i rcui t(+5V) Second Stage drai n supply (+9V Fi rst Stage drai n supply (+9V) Fi rst and Second Stage Source ground Thi rd Stage drai n supply (+9V) Second Stage Gate Termi nal Bi as control Pi n (+5V) Negati ve Supply for Bi as C i rcui t (-5V) Thi rd Stage Gate termi nal Fourth Stage Gate termi nal Fourth Stage drai n supply (+9V) & RF out S11 SSOP-28 28 Pin Wide Body w/ Heat Slug Pin 1 GND VGS1/RFIN VD1 VD2 GND GND GND GND VD3 VD3 VGS2 VSS VGS3 GND Pin 14 Pin 28 GND VDD VREF VD4 VD4 VD4 VD4 VD4 VD4 VD4 VD4 VGS4 VGS4 GND Pin 15 Figure 1: Pin Layout 08/2001 AWT1921 ELECTRICAL CHARACTERISTICS (Pin with CDMA modulation, fo = 1610 – 1626.5 MHz, VDS1 = VDS2 = VDS3 = VDS4 = 9.0V,VSS = -5V,VREF=+5V,VDD=+5V, Tc=25C, 50 W System(2)) Table 2: Electrical Specifications (1) PAR AMETER Frequency Power Output Power Added Effi ci ency Gai n(3) AC PR(3) 0.730 MHz 1.23 MHz Harmoni cs 2nd 3rd 4th MIN 1610 35 27 - TYP MAX 1626.5 U N IT MHz dB m % dB 36 25 30 25 -28 -45 -52 -45 15 5 15 60 90 150 200 11 0.8 4.5 3:1 100 dB c dB c Stabi li ty: - 60 dBc all spuri ous outputs relati ve to desi red si gnal Bi as Supply C urrents ISS IREF IDD Qui escent C urrents IDQ1 IDQ2 IDQ3 IDQ4 Input Return Loss Gai n Flatness(3) @ POUT = +35 dBm Thermal Resi stance (4) VSWR load, all phase angles mA mA dB dB C /W Notes: 1. As measured in ANADIGICS test fixture, see application section. 2. 50W Measurement system after off chip matching circuit, input terminated in 50W. 3. Measured at POUT= +35 dBm 4. Thermal Resistance for junction to bottom of slug Θjc Tj − Tc (ID1 + ID 2 + ID 3 + ID 4)VSUP − POUT 2 PRELIMINARY DATA SHEET - Rev 1.0 08/2001 AWT1921 Table 3: Absolute Max Ratings PIN 2 3 4,5 8,9 N AME VDD RFIN V D1 VD2 MAX R ATIN G +7VD C +20 dBm +10 VD C +10 VD C PIN 11 12 18,19,20,21,22,23,24,25 N AME VREF V SS V D3 MAX R ATIN G +7 VD C -7 VD C +10 VD C Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability. Operating Temperature: - 30 to + 85 °C Storage Temperature: - 55 to +100 °C PRELIMINARY DATA SHEET - Rev 1.0 08/2001 3 AWT1921 PERFORMANCE DATA Figure 2: ACPR @ POUT = 35 dBm Figure 3: ACPR @ POUT = 35 dBm Figure 4: POUT & Eff vs Pin 40 90 35 80 70 Figure 5: POUT vs Supply Voltage 40 39 38 30 60 50 25 40 30 Pout Eff 37 36 35 Pout 20 20 10 15 -15 -10 -5 0 5 10 15 0 34 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 Pin (dBm) Vsup(v) * POUT with CDMA Modulation PIN = 10 dBm, with CDMA Modulation 4 PRELIMINARY DATA SHEET - Rev 1.0 08/2001 AWT1921 Figure 6: S11 Forward Reflection Impedance Impedance as seen by VDS1 IMPEDANCE 1 .5 2 2 3 CH 1 - S11 REFERENCE PLANE 6.3507 cm MARKER 2 1.615750000 GHz 542.467 m 34.621 j 5 MARKER TO MAX MARKER TO MIN 1 0.100000000 GHz 45.066 -10.839 j 3.225500000 GHz 3 7.790 112.368 j 4 4.800000000 GHz 164.733 -244.870 j Figure 7: S11 Forward Reflection Impedance Impedance as seen by VDS2 1 2 .5 4 .2 1 0 .2 .5 1 2 5 5 2 CH 1- S11 REFERENCE PLANE 6.3507 cm MARKER 2 1.615750000 GHz 4.443 86.992 j MARKER TO MAX MARKER TO MIN 1 0.100000000 GHz 46.485 8.658 j 3 3.225500000 GHz 13.359 -31.442 j 4 4.800000000 GHz 6.663 16.669 j .2 0 .2 .5 11 2 5 4 -.2 -5 -.2 3 -5 -.5 -1 -2 MARKER READOUT FUNCTIONS -.5 -1 -2 MARKER READOUT FUNCTIONS 0.100000000 - 4.800000000 GHz 0.100000000 - 4.800000000 GHz Figure 8: S11 Forward Reflection Impedance Impedance as seen by VDS3 1 .5 3 2 4 CH 1 - S11 REFERENCE PLANE 6.3507 cm MARKER 2 1.615750000 GHz 423.067 m 4.971 j 5 MARKER TO MAX MARKER TO MIN 1 0.100000000 GHz 46.696 -381.126 jm 3 3.225500000 GHz 2.436 18.889 j 4 4.800000000 GHz 2.544 31.529 j Figure 9: S11 Forward Reflection Impedance Impedance as seen by VDS4 .2 2 1 0 .2 .5 1 2 5 -.2 -5 -.5 -1 -2 MARKER READOUT FUNCTIONS 0.100000000 4.800000000 GHz - PRELIMINARY DATA SHEET - Rev 1.0 08/2001 5 AWT1921 F3 C1 C4 F2 C3 C7 F1 C5 C11 L5 C23 R4 R5 C10 AWT1921S11 10 9 VD3 4V D2 3V D1 2 RFIN /VGS1 5 6 GND 7 8 26 VREF 27 VDD 13 VG3 C13 R3 C14 25 24 VD4 23 22 21 20 19 18 VGS2 VSS 11 12 VGS4 16 17 R2 RFOUT C18 C19 RFIN VD3 VD2 VD1 VDD/VREF C12 GND C15 C16 C17 C20 F5 F4 C21 VG4 VSS SLUG 1 14 15 28 C22 VD4 GND Figure 10: 1610 - 1626.5 MHz Test Circuit Schematic Table 4: Pin Designations D ESIGN ATION C 1,C 3,C 5,C 22 C 2,C 7,C 9,C 24 C4 C 6, C 10 C 11,C 19 C 12,C 13,C 20,C 21 C 14,C 16,C 17,C 23 C 15 C 18 F1,F2,F3,F4,F5 L1,L3 L2 L4 L5 R2, R5 R3 R4 VALU E 2.2 F Not Used 15 pF 10 pF 27 pF 33 pF 0.01 uF 22 pF 4.7 pF Feri tte Shi m 2.7 nH 8 nH 47 nH 5600 1500 2200 Procedure for Amplifier Operation and Test 1) Slug must be thermally and electrically connected to obtain rated performance. 2) The VSS voltage should be applied first to the amplifier prior to VD1, VD2, VD3, or VD4 voltages. 3) VGS1, VGS2, VGS3, VGS4 may be used as monitor points to verify that the bias circuit is working properly. These pins should measure as negative voltage potential, after VSS is applied. 4) The Bias Pins VDD and VREF may be applied with no VSS voltage present. 5) Always follow ESD precautions when handling these devices. 6 PRELIMINARY DATA SHEET - Rev 1.0 08/2001 AWT1921 Notes: 1. 2. 3. 4. Material 6 layer FR4 1 oz. copper 14 mil layers Gerber files available Figure 11: 1610 - 1626.5 MHz Test Circuit Layout Table 5: Parts List Table D ESIGN ATION C 1,C 3,C 5,C 22 C 2,C 7,C 9,C 24 C4 C 6,C 10 C 11,C 19 C 12,C 13,C 20,C 21 C 14,C 16,C 17, C 23 C 15 C 18 F1,F2,F3,F4,F5 L1, L3 L2 L4 L5 R2,R5 R3 R4 VALU E 2.2 m F Not Used 15 pF 10 pF 27 pF 33 pF 0.01 uF 22 pF 4.7 pF Murata Murata Murata Murata Murata Murata Ameri can Techni cal C erami cs GRM36C OG150J50 GRM36C OG100J50 GRM36C OG270J50 GRM36C OG330J50 GRM36X7R103K16 GRM36C OG220J50 ATC 100A4R7C W150X BK2125HS470 www.murata.com www.murata.com www.murata.com www.murata.com www.atc-cap.com www.t-yuden.com www.murata.com MAN U FAC TU R E Panasoni c MAN U FAC TU R E PAR T # EC S-H1AY225R W E B AD D R E S S www.panasoni c.com Ferri te 47W @ 100 Tai yo Yuden MHz, 1A Rati ng Shi m 2.7 nH 8 nH 47 nH 5600 W 1500 W 2200 W Toko C oi lcraft C oi lcraft Panasoni c Panasoni c Panasoni c LL2012-F2N7S A 03T 0805C S470XMBC ERJ-36SYJ562V ERJ-36SYJ302V ERJ-36SYJ512V www.tokoam.com www.coi lcraft.com www.coi lcraft.com www.panasoni c.com www.panasoni c.com www.panasoni c.com PRELIMINARY DATA SHEET - Rev 1.0 08/2001 7 AWT1921 D T L LE C HEAT SINK SLUG S E h a A A2 A1 e Notes: 1. Controlling dimensions : inches 2. Dimension "d" does not include mold flash, protrusions or gate burrs. Mold flash, rotrusions and gate burrs shall not exceed 0.006 (0.16mm) 3. Dimension "e" does not include inter-lead or protrusions. Inter-lead flash and protrusions shall not exceed 4. 0.010 (0.25mm) per side. 5. Maximum lead twist/skew to be 0.002 (0.05mm) 6. Mold flash shall not extend more than 0.010 (0.25mm) on any edge of heat slug Figure 12: Package Outline Drawing IN C H ES SYMB OL A A1 A2 B C D E e H h L LE a S T MIN 0.087 0.000 0.087 0.008 0.007 0.400 0.292 0.025 0.410 0.018 0.034 0.84 0 0.139 0.349 8 0.141 0.351 MAX 0.093 0.004 0.089 0.012 0.009 0.408 0.296 BSC 0.418 0.024 0.038 MILLIMETER S MIN 2.21 0.00 2.21 0.36 0.18 10.16 7.42 0.64 10.41 0.48 0.86 1.37 0 3.54 8.86 8 3.55 8.92 5 5 MAX 2.36 0.10 2.25 0.46 0.25 10.36 7.52 BSC 40.62 0.61 0.97 2 2 4 N OTE 8 PRELIMINARY DATA SHEET - Rev 1.0 08/2001 AWT1921 NOTES PRELIMINARY DATA SHEET - Rev 1.0 08/2001 9 AWT1921 NOTES 10 PRELIMINARY DATA SHEET - Rev 1.0 08/2001 AWT1921 NOTES PRELIMINARY DATA SHEET - Rev 1.0 08/2001 11 AWT1921 ORDERING INFORMATION OR D ER N U MB ER AWT1921S11 PAC K AGE D ESC R IPTION S11 C OMPON EN T PAC K AGIN G 28 Pi n Body wi th Heat Slug ANADIGICS, Inc. 141 Mount Bethel Road Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com E-mail: Mktg@anadigics.com IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. WARNING 12 PRELIMINARY DATA SHEET - Rev 1.0 08/2001