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AAT3601IIH-T1

AAT3601IIH-T1

  • 厂商:

    ANALOGICTECH

  • 封装:

  • 描述:

    AAT3601IIH-T1 - Total Power Solution for Portable Applications - Advanced Analogic Technologies

  • 数据手册
  • 价格&库存
AAT3601IIH-T1 数据手册
PRODUCT DATASHEET AAT3601178 Total Power Solution for Portable Applications General Description The AAT3601 is a member of AnalogicTech’s Total Power Management ICTM (TPMICTM) product family. It contains a single-cell Lithium Ion/Polymer battery charger, a fully integrated step-down converter and 5 low dropout (LDO) regulators. The device also includes 2 load switches for dynamic power path/sleep mode operation, making it ideal for small portable short-range communications enabled mobile devices and telephones. The battery charger is a complete thermally regulated constant current/constant voltage linear charger. It includes an integrated pass device, reverse blocking protection, high accuracy current and voltage regulation, charge status, and charge termination. The charging current and the charge termination current as well as recharge voltage are programmable with either an external resistor and/or by a standard I2C interface. The step-down DC/DC converter is integrated with internal compensation and operates at a switching frequency of 1.5MHz, thus minimizing the size of external components while keeping switching losses low and efficiency greater than 95%. All LDO output voltages are programmable using the I2C interface. The five LDOs offer 60dB power supply rejection ratio (PSRR) and low noise operation making them suitable for powering noise-sensitive loads. The LDOs and DC/DC converter are separated into Permanent-Enabled (PE) and Non-Permanent (NP) enabled supplies. All six voltage regulators operate with low quiescent current. The total no load current when the 3 PE LDOs are enabled is only 200μA. The device includes a watchdog timer input and two reset outputs for the watchdog and LDO regulation. The device also can be programmed through a standard I2C interface. The AAT3601 is available in a thermally enhanced low profile 5x5x0.8mm 36-pin TQFN package. Features • Voltage Regulator VIN Range: 4.5V to 6V • Complete Power Integration ▪ Integrated Load Switches to Power Converters from AC Adapter or Battery Automatically • Low Standby Current ▪ 200μA (typ) w/LDO1, LDO2 and LDO5 Active, No Load • One Step-Down Buck Converter (NP) ▪ 1.24V, 300mA Output ▪ 1.5MHz Switching Frequency ▪ Fast Turn-On Time (120μs typ) • Five LDOs Programmable by I2C ▪ LDO1: 3.4V, 150mA (PE) ▪ LDO2: 3.4V, 300mA (NP) ▪ LDO3: 1.24V, 300mA (PE) ▪ LDO4: 1.85V, 300mA (NP) ▪ LDO5: 1.85V, 300mA (PE) ▪ PSRR: 60dB @10kHz ▪ Noise: 50μVrms • One Battery Charger ▪ Digitized Thermal Regulation ▪ Charge Current Programming up to 1.4A ▪ Charge Current Termination Programming ▪ Automatic Trickle Charge for Battery Preconditioning (2.8V Cutoff) • Watchdog (WDI) Timer Input ▪ Two Reset (RSTIN, RSTLPW) Timer Outputs • Separate Enable Pins for PE and NP Supplies • Digital Programming of Major Parameters via I2C • Over-Current Protection • Over-Temperature Protection • 5x5mm TQFN55-36 Package Applications • • • • • • Digital Cameras GSM or CDMA Cellular Phones Handheld Instruments PDAs and Handheld Computers Portable Media Players Short-Range Communication Headsets 3601.2008.07.1.1 www.analogictech.com 1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Typical Application To AVIN1,AVIN2, PVIN SYSOUT System Supply 500mΩ SYSOUT LDO 100mΩ CHGIN 5V from AC Adapter or USB Port 10μF To SYSOUT 100k BAT + - 10μF 1 cell Li+ battery STAT STAT_BAT ENBAT To SYSOUT Charger Control ISET TS CT 0.1μF 10kΩ NTC For BAT Temp sense 1.24k USE_USB SDA SCL Ref 100k 100k To SYSOUT WDI μC TEMP_FLAG EN_SYS RSTLPW To OUT1 To OUT1 100k 100k PVIN UVLO I2C and Enable/Reset Control VIN Step-down BUCK LX 2.2μH NP 1.24V 300mA 4.7μF 10μF Ref Enable OUTBUCK PGND RSTIN EN_PE EN_NP VIN REF CNOISE 0.01μF AVIN2 Enable Enable Enable Enable Enable VIN Ref Ref Ref Ref VIN Ref VIN VIN VIN To SYSOUT LDO5 LDO4 LDO3 LDO2 LDO1 AVIN1 To SYSOUT AGND OUT5 PE 1.85V, 300mA 10μF OUT4 NP 1.85V, 300mA OUT3 PE 1.24V, 300mA 10μF OUT2 NP 3.4V, 300mA 10μF 10μF OUT1 PE 3.4V, 150mA 22μF 2 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Pin Descriptions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24, 25 26, 27 28 29 30 31 32 33 34 35 36 EP Symbol WDI TEMP_FLAG EN_SYS STAT_BAT EN_PE EN_NP SGND SGND OUT5 OUT4 AVIN2 OUT3 OUT2 AVIN1 OUT1 AGND CNOISE RSTLPW RSTIN LX PGND PVIN OUTBUCK SYSOUT BAT CHGIN USE_USB ENBAT TS ISET CT STAT SDA SCL EP Function Watchdog timer input. Clock input from processor. If no clock input is detected for 60ms, it will reset RSTIN. Open drain output which pulls low when an over temperature shutdown occurs in the regulator or the charger and when the thermal loop in the charger is activated. Active Low Enable for the system. An internal pull-up resistor (150kΩ) keeps the pin pulled up to an internal supply to keep the system off when there is no CHGIN input. Connect a normally-open pushbutton switch from this pin to GND. To filter noise internally, there is an internal 100μs debounce delay circuit. Open Drain Output for Battery Charger Status. Same function as STAT pin but with opposite polarity. Active Low Enable for Permanently-Enabled Supplies: LDO1, LDO3, and LDO5. (This pin is internally pulled low with 250nA) Active High Enable for Non-Permanent Supplies: Buck, LDO2, and LDO4 (This pin is internally pulled low with 250nA) Signal ground Signal ground Output for LDO5 (when disabled, this pin is pulled down with 10kΩ) Output for LDO4 (when disabled, this pin is pulled down with 10kΩ) Analog voltage input. Must be tied to SYSOUT on the PCB. Output for LDO3 (when disabled, this pin is pulled down with 10kΩ) Output for LDO2 (when disabled, this pin is pulled down with 10kΩ) Analog voltage input. Must be tied to SYSOUT on the PCB. Output for LDO1 (when disabled, this pin is pulled down with 10kΩ) Signal ground Noise Bypass pin for the internal reference voltage. Connect a 0.01μF capacitor to AGND. Open Drain Reset output. Pulled low internally when any Permanent Supply (LDO1, LDO3, LDO5) are not in regulation. Releases High 800ms (typ) after all supplies are in regulation. Open Drain Reset output. Pulled low internally when any Non-Permanent Supply (Buck, LDO2, or LDO4) are not in regulation. Releases High 10ms (typ) after all supplies are in regulation. Step-down Buck converter switching node. Connect an inductor between this pin and the output. Power Ground for step-down Buck converter. Input power for step-down Buck converter. Must be tied to SYSOUT. Feedback input for the step-down Buck converter. System Power output. Connect to the input voltage pins PIN, AVIN1/2 for the step-down converter and LDOs and other external supply requirements. Connect to a Lithium-Ion Battery. Power input from either external Adapter or USB port. When pulled high, fast charge current is set to 100mA regardless of the resistor value present on the ISET pin. Additionally, the CHGIN-SYSOUT LDO will be disabled and the BAT-SYSOUT load switch will be enabled. Active low enable for the battery charger (Internally pulled low when floating) Battery Temperature Sense pin with 75μA output current. Connect the battery’s NTC resistor to this pin and ground. Charge current programming input pin. Can be used to monitor charge current. Charger Safety Timer Pin. A 0.1μF ceramic capacitor should be connected between this pin and GND. Connect directly to GND to disable the timer function. Open drain output for battery charging status. I2C serial Data pin, open drain; requires a pullup resistor. I2C serial Clock pin, open drain; requires a pullup resistor. The exposed thermal pad (EP) must be connected to board ground plane and pins 16 and 21. The ground plane should include a large exposed copper pad under the package for thermal dissipation (see package outline). 3601.2008.07.1.1 www.analogictech.com 3 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Pin Configuration TQFN55-36 (Top View) WDI TEMP_FLAG EN_SYS STAT_BAT EN_PE EN_NP SGND SGND OUT5 SCL SDA STAT CT ISET TS ENBAT USE_USB CHGIN 36 35 34 33 32 31 30 29 28 1 2 3 4 5 6 7 8 9 27 26 25 24 23 22 21 20 19 BAT BAT SYSOUT SYSOUT OUTBUCK PVIN PGND LX RSTIN 10 11 12 13 14 15 16 17 18 4 www.analogictech.com OUT4 AVIN2 OUT3 OUT2 AVIN1 OUT1 AGND CNOISE RSTLPW 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Absolute Maximum Ratings1 TA = 25°C unless otherwise noted. Symbol VIN Power and Logic Pins TJ Ts TLEAD Description Input Voltage, CHGIN, BAT Maximum Rating Operating Junction Temperature Range Storage Temperature Range Maximum Soldering Temperature (at leads, 10 sec) Value -0.3 to 6.5 VIN + 0.3 -40 to 150 -65 to 150 300 Units V V °C °C °C Recommended Operating Conditions2 Symbol θJA PD Description Thermal Resistance Maximum Power Dissipation Value 25 4 Units °C/W W 1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time. 2. Thermal Resistance was measured with the AAT3601 device on the 4-layer FR4 evaluation board in a thermal oven. The amount of power dissipation which will cause the thermal shutdown to activate will depend on the ambient temperature and the PC board layout ability to dissipate the heat. See Figures 13-16. 3601.2008.07.1.1 www.analogictech.com 5 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Electrical Characteristics1 VIN = 5V, VBAT = 3.6V, -40°C ≤ TA ≤ +85°C, unless otherwise noted. Typical values are TA = 25°C. Symbol Description Conditions Min 4.5 LDO1 + LDO2 + LDO5, No Load EN_SYS, EN_PE = High, EN_NP = Low CHGIN rising CHGIN falling BAT rising BAT falling VBAT = 4V, VCHGIN = 0V Buck, OUT2, and OUT4 in Regulation OUT1, OUT3, and OUT5 in Regulation For Each Output Falling, Typical Hysteresis = 2.7% 5 600 88.3 50 0.1 1.2 -1 4.158 2.6 4.200 2.8 4.00 4.05 4.10 4.15 200 4.25 4.15 2.6 2.35 2 10 800 91.3 10.0 4.5 Typ Max 6 Units V μA μA V V V V μA ms ms % of typ ms μs V V μA V V V V V V Power Supply VCHGIN CHGIN Input Voltage IQ Battery Standby current ISHDN Battery Shutdown Current Under-Voltage Lockout for CHGIN UVLO Battery Under-Voltage Lockout IBAT Leakage Current from BAT Pin Reset Timers tRSTIN Reset Timer for Non-Permanent Supplies tRSTLPW Reset Timer for Permanent Supplies RESETTHR RESET Comparator Threshold 5 15 1000 94.3 70 0.4 tWDI Watchdog Timeout Period WDI Pulse Width WDIPW WDITHRL WDI Input Threshold VIL WDITHRH WDI Input Threshold VIH WDILK WDI Input Current Charger Voltage Regulation VBAT_REG VMIN Output Charge Voltage Regulation Preconditioning Voltage Threshold WDI = 0 or SYSOUT 0°C ≤ TA ≤ +70°C (No trickle charge option can be made available) I2C Recharge Code = 00 (default) I2C Recharge Code = 01 I2C Recharge Code = 10 I2C Recharge Code = 11 RISET = 1.24k (for 0.8A), USE_USB = Low, I2C ISET code = 000, VBAT = 3.6V, VCHGIN = 5.0V USE_USB = High, I2C ISET code = 000, VBAT = 3.6V Constant-Current mode, VBAT = 3.6V RISET = 1.24kΩ; USE_USB = Low I2C ISET code = 000, USE_USB = High I2C Term code = 00 (default) I2C Term code = 01 I2C Term code = 10 I2C Term code = 11 1 4.242 3.0 VRCH Battery Recharge Voltage Threshold Charger Current Regulation 720 85 800 100 800 12 50 5 10 15 20 880 mA 115 % ICH_CC mA % ICH_CC ICH_CC Constant-Current Mode Charge Current KI_SET ICH_PRE ICH_TERM Charge Current Set Factor: ICH_CC/IISET Preconditioning-Charge Current Charge Termination Threshold Current 1. Specification over the –40°C to +85°C operating temperature range is assured by design, characterization and correlation with statistical process controls. 6 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Electrical Characteristics1 VIN = 5V, VBAT = 3.6V, -40°C ≤ TA ≤ +85°C, unless otherwise noted. Typical values are TA = 25°C. Symbol Description Conditions VIN = 5V 1.4 0.4 Isink = 4mA 0.4 8 4.3 105 3 TC / 8 3 75 331 25 2.39 25 115 85 100 100 0.5 4.5 ISYSOUT < 900mA, VCHGIN = 4.5V to 6.0V VCHGIN = 5V IOUTBUCK = 0 to 300mA; VIN = 2.7V to 5.5V Load = 100μA to 300mA, PVIN = 3.6V, VOUTBUCK = 1.2V No load 3.4 1.5 1.203 3.9 4.2 Min Typ 0.6 Max 0.9 Units Ω V V V mA V %VCS Hours Hours Hours μA mV V mV °C °C °C mΩ Ω V V A V % μA A Ω Ω MHz μs Charging Devices Charging Transistor ON Resistance RDS(ON) Logic Control / Protection VEN_PE or EN_NP Input High Threshold VEN_PE or EN_NP Input Low Threshold VSTAT, VSTAT_BAT, Output Low Voltage VTEMP_FLAG ISTAT, ISTAT_BAT, Output Pin Current Sink Capability ITEMP_FLAG VOVP Over Voltage Protection Threshold VOCP Over Current Protection Threshold TC Constant Current Mode Time Out TK Trickle Charge Time Out TV Constant Voltage Mode Time Out Current Source from TS Pin ITS TS1 TS2 TLOOP_IN TLOOP_OUT TREG Load Switches RDS(ON),BAT-SYSOUT RDS(ON),CHGIN-SYSOUT TS Hot Temperature Fault TS Cold Temperature Fault Thermal Loop Entering Threshold Thermal Loop Exiting Threshold Thermal Loop Regulation / SYSOUT LDO On Resistance of BAT-SYSOUT Load Switch On Resistance of CHGIN-SYSOUT Load Switch SYSOUT LDO Input Voltage Range CCT = 100nF, VCHGIN = 5V 71 Falling Threshold Hysteresis Rising Threshold Hysteresis 318 2.30 79 346 2.48 VBAT = 3.6V VCHGIN = 4.5V 150 0.75 SYSOUT LDO Output Voltage Output Current ISYSOUT Step-Down Buck Converter VOUTBUCK Output Voltage Accuracy Buck Load Regulation ILIMOUTBUCK RDS(ON)L RDS(ON)H FOSC TS Buck Ground Pin Current P-Channel Current Limit High Side Switch On-Resistance Low Side Switch On-Resistance Oscillator Frequency Start-Up Time 1.24 0.2 45 0.8 0.8 0.8 1.5 100 1.277 TA = 25°C From Enable to Regulation; COUTBUCK = 4.7μF, CNOISE = On 1. Specification over the –40°C to +85°C operating temperature range is assured by design, characterization and correlation with statistical process controls. 3601.2008.07.1.1 www.analogictech.com 7 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Electrical Characteristics1 VIN = 5V, VBAT = 3.6V, -40°C ≤ TA ≤ +85°C, unless otherwise noted. Typical values are TA = 25°C. Symbol LDO1 VOUT1 Description Output Voltage Accuracy LDO Ground Pin Current Output Current Output Current Limit Dropout Voltage Conditions IOUT1 = 0 ~ 150mA, VAVINx: 3.3V ~ 5.5V For Each LDO With No Load Min -3 Typ Max +3 Units % μA mA mA mV %/V mV dB ms 45 150 1000 90 IOUT1 ILIM1 VDO1 ΔVOUT1/ Line Regulation (VOUT1ΔVIN1) ΔVOUT1 Load Regulation PSRR Power Supply Rejection Ratio Ts Start Up Time LDO2 VOUT2 Output Voltage Accuracy IOUT2 Output Current ILIM2 Output Current Limit VDO2 Dropout Voltage ΔVOUT2/ Line Regulation (VOUT2ΔVIN2) ΔVOUT2 Load Regulation PSRR Power Supply Rejection Ratio Ts Start Up Time LDO3, LDO4, and LDO5 VOUTx Output Voltage Accuracy IOUTx Output Current ILIMx Output Current Limit VDOx Dropout Voltage ΔVOUTx/ Line Regulation (VOUTxΔVINx) ΔVOUTx Load Regulation PSRR Power Supply Rejection Ratio eN Output Noise Voltage Ts Start Up Time Logic Control VIH Enable Pin Logic High Level VIL Enable Pin Logic Low Level Thermal Over Temperature Shutdown TSD Threshold Over Temperature Shutdown THYS Hysteresis IOUT1 = 150mA IOUT1 = 10mA, 3.6V < VAVINx < 5.5V IOUT1 = 0.5mA ~ 150mA IOUT1 = 10mA, COUT1 = 22μF, 100Hz ~ 10KHz From Enable to Regulation; C OUT1 = 22μF, CNOISE = On IOUT2 = 0 ~ 300mA, VAVINx: 3.3V ~ 5.5V -3 300 180 0.1 40 60 3.5 +3 1000 180 0.1 40 60 1.7 -3 300 1000 180 0.1 40 60 50 1.2 1.4 0.4 140 15 +3 IOUT2 = 150mA IOUT2 = 10mA, 3.6V < VAVINx < 5.5V Load: 0.5mA ~ 300mA IOUT2 = 10mA, COUT2 = 10μF, 10 ~ 10KHz From Enable to Regulation; COUT2 = 10μF, CNOISE = On IOUTX = 0 ~ 300mA, VAVINx: 3.3V ~ 5.5V % mA mA mV %/V mV dB ms % mA mA mV %/V mV dB μVrms ms V V ˚C ˚C IOUTX = 150mA IOUTX = 10mA, 3.6V < VAVINx < 5.5V IOUTX = 0.5mA ~ 300mA IOUTX = 10mA, COUTx = 10μF, 10 ~ 10KHz IOUTX = 10mA, Power BW: 10kHz ~ 100KHz From Enable to Regulation; COUTX = 10μF, CNOISE = On EN_PE, EN_NP 1. Specification over the –40°C to +85°C operating temperature range is assured by design, characterization and correlation with statistical process controls. 8 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Electrical Characteristics1 VIN = 5V, VBAT = 3.6V, -40°C ≤ TA ≤ +85°C, unless otherwise noted. Typical values are TA = 25°C. Symbol Description Conditions Min 0 1.3 0.6 0.6 0.6 100 0 0.6 1.3 2.7V ≤ VIN ≤ 5.5V 2.7V ≤ VIN ≤ 5.5V IPULLUP = 3mA 1.4 -1.0 Typ Max 400 Units KHz μs μs μs μs ns μs μs μs V V μA V SCL, SDA (I2C interface) Clock Frequency FSCL TLOW Clock Low Period THIGH Clock High Period THD_STA Hold Time START Condition TSU_STA Setup Time for Repeat START Data Setup Time TSU_DTA THD_DAT Data Hold Low TSU_STO Setup Time for STOP Condition TBUF Bus Free Time Between STOP and START Condition VIL Input Threshold Low Input Threshold High VIH II Input Current VOL Output Logic Low (SDA) 0.9 0.4 1.0 0.4 Basic I2C Timing Diagram SDA TLOW TSU_DAT THD_STA TBUF SCL THD_STA TSU_STA TSU_STO THD_DAT THIGH 1. Specification over the –40°C to +85°C operating temperature range is assured by design, characterization and correlation with statistical process controls. 3601.2008.07.1.1 www.analogictech.com 9 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Typical Characteristics – Charger Charging Current vs. Battery Voltage (RISET = 1.24kΩ) VCHGIN = 6.0V VCHGIN = 5.5V VMIN (V) VCHGIN = 5.0V VCHGIN = 4.5V 900 800 700 2.810 2.808 2.806 2.804 2.802 2.800 2.798 2.796 2.794 2.792 2.5 2.9 3.3 3.7 4.1 4.5 2.790 -50 -25 0 25 50 75 100 Preconditioning Threshold Voltage vs. Temperature ICH (mA) 600 500 400 300 200 100 0 VCHGIN = 5.5V VCHGIN = 6.0V VCHGIN = 5.0V VCHGIN = 4.5V Battery Voltage (V) Temperature (°C) Preconditioning Charge Current vs. Temperature (VBAT = 2.5V, RSET = 1.24kΩ) 115 110 Recharge Voltage Threshold vs. Temperature (VRCH set to 4.0V by I2C) 4.06 4.05 4.04 4.03 VCHGIN = 6.0V ICH_PRE (mA) 105 VRCH (V) 100 95 90 85 80 -50 -25 0 25 50 75 100 4.02 4.01 4.00 3.99 3.98 3.97 3.96 -50 -25 VCHGIN = 5.0V VCHGIN = 5.5V VCHGIN = 4.5V VCHGIN = 5.5V VCHGIN = 6.0V VCHGIN = 5.0V VCHGIN = 4.5V 0 25 50 75 100 Temperature (°C) Temperature (°C) Output Charge Voltage Regulation vs. Temperature (End of Charge Voltage) 4.25 4.24 4.23 100 90 80 Charge Termination Threshold Current vs. Temperature VBAT_REG (V) 4.22 4.21 4.20 4.19 4.18 4.17 4.16 -50 VCHGIN = 5.5V VCHGIN = 6.0V ICH_TERM (mA) 70 60 50 40 30 20 10 0 VCHGIN = 5.5V VCHGIN = 6.0V VCHGIN = 5.0V VCHGIN = 4.5V 25 50 75 100 VCHGIN = 5.0V VCHGIN = 4.5V 25 50 75 100 -25 0 -50 -25 0 Temperature (°C) Temperature (°C) 10 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Typical Characteristics – Charger (continued) Constant Current Mode Charge Current vs. Temperature (VBAT = 3.6V; RISET = 1.24kΩ) 900 800 Constant Current Mode Charge Current vs. Input Voltage (RSET = 1.24kΩ) 900 880 860 VCHGIN = 6.0V VCHGIN = 4.5V ICH_CC (mA) ICH_CC (mA) 700 600 500 400 300 -50 -25 840 820 800 780 760 740 720 700 VCHGIN = 5.5V VCHGIN = 5.0V VBAT = 3.3V VBAT = 3.6V VBAT = 4.1V 0 25 50 75 100 4.5 4.75 5 5.25 5.5 5.75 6 Temperature (°C) CHGIN Voltage (V) 3601.2008.07.1.1 www.analogictech.com 11 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Typical Characteristics – Step-Down Buck Converter Step-Down Buck Efficiency vs. Output Current (VOUT = 1.24V; L = 2.2µH) 100 80 90 0.5 Step-Down Buck Load Regulation vs. Output Current (VOUT = 1.24V; L = 2.2µH) Load Regulation (%) 0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 1 10 100 VCHGIN = 4.5V VCHGIN = 5V VCHGIN = 5.5V VCHGIN = 6V VBAT = 4.2V VBAT = 3.6V VBAT = 3V Efficiency (%) 70 60 50 40 30 20 10 0 1 10 100 VCHGIN = 4.5V VCHGIN = 5V VCHGIN = 5.5V VCHGIN = 6V VBAT = 4.2V VBAT = 3.6V VBAT = 3V 1000 1000 Output Current (mA) Output Current (mA) Step-Down Buck Line Regulation vs. CHGIN and Battery Input Voltage (VOUT = 1.24V; L = 2.2µH) 0.5 Step-Down Buck Output Voltage vs. Temperature (IOUT = 10mA) 1.248 1.246 1.244 VCHGIN = 6.0V VCHGIN = 5.5V VCHGIN = 5V VCHGIN = 4.5V VBAT = 4.2V VBAT = 3.6V VBAT = 3V Line Regulation (%) 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 2.5 IOUT = 1mA IOUT = 10mA IOUT = 50mA IOUT = 100mA IOUT = 200mA IOUT = 300mA VOUT (V) VBAT 3.5 4 4.2 1.242 1.240 1.238 1.236 VCHGIN 4.5 5 5.5 6 1.234 1.232 -50 -25 0 25 50 75 100 3 Input VBAT, VCHGIN (V) Temperature (°C) VBAT Line Transient Response Step-Down Buck (VBAT = 3.5V to 4.2V; IOUT = 300mA; VOUT = 1.24V; COUT = 4.7µF) 1.32 Load Transient Response Step-Down Buck (10mA to 150mA; VBAT = 3.6V; VOUT = 1.24V; COUT = 4.7µF) 1.30 350 300 250 200 150 100 50 0 Input Voltage (bottom) (V) Output Voltage (top) (V) 1.28 1.24 1.20 1.16 4.5 4.0 3.5 3.0 Output Voltage (top) (V) 1.25 1.20 Load Current (bottom) (mA) Time (100µs/div) Time (100µs/div) 12 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Typical Characteristics – Step-Down Buck Converter (continued) Load Transient Response (100mA to 300mA; VBAT = 3.6V; VOUT = 1.24V; COUT = 4.7µF) 1.30 700 600 500 400 300 200 100 0 Output Voltage (top) (V) 1.25 1.20 Load Current (bottom) (mA) Time (100µs/div) 3601.2008.07.1.1 www.analogictech.com 13 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Typical Characteristics - LDO1 LDO1 Load Regulation vs. Output Current Using CHGIN Input (VOUT1 = 3.4V) 1.0 LDO1 Load Regulation vs. Output Current Using Battery Input (VOUT1 = 3.4V) Load Regulation (%) 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 Load Regulation (%) 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 1 10 100 VCHGIN = 6V VCHGIN = 5.5V VCHGIN = 5V VCHGIN = 4.5V VBAT = 4.2V VBAT = 3.9V VBAT = 3.6V 1000 1 10 100 1000 Output Current (mA) Output Current (mA) LDO1 Output Voltage vs. Temperature (IOUT1 = 10mA) 3.44 3.43 3.42 LDO1 Line Regulation vs. CHGIN and Battery Input Voltage 0.5 (VOUT1 = 3.4V) IOUT = 1mA IOUT = 10mA IOUT = 50mA IOUT = 100mA IOUT = 150mA Line Regulation (%) VOUT1 (V) 3.41 3.40 3.39 3.38 3.37 3.36 -50 VIN = 6.0V VIN = 5.5V VIN = 5V VIN = 4.5V VBAT = 4.2V VBAT = 3.6V 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 VBAT 3 3.5 4 4.2 VCHGIN 4.5 5 5.5 6 -25 0 25 50 75 100 Temperature (°C) Input VBAT, VCHGIN (V) LDO1 Dropout Characteristics vs. Input Voltage (VOUT1 = 3.4V) 3.50 LDO1 Dropout Voltage vs. Output Current (VOUT1 = 3.4V) 120 Output Voltage VOUT1 (V) 3.45 3.40 3.35 3.30 3.25 3.20 3.4 Dropout Voltage (mV) 100 80 60 40 20 0 IOUT = 1mA IOUT = 10mA IOUT = 50mA IOUT = 100mA IOUT = 150mA 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 -40°C 25°C 85°C 0 25 50 75 100 125 150 Input Voltage (V) Output Current (mA) 14 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Typical Characteristics – LDO1 (continued) VBAT Line Transient Response LDO1 (VBAT = 3.7V to 4.2V; IOUT1 = 150mA; VOUT1 = 3.4V) 3.44 3.44 Load Transient Response LDO1 (10mA to 75mA; VBAT = 3.6V; VOUT = 3.4V) 350 300 250 200 150 100 50 0 Input Voltage (bottom) (V) Output Voltage (top) (V) Output Voltage (top) (V) 3.42 3.40 3.38 3.36 4.5 4.0 3.5 3.0 3.42 3.40 3.38 3.36 Load Current (bottom) (mA) Time (100µs/div) Time (200µs/div) Load Transient Response LDO1 (75mA to 150mA; VBAT = 3.6V; VOUT = 3.4V) 3.48 400 350 300 250 200 150 100 50 0 Output Voltage (top) (V) 3.44 3.40 3.36 3.32 Load Current (bottom) (mA) Time (200µs/div) Typical Characteristics – LDO2 LDO2 Dropout Characteristics vs. Input Voltage (VOUT2 = 3.4V) 3.50 450 LDO2 Dropout Voltage vs. Output Current (VOUT2 = 3.4V) 400 350 300 250 200 150 100 50 0 0 50 100 150 200 250 Output Voltage VOUT2 (V) 3.45 3.40 3.35 3.30 3.25 3.20 3.4 IOUT = 1mA IOUT = 10mA IOUT = 50mA IOUT = 100mA IOUT = 200mA IOUT = 300mA 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 Dropout Voltage (mV) -40°C 25°C 85°C 300 Input Voltage (V) Output Current (mA) 3601.2008.07.1.1 www.analogictech.com 15 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Typical Characteristics – LDO4 LDO4 Load Regulation vs. Output Current Using CHGIN Input (VOUT4 = 1.85V) 1.0 LDO4 Load Regulation vs. Output Current Using Battery Input 1.0 (VOUT4 = 1.85V) VBAT = 4.2V VBAT = 3.9V VBAT = 3.6V Load Regulation (%) Load Regulation (%) 1000 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 1 10 100 VCHGIN = 6V VCHGIN = 5.5V VCHGIN = 5V VCHGIN = 4.5V 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 1 10 100 1000 Output Current (mA) Output Current (mA) LDO4 Output Voltage vs. Temperature (IOUT4 = 10mA) 1.90 1.89 1.88 1.87 VIN = 6.0V VIN = 5.5V VIN = 5V VIN = 4.5V VBAT = 4.2V VBAT = 3.6V VBAT = 3V LDO4 Line Regulation vs. CHGIN and Battery Input Voltage 0.5 (VOUT4 = 3.4V) IOUT = 1mA IOUT = 10mA IOUT = 50mA IOUT = 100mA IOUT = 200mA IOUT = 300mA Line Regulation (%) 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 3 VOUT4 (V) 1.86 1.85 1.84 1.83 1.82 1.81 1.80 -50 VBAT 3.5 4 4.2 VCHGIN 4.5 5 5.5 6 -25 0 25 50 75 100 Temperature (°C) Input VBAT, VCHGIN (V) 16 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Typical Characteristics – General Quiescent Current vs. Input Voltage (LDO1 + LDO3 + LDO5; No Load) 600 500 400 300 200 100 0 85°C 25°C -40°C 5.2 5.7 Start-up Sequence Permanent-Enabled (PE) Supplies (VCHGIN = 5.0V) Output Voltage (2V/div) Quiescent Current (µA) 0 0 Buck LDO3 LDO5 LDO1 0 0 VBAT 2.7 3.2 3.7 4.2 VCHGIN 4.7 Input Voltage (V) Time (1ms/div) Start-up Sequence Non-Permanent (NP) Supplies (VCHGIN = 5.0V) Output Voltage (2V/div) Output Voltage (1V/div) Watchdog Timer (WDI = 0V) 0 0 EN_NP LDO2 LDO4 Buck 0 0 0 0 RSTIN WDI Time (500µs/div) Time (10ms/div) LDO Power Supply Rejection Ratio, PSRR (IOUT3 = 10mA, BW = 100~100KHz) 150 135 120 105 90 75 60 45 30 15 0 100 1000 10000 100000 6.00 5.40 4.80 LDO Output Voltage Noise (No Load; Power BW: 100~100KHz) Magnitude (dB) Noise (µVrms) 4.20 3.60 3.00 2.40 1.80 1.20 0.60 0.00 100 1000 10000 100000 Frequency (Hz) Frequency (Hz) 3601.2008.07.1.1 www.analogictech.com 17 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Typical Characteristics – General (continued) LDO Output Voltage Noise (IOUT3 = 10mA, Power BW = 100~100KHz) 6.00 5.40 4.80 Noise (µVrms) 4.20 3.60 3.00 2.40 1.80 1.20 0.60 0.00 100 1000 10000 100000 Frequency (Hz) 18 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Functional Block Diagram SYSOUT SYSOUT LDO 500mΩ 100mΩ CHGIN BAT STAT STAT_BAT ENBAT USE_USB Ref Charger Control ISET TS CT SDA SCL WDI TEMP_FLAG EN_SYS RSTLPW RSTIN EN_PE EN_NP SGND SGND AVIN 2 VIN Ref LDO5 Ref Ref Ref Enable Enable Enable Enable Enable VIN VIN Ref VIN VIN LDO4 LDO3 LDO2 LDO1 VIN REF PVIN UVLO I C and Enable/Reset Control 2 VIN Step-down BUCK Ref Enable LX OUTBUCK PGND CNOISE AVIN1 AGND OUT5 OUT4 OUT3 OUT2 OUT1 3601.2008.07.1.1 www.analogictech.com 19 PRODUCT DATASHEET AAT3601178 Total Power Solution for Portable Applications Functional Description The AAT3601 is a complete power management solution. It seamlessly integrates an intelligent, stand-alone CC/ CV (Constant-Current/Constant-Voltage), linear-mode single-cell battery charger with one step-down Buck converter and five low-dropout (LDO) regulators to provide power from either a wall adapter or a single-cell LithiumIon/Polymer battery. Internal load switches allow the LDO regulators and DC-DC converter to operate from the best available power source of either an AC wall adapter, USB port supply, or battery. If only the battery is available, then the voltage regulators and converter are powered directly from the battery through a 100mΩ load switch. (The charger is put into sleep mode and draws less than 1μA quiescent current.) If the system is connected to a wall adapter, then the voltage converters are powered directly from the adapter through a 500mΩ load switch and the battery is disconnected from the voltage converter inputs. This allows the system to operate regardless of the charging state of the battery or with no battery. The LDOs and DC/DC converter are separated into Permanently-Enabled (PE) system-on supplies and Non-Permanent (NP) separate enable supplies referring to the two independent enable functions. 1. A push-button is used to assert EN_SYS low when a valid supply (>CHGIN UVLO) is not connected to the charger input CHGIN. 2. A valid adaptor supply (>CHGIN UVLO) is connected to the charger input CHGIN. Case 1 The startup sequence for the AAT3601 is typically initiated by pulling the EN_SYS pin low with a pushbutton switch (see Figure 1). The SYSOUT is the first block to be turned on. When the output of the SYSOUT reaches 90% of its final value, then the PE supplies LDO1, LDO3 and LDO5 are enabled if EN_PE is low. When the PE supplies reach 90% of their final value, the 800ms RSTLPW timer is initiated holding the microprocessor in reset. When the RSTLPW pin goes High, the NP sequence supplies LDO2, LDO4 and OUTBUCK can be enabled and disabled as desired using the EN_NP pin. When the NP supplies reach 90% of their final value, the 10ms RSTIN timer is released. The NP outputs should not be started up until after the RSTLPW pin goes high. Do not start all the outputs up at the same time. The state of EN_SYS is latched as long as either CHGIN or BAT is connected to the device. Case 2 Alternatively, the startup sequence is automatically started without the pushbutton switch when the CHGIN pin rises above its UVLO threshold. The battery charger is started when CHGIN_OK is internally enabled. The STAT pin goes high and the system is enabled. Sequence of startup depends on whether or not the adapter input is connected or open. The timing diagrams in Figures 2 and 3 illustrate the two cases. A typical startup and shutdown process proceeds as follows (referring to Figures 1, 2 and 3). System Output (SYSOUT) Intelligent control of the integrated load switches is managed by the switch control circuitry to allow the step-down converter and the LDOs to have the best available power source. When the CHGIN pin voltage is above 4.5V, the system automatically turns on and the power to the SYSOUT pin will be provided by either the CHGIN pin or the BAT pin. When the USE_USB pin is low, the CHGIN provides power to SYSOUT through an internal LDO regulated to 3.9V. When the USE_USB pin is high or if forced through use of an I2C command, the BAT pin is shorted to SYSOUT through a 100mΩ switch. If a CHGIN voltage is not present and the system is enabled, SYSOUT will be shorted to BAT. This system allows the step-down converter and LDOs to always have the best available source of power. This also allows the voltage converters to operate with no battery, or with a battery voltage that falls below the precondition trickle charge threshold. Typical Power Down Sequence If only the battery is connected and the voltage level is above the BAT UVLO, then the EN_PE pin can be held low in order to power down AAT3601. When the voltage at the CHGIN pin is above the CHGIN UVLO, the device cannot be powered down but the EN_PE and EN_NP pins can be used to disable the PE and NP supplies. If the adapter supply at the CHGIN pin is disconnected, the device will power down even if BAT is connected if the EN_SYS state was not first latched into the device by pulling it low when either BAT or CHGIN is connected. If CHGIN falls below UVLO without being disconnected, the EN_SYS will still be latched and the device will remain powered. The outputs of the LDOs are internally pulled to ground with 10k during shutdown to discharge the output capacitors and ensure a fast turn-off response time. 3601.2008.07.1.1 Typical Power Up Sequence The AAT3601 supports two enable/disable schemes. System startup is initiated whenever one of the following conditions occurs: 20 www.analogictech.com PRODUCT DATASHEET AAT3601178 To SYSOUT Total Power Solution for Portable Applications STAT_BAT ENBAT CHGIN UVLO Charger 1k CHGIN SYSOUT MUX STAT 1 D SET Q BAT EN_SYS Push-button On switch 100 μs debounce R Q SYSOUT UVLO SYSOUT To SYSOUT EN_PE LDO1 LDO3 LDO5 DC/DC Buck LDO2 LDO4 POK4 POKBUCK POK1 100k 800ms typ delay POK3 RSTLPW POK5 To SYSOUT EN_NP 100k 10ms typ delay POK2 RSTIN WDI 60ms Watchdog Figure 1: Enable, Watchdog and Reset Functions Detailed Schematic. 100μs debounce EN_SYS pin SYSTEM ENABLE (Internal) SYSOUT SYSOUT_OK (Internal) LDO1 1.24V 1.24V 1.85V 0V Battery voltage Enabling the System 3.4V 3.4V LDO3 1.85V LDO5 RSTLPW pin EN_PE EN_NP LDO2 1.24V 800ms reset time Shutdown system Enabling NP 3.4V Shutdown NP DC/DC 1.85V LDO4 RSTIN pin 10ms reset time Figure 2a: Power Up/Down Sequence; Case 1, Adapter is Not Connected. 3601.2008.07.1.1 www.analogictech.com 21 PRODUCT DATASHEET AAT3601178 Total Power Solution for Portable Applications EN_SYS pin CHGIN CHGIN_OK (Internal) Charger current ENBAT pin STAT pin LED current SYSTEM ENABLE (Internal) SYSOUT SYSOUT_OK (Internal) LDO1 1.24V 1.24V 1.85V 0V 0mA 0mA 800mA 0mA 0mA Battery voltage Enabling the System 3.4V 3.4V LDO3 1.85V LDO5 RSTLPW pin EN_PE pin EN_NP pin LDO2 1.24V 800ms reset time Shutdown system Enabling NP 3.4V Shutdown NP DC/DC LDO4 RSTIN pin 1.85V 10ms reset time Figure 2b: Power Up/Down Sequence; Case 2, Connecting the Adapter Automatically Starts the System. Watchdog Timer Input (WDI) The AAT3601 includes an internal watchdog timer that can be controlled by a μP. After RSTIN goes high, the watchdog timer must get clock edges on the WDI pin from the processor. The WDI clock edges must be < 60ms apart to reset the internal watchdog timer or the RSTIN pin will become active low. Flow Chart for the Battery Charger operation is shown in Figure 5. The input supply must be above the minimum operating voltage (UVLO) and the enable pin (ENBAT) must be low (it is internally pulled down). When the battery is connected to the BAT pin, the battery charger checks the condition of the battery and determines which charging mode to apply. Battery Charger Figure 4 illustrates the entire battery charging profile which consists of three phases. 1. 2. 3. Preconditioning-Current Mode (Trickle) Charge Constant-Current Mode Charge Constant-Voltage Mode Charge Preconditioning-Current Mode Charge Current If the battery voltage is below the Preconditioning Voltage Threshold VMIN, then the battery charger initiates precondition trickle charge mode and charges the battery at 12% of the programmed constant-current magnitude. For example, if the programmed current is 500mA, then the trickle charge current will be 60mA. Trickle charge is a safety precaution for a deeply discharged cell. It also reduces the power dissipation in the internal series pass MOSFET when the input-output voltage differential is at its highest. Preconditioning Trickle Charge Battery charging commences only after the AAT3601 battery charger checks several conditions in order to maintain a safe charging environment. The System Operation 22 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications T < tWDI T < tWDI T < tWDI T < tWDI T < tWDI T < tWDI WDI tRSTIN tRSTIN tWDI RSTIN POK of non-permanent supplies tWDI = Watchdog timer timeout (60ms) tRSTIN = RSTIN pin reset time (10ms) Figure 3: Watchdog Timer Timing Diagram. I (mA) Preconditioning Trickle Charge Phase Constant-Current Mode Charge Current (ICH_CC) Constant Current Charge Phase Constant Voltage Charge Phase FAST-CHARGE to TOP-OFF Charge Threshold V (V) Battery End of Charge Voltage Regulation (VBAT_REG) Charge Voltage Preconditioning Threshold Voltage (VMiN) Charge Current Preconditioning Charge Current (ICH_PRE) Charge Termination Threshold Current (ICH_TERM) T (s) Trickle Charge Timeout (TK) Constant Current Timeout (TC) Constant Voltage Timeout (TV) Figure 4: Current vs. Voltage and Charger Time Profile. 3601.2008.07.1.1 www.analogictech.com 23 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Enable Power On Reset No Yes Power Input Voltage VCHGIN > VUVLO Enable Yes Expired Charge Timer Control Shut Down Yes Fault Conditions Monitoring OV, OT, VTS1 < VTS < V TS2 No Thermal Loop Thermal Loop Current Current Reduction in Reduction in ADP C.C. Mode Charging Mode Preconditioning Test VBAT > VMIN Yes Preconditioning (Trickle Charge) Yes No No No Recharge Test VBAT < VRCH Yes Current Phase Test VBAT < VBAT_REG Yes Constant Current Charge Mode Device Thermal Loop Monitor TJ > 115° C No Voltage Phase Test ICH > ICH_TERM Yes Constant Voltage Charge Mode No Charge Completed Figure 5: System Operation Flow Chart for the Battery Charger. 24 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 Total Power Solution for Portable Applications Constant-Current Mode Charge Current Trickle charge continues until the battery voltage reaches VMIN. At this point the battery charger begins constant-current charging. The current level default for this mode is programmed using a resistor from the ISET pin to ground. Once that resistor has been selected for the default charge current, then the current can be adjusted through I2C from a range of 40% to 180% of the programmed default charge current. Programmed current can be set at a minimum of 100mA and up to a maximum of 1.44A. When the CHGIN_OK signal goes low, the default I2C setting of 100% is reset. If the USE_USB signal is high when this happens, the charge current is reset to an internally set 100mA current until the microcontroller sends another I2C signal to change the charge current. (see I2C Programming section). Temperature Sense (TS) The TS pin is available to monitor the battery temperature. Connect a 10k NTC resistor from the TS pin to ground. The TS pin outputs a 75μA constant current into the resistor and monitors the voltage to ensure that the battery temperature does not fall outside the limits depending on the Temperature coefficient of the resistor used. When the voltage goes above 2.39V or goes below 331mV, the charging current will be suspended. Charge Safety Timer (CT) While monitoring the charge cycle, the AAT3601 utilizes a charge safety timer to help identify damaged cells and to ensure that the cell is charged safely. Operation is as follows: upon initiating a charging cycle, the AAT3601 charges the cell at 10% of the programmed maximum charge until VBAT > 2.8V. If the cell voltage fails to the precondition threshold of 2.8V (typ) before the safety timer expires, the cell is assumed to be damaged and the charge cycle terminates. If the cell voltage exceeds 2.8V prior to the expiration of the timer, the charge cycle proceeds into fast charge. Three timeout periods of 1 hour for Trickle Charge mode, 3 hours for Constant Current Mode and 3 hours for Constant Voltage mode. Constant-Voltage Mode Charge Constant current charging will continue until the battery voltage reaches the Output Charge Voltage Regulation point VBAT_REG. When the battery voltage reaches the regulation voltage (VBAT_REG), the battery charger will transition to constant-voltage mode. VBAT_REG is factory programmed to 4.2V (nominal). Charging in constant-voltage mode will continue until the charge current has reduced to the end of charge termination current programmed using the I2C interface (5%, 10%, 15%, or 20%). Mode Trickle Charge (TK) Time Out Trickle Charge (TK) + Constant Current (TC) Mode Time Out Constant Voltage (TV) Mode Time Out Time 25 minutes 3 hours 3 hours Power Saving Mode After the charge cycle is complete, the battery charger turns off the series pass device and automatically goes into a power saving sleep mode. During this time, the series pass device will block current in both directions to prevent the battery from discharging through the battery charger. The battery charger will remain in sleep mode even if the charger source is disconnected. It will come out of sleep mode if either the battery terminal voltage drops below the VRCH threshold, the charger ENBAT pin is recycled, or the charging source is reconnected. In all cases, the battery charger will monitor all parameters and resume charging in the most appropriate mode. Table 1: Charge Safety Timer (CT) Timeout Period for a 0.1μF Ceramic Timing Capacitor. The CT pin is driven by a constant current source and will provide a linear response to increases in the timing capacitor value. Thus, if the timing capacitor were to be doubled from the nominal 0.1μF value, the time-out periods would be doubled. If the programmable watchdog timer function is not needed, it can be disabled by terminating the CT pin to ground or disabled using the I2C bus. The CT pin should not be left floating or unterminated, as this will cause errors in the internal timing control circuit. The constant current provided to charge 3601.2008.07.1.1 www.analogictech.com 25 PRODUCT DATASHEET AAT3601178 Total Power Solution for Portable Applications the timing capacitor is very small, and this pin is susceptible to noise and changes in capacitance value. Therefore, the timing capacitor should be physically located on the printed circuit board layout as close as possible to the CT pin. Since the accuracy of the internal timer is dominated by the capacitance value, a 10% tolerance or better ceramic capacitor is recommended. Ceramic capacitor materials, such as X7R and X5R types, are a good choice for this application. 1400 1200 ICH_CC (mA) 1000 800 600 400 200 0 0.1 1 10 100 Programming Charge Current (ISET) The default constant current mode charge level is user programmed with a set resistor placed between the ISET pin and ground. The accuracy of the constant charge current, as well as the preconditioning trickle charge current, is dominated by the tolerance of the set resistor. For this reason, a 1% tolerance metal film resistor is recommended for the set resistor function. The constant charge current levels from 100mA to 1A may be set by selecting the appropriate resistor value from Table 2 and Figures 6 and 7. The ISET pin current to charging current ratio is 1 to 800. It is regulated to 1.25V during constant current mode unless changed using I2C commands. It can be used as a charging current monitor, based on the equation: ISET Resistor (kΩ) Figure 6: Constant-Current Mode Charge ICH_CC Setting vs. ISET Resistor. Ω 1.4 1.2 1 VISET (V) 0.8 0.6 0.4 0.2 0 2.5 2.9 3.3 3.7 4.1 4.5 Battery Voltage (V) ICH = 800 ⋅ ⎛ VISET⎞ ⎝ RISET⎠ Figure 7: ISET Voltage vs. Battery Voltage. During preconditioning charge, the ISET pin is regulated to 0.2V (Figure 6), but the equation stays the same. During constant voltage charge mode, the ISET pin voltage will slew down and be directly proportional to the battery current at all times. Constant Charging Current ICH_CC (mA) 100 200 300 400 500 600 700 800 900 1000 Reverse Battery Leakage The AAT3601 includes internal circuitry that eliminates the need for series blocking diodes, reducing solution size and cost as well as dropout voltage relative to conventional battery chargers. When the input supply is removed or when CHGIN goes below the AAT3601’s under-voltage lockout (UVLO) voltage, or when CHGIN drops below VBAT, the AAT3601 automatically reconfigures its power switches to minimize current drain from the battery. Set Resistor Value (kΩ) 10 4.99 3.32 2.49 2 1.65 1.43 1.24 1.1 1 Charge Status Output (STAT and STAT_BAT) The AAT3601 provides battery charging status via a status pin. The STAT is active low open drain for driving and LED. STAT_BAT is the same function as STAT pin but with opposite polarity to be used as a μP flag. The status pin can indicate the following conditions: Table 2: Constant Current Charge vs. ISET Resistor Value. 26 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 Total Power Solution for Portable Applications Event Description No battery charging activity. Battery charging Charging completed STAT Low (to GND) High (to VOUT1) Low (to GND) Table 3: Charge Status Output (STAT). CHGIN Bypass Capacitor Selection CHGIN is the power input for the AAT3601 battery charger. The battery charger is automatically enabled whenever a valid voltage is present on CHGIN. In most applications, CHGIN is connected to either a wall adapter or USB port. Under normal operation, the input of the charger will often be “hot-plugged” directly to a powered USB or wall adapter cable, and supply voltage ringing and overshoot may appear at the CHGIN pin. A high quality capacitor connected from CHGIN to G, placed as close as possible to the IC, is sufficient to absorb the energy. Walladapter powered applications provide flexibility in input capacitor selection, but the USB specification presents limitations to input capacitance selection. In order to meet both the USB 2.0 and USB OTG (On The Go) specifications while avoiding USB supply under-voltage conditions resulting from the current limit slew rate (100mA/ μs) limitations of the USB bus, the CHGIN bypass capacitance value must to be between 1μF and 4.7μF. Ceramic capacitors are often preferred for bypassing applications due to their small size and good surge current ratings, but care must be taken in applications that can encounter hot plug conditions as their very low ESR, in combination with the inductance of the cable, can create a high-Q filter that induces excessive ringing at the CHGIN pin. This ringing can couple to the output and be mistaken as loop instability, or the ringing may be large enough to damage the input itself. Although the CHGIN pin is designed for maximum robustness and an absolute maximum voltage rating of +6.5V for transients, attention must be given to bypass techniques to ensure safe operation. As a result, design of the CHGIN bypass must take care to “de-Q” the filter. This can be accomplished by connecting a 1Ω resistor in series with a ceramic capacitor (as shown in Figure 8A), or by bypassing with a tantalum or electrolytic capacitor to utilize its higher ESR to dampen the ringing, as shown in Figure 8B. For additional protection, Zener diodes with 6V clamp voltages may also be used. In any case, it is always critical to evaluate voltage transients at the CHGIN pin with an oscilloscope to ensure safe operation. Thermal Considerations The actual maximum charging current is a function of Charge Adapter input voltage, the state of charge of the battery at the moment of charge, the system supply current from SYSOUT, and the ambient temperature and the thermal impedance of the package. The maximum programmable current may not be achievable under all operating parameters. Issues to consider are the amount of current being sourced to the SYSOUT pin from the CHGIN LDO at the same time as the charge current to BAT. To USB Port or Wall Adapter 1Ω 1μF Ceramic (XR5/XR7) CHGIN To USB Port or Wall Adapter 4.7μF ESR > 1Ω CHGIN (A) Figure 8: Hot Plug Requirements. (B) 3601.2008.07.1.1 www.analogictech.com 27 PRODUCT DATASHEET AAT3601178 Total Power Solution for Portable Applications The AAT3601 is offered in a TQFN55-36 package which can provide up to 4W of power dissipation when it is properly bonded to a printed circuit board and has a maximum thermal resistance of 25°C/W. Many considerations should be taken into account when designing the printed circuit board layout, as well as the placement of the charger IC package in proximity to other heat generating devices in a given application design. The ambient temperature around the charger IC will also have an effect on the thermal limits of a battery charging application. The maximum limits that can be expected for a given ambient condition can be estimated by the following discussion. First, the maximum power dissipation for a given situation should be calculated: VOUTX and IOUTX = Output Voltage and Load Currents for the LDOs and Step-Down Converter (Default Output Voltages) By substitution, we can derive the maximum charge current (ICH_CC(MAX)) before reaching the thermal limit condition (TREG = 100°C, Thermal Loop Regulation). The maximum charge current is the key factor when designing battery charger applications. (TREG - TA) - (V CHGIN · IOP) - (VCHGIN - VSYSOUT) · ISYSOUT) θJA ICH_CC(MAX) = - [(VSYSOUT - VOUT1) · IOUT1] - (VSYSOUT - VOUT2) · IOUT2 PD(MAX) = Where: (TJ(MAX) - TA) θJA - [(VSYSOUT - VOUT3) · IOUT3] - (VSYSOUT - VOUT4) · IOUT4 - (VSYSOUT - VOUT5) · IOUT5 PD(MAX) = Maximum Power Dissipation (4W) θJA = Package Thermal Resistance (25°C/W) TJ(MAX) = Maximum Device Junction Temperature (°C) (140°C) TA = Ambient Temperature (°C) Next, the power dissipation for the charger can be calculated by the following equation: PD = (VCHGIN - VBAT) · ICH_CC + (VCHGIN · IOP) + (VCHGIN - VSYSOUT) · ISYSOUT + (VSYSOUT - VOUT1) · IOUT1 + (VSYSOUT - VOUT2) · IOUT2 + (VSYSOUT - VOUT3) · IOUT3 + (VSYSOUT - VOUT4) · IOUT4 + (VSYSOUT - VOUT5) · IOUT5 VOUTBUCK RDS(ON)H · [VSYSOUT - VOUTBUCK]⎞ ⎛ + IOUTBUCK2 · ⎝RDS(ON)L · V + ⎠ VSYSOUT SYSOUT VOUTBUCK RDS(ON)H · (VSYSOUT - VOUTBUCK)⎞ ⎛ - IOUTBUCK2 · RDS(ON)L · V + ⎠ VSYSOUT ⎝ SYSOUT VIN - VBAT In general, the worst condition is when there is the greatest voltage drop across the charger, when battery voltage is charged up to just past the preconditioning voltage threshold and the LDOs and step-down converter are sourcing full output current. For example, if 700mA and 147mA are being sourced from the 3.9V SYSOUT pin to the LDOs and Buck supply channels respectively (300mA to LDO2, 100mA to LDO1 and 3-5, and 147mA to Buck; see buck efficiency graph for 300mA output current) with a CHGIN supply of 5V, and the battery is being charged at 3.0V, then the power dissipated will be 3.49W. A reduction in the charge current (through I2C) may be necessary in addition to reduction provided by the internal thermal loop of the charger itself. For the above example at TA = 30°C, the ICH_CC(MAX) = 459mA. Where: PD = Total Power Dissipation by the Device VCHGIN = CHGIN Input Voltage VBAT = Battery Voltage at the BAT Pin ICH_CC = Constant Charge Current Programmed for the Application IOP = Quiescent Current Consumed by the IC for Normal Operation (0.5mA) VSYSOUT and ISYSOUT = Output Voltage and Load Current from the SYSOUT Pin for the System LDOs and Stepdown Converter (3.9V out for SYSOUT) RDS(ON)H and RDS(ON)L = On-Resistance of Step-down High and Low Side MOSFETs (0.8Ω each) Thermal Overload Protection The AAT3601 integrates thermal overload protection circuitry to prevent damage resulting from excessive thermal stress that may be encountered under fault conditions, for example. This circuitry disables all regulators if the AAT3601 die temperature exceeds 140°C, and prevents the regulators from being enable until the die temperature drops by 15°C (typ). 28 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 Total Power Solution for Portable Applications Synchronous Step-Down (Buck) Converter The AAT3601 contains a high performance 300mA, 1.5MHz synchronous step-down converter. The stepdown converter operates to ensure high efficiency performance over all load conditions. It requires only 3 external power components (CIN, COUT, and L). A high DC gain error amplifier with internal compensation controls the output. It provides excellent transient response and load/line regulation. Transient response time is typically less than 20μs. The converter has soft start control to limit inrush current and transitions to 100% duty cycle at drop out. The step-down converter input pin PVIN should be connected to the SYSOUT LDO output pin. The output voltage is internally fixed at 1.24V. Power devices are sized for 300mA current capability while maintaining over 90% efficiency at full load. line conditions. The voltage feedback resistive divider is internal and the error amplifier reference voltage is 0.45V. The voltage loop has a high DC gain making for excellent DC load and line regulation. The internal voltage loop compensation is located at the output of the transconductance voltage error amplifier. Soft-Start Soft start slowly increases the internal reference voltage when the input voltage or enable input is initially applied. It limits the current surge seen at the input and eliminates output voltage overshoot. Current Limit and Over-Temperature Protection For overload conditions the peak input current is limited. As load impedance decreases and the output voltage falls closer to zero, more power is dissipated internally, raising the device temperature. Thermal protection completely disables switching when internal dissipation becomes excessive, protecting the device from damage. The junction over-temperature threshold is 140°C with 15°C of hysteresis. Input/Output Capacitor and Inductor Apart from the input capacitor that is shared with the LDO inputs, only a small L-C filter is required at the output side for the step-down converter to operate properly. Typically, a 2.2μH inductor such as the Sumida CDRH2D11NP2R2NC and a 4.7μF ceramic output capacitor are recommended for low output voltage ripple and small component size. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. A 10μF ceramic input capacitor is sufficient for most applications. Linear LDO Regulators (OUT1-5) The advanced circuit design of the linear regulators has been specifically optimized for very fast start-up and shutdown timing. These proprietary LDOs are tailored for superior transient response characteristics. These traits are particularly important for applications which require fast power supply timing. There are two LDO input pins AVIN1/2 which should be connected to the SYSOUT LDO output pin. All LDO outputs are initially fixed at default levels. The user can program the output voltages for all the LDOs using I2C (see Table 8). The high-speed turn-on capability is enabled through the implementation of a fast start control circuit, which accelerates the power up behavior of fundamental control and feedback circuits within the LDO regulator. Fast turn-off time response is achieved by an active output pull down circuit, which is enabled when an LDO regulator is placed in the shutdown mode. This active fast shutdown circuit has no adverse effect on normal device operation. Control Loop The converter is a peak current mode step-down converter. The inner, wide bandwidth loop controls the inductor peak current. The inductor current is sensed through the P-channel MOSFET (high side) which is also used for short circuit and overload protection. A fixed slope compensation signal is added to the sensed current to maintain stability for duty cycles greater than 50%. The peak current mode loop appears as a voltage programmed current source in parallel with the output capacitor. The output of the voltage error amplifier programs the current mode loop for the necessary peak inductor current to force a constant output voltage for all load and 3601.2008.07.1.1 www.analogictech.com 29 PRODUCT DATASHEET AAT3601178 Total Power Solution for Portable Applications Input/Output Capacitors The LDO regulator output has been specifically optimized to function with low cost, low ESR ceramic capacitors. However, the design will allow for operation over a wide range of capacitor types. The input capacitor is shared with all LDO inputs and the step-down converter. A 10μF ceramic output capacitor is recommended for LDO2-5 and a 22μF is recommended for LDO1. I2C Serial Interface and Programmability Serial Interface Many of the features of the AAT3601 can be controlled via the I2C serial interface. The I2C serial interface is a widely used interface where it requires a master to initiate all the communications with the slave devices. The I2C protocol consists of 2 active wire SDA (serial data line) and SCL (serial clock line). Both wires are open drain and require an external pull up resistor to VCC (SYSOUT may be used as VCC). The SDA pin serves I/O function, and the SCL pin controls and references the I2C bus. I2C protocol is a bidirectional bus which allows both read and write actions to take place, but the AAT3601 supports the write protocol only. Since the protocol has a dedicated bit for Read or Write access (R/W), when communicating with AAT3601, this bit must be set to “0”. The timing diagram below depicts the transmission protocol. Current Limit and Over-Temperature Protection The regulator comes with complete short circuit and thermal protection. The combination of these two internal protection circuits gives a comprehensive safety system to guard against extreme adverse operating conditions. ACK from slave START MSB ACK from slave ACK from slave Chip Address LSB W ACK MSB Register Address LSB ACK MSB Data LSB ACK STOP SCL SDA 1 0 0 1 1 0 0 0 including R/W bit, Chip Address = 0x98 Figure 9: I2C Timing Diagram. 30 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 LSB Total Power Solution for Portable Applications START and STOP Conditions START and STOP conditions are always generated by the master. Prior to initiating a START condition, both the SDA and SCL pin are idle mode (idle mode is when there is no activity on the bus and SDA and SCL are pulled to VCC via external resistor). As depicted in Figure 9, a START condition is defined to be when the master pulls the SDA line low and after a short period pulls the SCL line low. A START condition acts as a signal to the ICs that something is about to be transmitted on the BUS. A STOP condition, also shown in Figure 9, is when the master releases the bus and SCL changes from low to high followed by SDA low to high transition. The master does not issue an ACKNOWLEGE and releases the SCL and SDA pins. MSB R/W Figure 10: Bit Order. The address is embedded in the first seven bits of the byte. The eighth bit is reserved for the direction of the information flow for the next byte of information. For the AAT3601, this bit must be set to “0”. The full 8-bit address including the R/W bit is 0x98 (hex) or 10011000 in binary. Acknowledge Bit Acknowledge bit is the ninth bit of data. It is used to send back a confirmation to the master that the data has been received properly. For acknowledge to take place, the MASTER must first release the SDA line, then the SLAVE will pull the data line low as shown in Figure 9. Transferring Data Every byte on the bus must be 8 bits long. A byte is always sent with a most significant bit first (see Figure 10). Serial Programming Code After sending the chip address, the master should send an 8-bit data stream to select which register to program and then the codes that the user wishes to enter. Register 0x00: Timer Register 0x01: Not used Register 0x02: LDO51 LDO50 LDO41 LDO40 LDO31 LDO30 LDO21 LDO20 Not used Not used Not used Not used SYS LDO11 LDO10 RCHG1 RCHG0 CHG2 CHG1 CHG0 Term1 Term0 Figure 11: Serial Programming Register Codes. Constant Current Charge as % of ISET current (default) 100% (default) 80% 60% 40% 120% 140% 160% 180% USE_USB Pin 1 0 X X X X X X X CHG2 0 0 0 0 0 1 1 1 1 CHG1 0 0 0 1 1 0 0 1 1 CHG0 0 0 1 0 1 0 1 0 1 Constant Current Charge ICH_CC 100mA (fixed internally) 800mA (set by ISET resistor) 640mA 480mA 320mA 960mA 1120mA 1280mA 1440mA Table 4: CHG Bit Setting for the Constant Current Charge Level (ISET resistor = default 800mA charge current). 3601.2008.07.1.1 www.analogictech.com 31 PRODUCT DATASHEET AAT3601178 4.00V (default) 4.05V 4.10V 4.15V Total Power Solution for Portable Applications Notes concerning the operation of the CHG2, CHG1 and CHG0 bits or ISET code. • Once the part is turned on using the EN_SYS pin (and there is a BAT and/or CHGIN supply), and data is sent through I2C, the I2C codes in the registers will always be preserved until the part is shut down using the EN_PE (going high) or if the BAT and CHGIN are removed. • If the part is turned on by connecting CHGIN (and not through EN_SYS), then when the CHGIN is disconnected, the part will shut down and all I2C registers will be cleared. If USE_USB = L, • The charge current is set by the ISET code in Register 0x00, bits 2,3,4. (code 000 will equal 100%) • If the part has been turned on by EN_SYS and CHGIN is disconnected then reconnected, it will still contain the code it had before (if it was 60% then it will remain 60%). • If the part has NOT been turned on by EN_SYS and CHGIN is disconnected then reconnected, it will be reset to 100% (since the whole part was shutdown). If USE_USB = H, • ISET Code 000 in Register 0x00, bits 2,3,4 = 100mA. The other codes stay the same as if USE_USB = H. • If the part has been turned on by EN_SYS and CHGIN is disconnected then reconnected, the ISET code will be forced to 000 and the current will be set to 100mA. • The next time any I2C register is programmed (even if it is not for the ISET code), the ISET code will revert back to what it was before. For example, if the ISET code is set to 010 and USE_USB = H and the part was turned on with EN_SYS, then when CHGIN is disconnected then reconnected, the charger will be set to 100mA. Then if any other command is sent, the ISET code will remain 010. Term1 0 0 1 1 RCHG1 0 0 1 1 RCHG0 0 1 0 1 Recharge Threshold Table 6: RCHG Bit Setting for the Battery Charger Recharge Voltage Level. Timer 0 1 Charger Watchdog Timer ON (default) OFF (and reset to zero) Table 7: Timer Bit Setting for the Charger Watchdog Timer. LDO11 0 0 1 1 LDO10 0 1 0 1 LDO1 Output Voltage 3.40V (default) 2.88V 3.50V 3.09V LDO21 0 0 1 1 LDO20 0 1 0 1 LDO2 Output Voltage 3.40V (default) 2.78V 3.09V 1.85V LDO31 0 0 1 1 LDO30 0 1 0 1 LDO3 Output Voltage 1.24V (default) 1.29V 1.34V 2.88V LDO41 0 0 1 1 LDO40 0 1 0 1 LDO4 Output Voltage 1.85V (default) 1.65V 1.24V 1.91V LDO51 0 0 1 1 LDO50 0 1 0 1 LDO5 Output Voltage 1.85V (default) 1.75V 1.55V 1.91V Term0 0 1 0 1 Termination Current (as % of Constant Current Charge) 5% (default) 10% 15% 20% Table 8: LDO Bit Setting for LDO Output Voltage Level. SYS Bit 0 1 Table 5: Term Bit Setting for the Termination Current Level. SYSOUT Power Source If USE_USB=H, SYSOUT powered from BAT If USE_USB=L, SYSOUT powered from CHGIN SYSOUT always powered from BAT Table 9: SYS Bit Setting for SYSOUT Power Path. 32 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 Total Power Solution for Portable Applications Layout Guidance Figure 12 is the schematic for the evaluation board. The evaluation board has extra components for easy evaluation; the actual BOM need for the system is shown in Table 10. When laying out the PC board, the following layout guideline should be followed to ensure proper operation of the AAT3601: 1. The exposed pad EP must be reliably soldered to PGND/AGND and multilayer GND. The exposed thermal pad should be connected to board ground plane and pins 17 and 31. The ground plane should include a large exposed copper pad under the package with VIAs to all board layers for thermal dissipation. The power traces, including GND traces, the LX traces and the VIN trace should be kept short, direct and wide to allow large current flow. The L1 connection to the LX pins should be as short as possible. Use several via pads when routing between layers. 3. The input capacitors (C1 and C2) should be connected as close as possible to CHGIN (Pin 28) and PGND (Pin 31) to get good power filtering. Keep the switching node LX away from the sensitive OUTBUCK feedback node. The feedback trace for the OUTBUCK pin should be separate from any power trace and connected as closely as possible to the load point. Sensing along a high current load trace will degrade DC load regulation. The output capacitor C4 and L1 should be connected as close as possible and there should not be any signal lines under the inductor. The resistance of the trace from the load return to the PGND (Pin 31) should be kept to a minimum. This will help to minimize any error in DC regulation due to differences in the potential of the internal signal ground and the power ground. 4. 5. 6. 7. 2. 3601.2008.07.1.1 www.analogictech.com 33 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Quantity 5 2 4 3 1 1 9 8 1 Value 10μF 22μF 4.7μF 0.1μF 0.01μF 2.2μH 100K 10K 1.24K Designator C1, C2, C3, C14, C15 C9 C4, C5, C6, C7, C8 C10, C11, C12 C13 L1 R5, R8, R20, R21, R22, R23, R25, R26, R27 R17, R19, R24, R29, R31, R32, R33, R37 R18 Footprint 0603 0805 0603 0402 0402 CDRH2D 0402 0402 0402 Description Capacitor - Ceramic - X5R, 6.3V, ±20% Capacitor - Ceramic - 20%, 6.3V, X5R Capacitor - Ceramic - 20%, 6.3V, X5R Capacitor - Ceramic -16V, 10%, X5R Capacitor - Ceramic -16V, 10%, X7R Inductor - Sumida CDRH2D11NP-2R2NC Resistor - 5% Resistor - 5% Resistor - 1% Table 10: Minimum AAT3601 BOM. J1 2 1 AUX Input J3 USB Mini 54321 SDA SCL TP1 TP2 J2 OUT1 R1 10K R2 10K SDA SCL GND 1 2 3 4 Data Header TP3 AGND C1 CHGIN TP4 CHGIN 28 10μF ENBAT TP6 U1 CHGIN ENBAT USE_USB SDA SCL EN_SYS TEMP_FLAG WDI EN_PE EN_NP GND GND CT ISET TS CNOISE AGND PGND GND_SLUG AAT3601 QFN55-36 SYSOUT SYSOUT AVIN1 AVIN2 PVIN OUT1 OUT2 OUT3 OUT4 OUT5 LX OUTBUCK RSTIN STATBAT RSTLPW STAT BAT BAT 27 26 BAT TP5 BAT OUTBUCK TP8 25 24 14 11 22 USE_USB TP7 ENBAT USE_USB EN_SYS TP15 TEMP_FLAG TP14 30 29 35 36 3 OUT5 TP9 OUT4 TP10 OUT3 TP11 OUT2 TP12 OUT1 TP13 SYSOUT C2 10μF C3 10μF B1 Li+ Battery TP16 WDI SW1 R3 100K EN_SYS CHGIN R4 100K 2 1 5 15 13 12 10 9 20 23 OUT1 SW2 EN_PE TP17 OUT1 J6 EN_PE 6 7 8 OUT1 OUT2 OUT3 OUT4 OUT5 OUTBUCK L1 2.2μF TP18 RSTIN TP19 RSTLPW OUT1 R5 100K R6 100K C4 4.7μF C5 10μF C6 10μF C7 10μF C8 10μF C9 22μF EN_PE 33 32 19 4 18 34 17 16 21 37 CHGIN USE_USB J4 CHGIN ENBAT J5 31 TP20 STAT TP21 STAT_BAT USE_USB ENBAT C10 0.1μF R7 1.24K R8 10K C11 0.01μF R9 1K R10 1K D1 GREEN STAT_BAT D1 GREEN STAT SYSOUT Figure 12: AAT3601 Evaluation Kit Schematic. 34 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Figure 13: AAT3601 Evaluation Kit Top Layer. Figure 14: AAT3601 Evaluation Kit Mid1 Layer. Figure 15: AAT3601 Evaluation Kit Mid2 Layer. Figure 16: AAT3601 Evaluation Kit Bottom Layer. 3601.2008.07.1.1 www.analogictech.com 35 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Ordering Information Package TQFN55-36 Part Marking1 2RXYY Part Number (Tape and Reel)2 AAT3601IIH-T1 All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means semiconductor products that are in compliance with current RoHS standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more information, please visit our website at http://www.analogictech.com/about/quality.aspx. Packaging Information TQFN55-36 Index Area (D/2 x E/2) 3.600 ± 0.050 R = 0.1 C = 0.3 Detail "A" 5.000 ± 0.050 5.000 ± 0.050 3.600 ± 0.050 Top View Bottom View 0.750 ± 0.050 0.203 REF + 0.050 0.000 - 0.000 0.200 ± 0.050 0.450 ± 0.050 0.40 BSC Side View Detail "A" All dimensions in millimeters. 1. XYY = assembly and date code. 2. Sample stock is generally held on part numbers listed in BOLD. 3. The leadless package family, which includes QFN, TQFN, DFN, TDFN and STDFN, has exposed copper (unplated) at the end of the lead terminals due to the manufacturing process. A solder fillet at the exposed copper edge cannot be guaranteed and is not required to ensure a proper bottom solder connection. 36 www.analogictech.com 3601.2008.07.1.1 PRODUCT DATASHEET AAT3601178 AAT3601178 Total Power Solution for Portable Applications Advanced Analogic Technologies, Inc. 3230 Scott Boulevard, Santa Clara, CA 95054 Phone (408) 737-4600 Fax (408) 737-4611 © Advanced Analogic Technologies, Inc. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in AnalogicTech’s terms and conditions of sale, AnalogicTech assumes no liability whatsoever, and AnalogicTech disclaims any express or implied warranty relating to the sale and/or use of AnalogicTech products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders. 3601.2008.07.1.1 www.analogictech.com 37
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