AAT4900IJS-T1

Buffered Power Half-Bridge General Description The AAT4900 FastSwitch is a member of AnalogicTech's Application Specific Power MOSFET™ (ASPM™) product family. It is a buffered power half-bridge, consisting of low on resistance power MOSFETs with integrated control logic. This device operates with inputs ranging from 2.0V to 5.5V, making it ideal for 2.5V, 3V, and 5V systems. The device is protected from shootthrough current with its own control circuitry. The AAT4900 is capable of very fast switching times and is ideal for use in high frequency DC/DC converters. The quiescent supply current is a low 4mA at 1MHz CLK frequency. In shutdown mode, the supply current decreases to less than 1µA max. The AAT4900 is available in a Pb-free 5-pin SOT23 or 8-pin SC70JW package and is specified over the -40°C to +85°C temperature range. AAT4900 Features • • • • • • • • FastSwitch™ 2.0V to 5.5V Input Voltage Range 105mΩ (typ) Low Side Switch RDS(ON) 130mΩ (typ) High Side Switch RDS(ON) Low Quiescent Current: — 1μA (max) DC — 4mA at 1MHz Only 2.5V Needed for Control Signal Input Break-Before-Make Shoot-Through Protection Temperature Range: -40°C to +85°C 5-Pin SOT23 or 8-Pin SC70JW Package Applications • • • DC Motor Drive High Frequency DC/DC Converters MOSFET Driver Typical Application DC/DC Converter Output Stage 2.0V to 5.5V Input IN Control Circuit (PWM Output) CLK EN AAT4900 SOT23 GND OUTPUT LX ENABLE 4900.2006.05.1.3 1 Buffered Power Half-Bridge Pin Descriptions Pin # SOT23-5 1 2 3 4 5 SC70JW-8 2, 3 6, 7, 8 4 5 1 AAT4900 Symbol LX GND EN CLK IN Function Inductor connection. LX output is controlled by CLK and EN (see Control Logic Table). Ground connection. Active-high enable input. A logic low signal puts the LX output pin in high impedance mode. Logic input signal determines the state of LX output. Supply voltage input. Input voltage range from 2.0V to 5.5V. Pin Configuration SOT23-5 (Top View) SC70JW-8 (Top View) LX GND EN 1 2 3 5 IN CLK 4 IN LX LX EN 1 2 8 7 3 4 6 5 GND GND GND CLK 1 2 Control Logic Table Inputs CLK 0 0 1 1 Output EN 0 1 0 1 LX High Impedance VIN High Impedance Ground 2 4900.2006.05.1.3 Buffered Power Half-Bridge Absolute Maximum Ratings1 TA = 25°C, unless otherwise noted. Symbol VIN VEN, VCLK VOUT IMAX TJ VESD TLEAD AAT4900 Description IN to GND EN, CLK to GND OUT to GND Maximum Continuous Switch Current Operating Junction Temperature Range ESD Rating2 - HBM Maximum Soldering Temperature (at Leads) Value -0.3 to 6 -0.3 to 6 -0.3 to VIN+0.3 2 -40 to 150 4000 300 Units V V V A °C V °C Thermal Information3 Symbol ΘJA PD Description Thermal Resistance (SOT23-5, SC70JW-8) Power Dissipation (SOT23-5, SC70JW-8) Value 190 526 Units °C/W mW 1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time. 2. Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. 3. Mounted on a demo board. 4900.2006.05.1.3 3 Buffered Power Half-Bridge Electrical Characteristics VIN = 5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = 25°C. Symbol VIN IQAC IQDC IQ(OFF) ISD(OFF) RDS(ON)H AAT4900 Description Operation Voltage AC Quiescent Current DC Quiescent Current Off-Supply Current Off-Switch Current Conditions Min 2.0 Typ 4 Max Units 5.5 9 1 1 1 165 195 145 175 0.8 V mA µA µA µA mΩ RDS(ON)L VONL VONH ISINK TBBM TON-DLY THIZ IN = 5V, EN = IN, CLK = 1MHz, ILX = 0 IN = 5V, EN = IN, CLK = GND, ILX = 0 EN = CLK = GND, IN = LX = 5.5V EN = GND, IN = 5.5V, VOUT = 0 or LX = IN IN = 5V, TA = 25°C High Side MOSFET IN = 3V, TA = 25°C On Resistance IN = 2V, TA = 25°C IN = 5V, TA = 25°C Low Side MOSFET IN = 3V, TA = 25°C On Resistance IN = 2V, TA = 25°C CLK, EN Input Low Voltage IN = 2.7V to 5.5V IN = 2.7V to ≤4.2V1 CLK, EN Input High Voltage IN = >4.2V to 5V1 CLK, EN Input Leakage CLK, EN = 5.5V CLK Rising Break-Before-Make Time CLK Falling CLK Rising CLK to LX Delay CLK Falling CLK = GND EN to OUT HiZ Delay CLK = IN 0.03 130 165 235 105 135 200 2.0 2.4 0.01 5 5 30 40 40 40 mΩ V V 1 µA ns ns ns 1. For VIN outside this range, consult CLK/Enable Threshold vs. Input Voltage curve. 4 4900.2006.05.1.3 Buffered Power Half-Bridge Typical Characteristics Operating Current vs. Input Voltage (FS = 1MHz) 7 6 5 4 3 2 1 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 AAT4900 Operating Current vs. Switching Frequency 10.000 1.000 0.100 0.010 0.001 0.000 0.0 Operating Current (mA) Operating Current (mA) VIN = 5V VIN = 3V 0.1 1 10 100 1000 10000 Input Voltage (V) Frequency (kHz) Operating Current vs. Temperature (FS = 1MHz) Operating Current (mA) Operating Current (mA) 12 10 8 6 4 2 0 -40 -20 0 20 40 60 80 100 120 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 -40 Operating Current vs. Temperature (FS = 1MHz) VIN = 3.1V VIN = 5.5V VIN = 2.7V VIN = 4.3V -20 0 20 40 60 80 100 120 Temperature (°C) Temperature (°C) High Side RDS(ON) vs. Output Current 0.22 0.21 0.20 0.19 0.18 0.17 0.16 0.15 0.14 0.13 0.12 0.11 0.10 0.20 Low Side R DS(ON) vs. Output Current 0.16 VIN = 2.7V 0.15 0.14 VIN = 2.7V RDS(ON) (Ω) RDS(ON) (Ω) 0.13 0.12 0.11 0.10 VIN = 5.5V 0.40 0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.00 2.20 0.09 0.08 0.2 VIN = 5.5V 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2. 2 Output Current (A) Output Current (A) 4900.2006.05.1.3 5 Buffered Power Half-Bridge Typical Characteristics High Side RDS(ON) 0.30 0.30 0.25 AAT4900 Low Side RDS(ON) 0.25 RDS(ON) (Ω) 0.20 0.15 0.10 0.05 0.00 -40 RDS(ON) (Ω) VIN = 2.7V, ID = 2.2A 0.20 0.15 0.10 0.05 0.00 -40 VIN = 2.7V, ID = 2.2A VIN = 2.7V, ID = 0.2A VIN = 5.5V, ID = 0.2A to 2.2A -20 0 20 40 60 VIN = 2.7V, ID = 0.2A VIN = 5.5V, ID = 0.2A to 2.2A -20 0 20 40 60 80 80 100 120 100 120 Temperature (°C) Temperature (°C) Propagation Delay vs. Input Voltage (CL = 1000pF) CLK/Enable Threshold vs. Input Voltage 2.4 Threshold Voltage (V) 120 Delay Time (ns) tPLH 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 100 80 60 40 VONH VONL tPHL 20 1.5 2 2.5 3 3.5 4 4.5 5 5.5 1.5 2 2.5 3 3.5 4 4.5 5 5.5 Input Voltage (V) Input Voltage (V) RDS(ON) vs. Input Voltage 0.28 0.26 0.24 R DS(ON) (Ω) 0.22 0.20 0.18 0.16 0.14 0.12 0.10 1.5 2 2.5 3 3.5 4 4.5 5 5.5 High Side Low Side Input Voltage (V) 6 4900.2006.05.1.3 Buffered Power Half-Bridge Functional Block Diagram IN AAT4900 CLK Control Logic and Shoot-Through Protection LX EN GND Typical Applications DC/DC Converter The most common AAT4900 applications include a DC/DC converter output power stage and a MOSFET gate drive buffer. Figure 1 shows a common configuration when used as a DC/DC converter power stage with synchronous rectification. The enable pin can be used to VIN = 2.0 to 5.5V force the LX output to a high impedance state under light load conditions. This enables the output inductor to operate in discontinuous conduction mode (DCM), improving efficiency under light load conditions. The body diode associated with the low side switching device gives the AAT4900 inductive switching capability, clamping the LX node at a diode drop below GND during the break-beforemake time. IN EN DC / DC Controller AAT4900 CLK GND GND LX + VOUT = 0 to VIN IOUT = 0 to 1A - Figure 1: AAT4900 DC/DC Converter Power Stage. 4900.2006.05.1.3 7 Buffered Power Half-Bridge Synchronous Buck DC/DC Converter Application The losses associated with the AAT4900 high side switching MOSFET are due to switching losses and conduction losses. The conduction losses are associated with the RDS(ON) characteristics of the output switching device. At the full load condition, assuming continuous conduction mode (CCM), the on losses can be derived from the following equations. IO2 · (RDS(ON)H · VO + RDS(ON)L · (VIN -VO)) VIN AAT4900 Eq. 5: PLOSS = + (tsw · FS · IO + IQ) · VIN Eq. 1: D is the duty cycle. D= VO VIN Eq. 2: ΔI = V⎞ VO ⎛ 1- O L · FS ⎝ VIN ⎠ Substitution of the IRMS equations with IO results in very little error when the inductor ripple current is 20% to 40% of the full load current. The equation also includes switching and quiescent current losses where tSW is approximated at 18 nsec and IQ is the no load quiescent current of the AAT4900. Quiescent current losses are associated with the gate drive of the output stage and biasing. Since the gate drive current varies with frequency and voltage, the bias current must be checked at the frequency, voltage, and temperature of operation with no load attached to the LX node. Once the above losses have been determined, the maximum junction temperature can be calculated. Eq. 6: TJ(MAX) = PLOSS · ΘJC = TAMB ΔI is the peak-to-peak inductor ripple current. High Side Switch RMS Current Eq. 3: IRMS(HS) = 2 ⎛ 2 ΔI ⎞ ·D IO + ⎝ 12 ⎠ Low Side Switch RMS Current The low side RMS current is estimated by the following equation. Using the above equations, the graph below shows the current capability for some typical applications with maximum junction temperatures of 150°C and 120°C. The increase in RDS(ON) vs. temperature is estimated at 3.75mΩ for a 10°C increase in junction temperature. Step-Down Converter Limits (FS = 1MHz) 1.75 Output Current (A) Eq. 4: 2 ⎛ 2 ΔI ⎞ · (1 - D) IO + IRMS(LS) = ⎝ 12 ⎠ 1.5 1.25 VIN = 4.2V, VO = 2.5V VIN = 5.0V, VO = 3.3V TJMAX = 150°C TJMAX = 120°C Total Losses A simplified form of the above results (where the above descriptions of IRMS has been approximated with Io) is given by: 1 0.75 0.5 25 VIN = 4.2V, VO = 2.5V VIN = 5.0V, VO = 3.3V 35 45 55 65 75 85 Ambient Temperature (°C) 8 4900.2006.05.1.3 Buffered Power Half-Bridge Gate Drive When used as a MOSFET gate driver, the breakbefore-make shoot-through protection significantly reduces losses associated with the driver at high frequencies. (See Figure 2.) The low RDS(ON) of the output stage allows for a high peak gate current and fast switching speeds. A small package size facilitates close placement to the power device for optimum switching performance. The logic level inputs (CLK and EN) are high impedance inputs. Gate Drive Current Ratings An estimate of the maximum gate drive capability with no external series resistor can be derived from Equation 7. Note that the quiescent current varies with the ambient temperature, frequency of operation, and input voltage. The graphs below display the quiescent current and maximum gate charge drive capability at 85°C ambient vs. frequency for various input voltages. 1 ⎛ TJ(MAX) - TAMB ⎞ Eq. 7: QG(MAX) = FS · ⎝ θJA · VIN(MAX) - IQ⎠ 1 ⎛ 120°C - 85°C ⎞ = 1MHz · 190°C/W · 4.2V - 3.2mA ⎝ ⎠ = 40nC Gate Charge (nC) 1000 AAT4900 The quiescent current was first measured over temperature for various input voltages with no load attached. Equation 7 was then used to derive the maximum gate charge capability for the desired maximum junction temperature. QG is the gate charge required to raise the gate of the load MOSFET to the input voltage. This value is taken from the MOSFET manufacturer's gate charge curve. No Load Operating Current at 85°C Ambient 100 Operating Current (mA) VIN = 4.2V 10 VIN = 5.0V VIN = 5.5V VIN = 2.7V 1 0.1 100 1000 10000 Frequency (kHz) Maximum Gate Charge Load @ 85°C (Ambient TJ(MAX) = 120°C) VIN = 2.7V 100 VIN = 4.2V 10 VIN = 5.0V 1 100 VIN = 5.5V 1000 10000 Frequency (kHz) +5V Load Circuit IN Enable EN AAT4900 Clock CLK GND Ground LX Figure 2: AAT4900 Gate Drive Configuration. 4900.2006.05.1.3 9 Buffered Power Half-Bridge Motor Drive The AAT4900 is also ideally suited for use as an efficient output driver for DC brushless motor control. The inductive load switching capability of the AAT4900 eliminates the need for external diodes. A typical motor control circuit is illustrated in Figure 3. AAT4900 Recommended Decoupling Layout Pattern Because of the extremely fast switching speed and the high switching currents, optimum placement of the input capacitor is critical. It is recommended that a 0.1µF to 10µF 0805 or 1206 ceramic capacitor be placed as close as possible to the IC, as shown in Figure 4. This helps to decouple the switching transients from the stray inductance present in the PC board. Enable +5V IN EN AAT4900 Clock CLK GND Ground LX DC Brushless Motor LX IN EN AAT4900 CLK GND Figure 3: Typical Motor Control Block Diagram. AAT4900 4 CLK 3 EN 2 GND 5 V+ 1 LX CAP Figure 4: Recommended Decoupling Layout Pattern. 10 4900.2006.05.1.3 Buffered Power Half-Bridge AAT4900 CLK LX Figure 5: Timing Diagram. CLK 50% 50% tPHL tPLH tf 90% LX 10% Figure 6: Switching Time Waveforms. VIN IN EN LX CLK GND 10μF 1000pF Figure 7: Propagation Delay Test Circuit. 4900.2006.05.1.3 11 Buffered Power Half-Bridge Ordering Information Package SOT23-5 SC70JW-8 AAT4900 Marking1 ABXYY ABXYY Part Number (Tape and Reel)2 AAT4900IGV-T1 AAT4900IJS-T1 All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means semiconductor products that are in compliance with current RoHS standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more information, please visit our website at http://www.analogictech.com/pbfree. Package Information SOT23-5 2.85 ± 0.15 1.90 BSC 0.95 BSC 1.575 ± 0.125 1.10 ± 0.20 0.60 REF 2.80 ± 0.20 1.20 ± 0.25 0.15 ± 0.07 4° ± 4° GAUGE PLANE 10° ± 5° 0.40 ± 0.10 0.075 ± 0.075 0.60 REF 0.45 ± 0.15 0.10 BSC All dimensions in millimeters. 1. XYY = assembly and date code. 2. Sample stock is generally held on part numbers listed in BOLD. 12 4900.2006.05.1.3 Buffered Power Half-Bridge SC70JW-8 0.50 BSC 0.50 BSC 0.50 BSC AAT4900 1.75 ± 0.10 0.225 ± 0.075 2.00 ± 0.20 2.20 ± 0.20 0.048REF 0.85 ± 0.15 1.10 MAX 0.15 ± 0.05 0.100 7 ° ± 3° 0.45 ± 0.10 2.10 ± 0.30 4° ± 4° All dimensions in millimeters. © Advanced Analogic Technologies, Inc. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. AnalogicTech warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with AnalogicTech’s standard warranty. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders. Advanced Analogic Technologies, Inc. 830 E. Arques Avenue, Sunnyvale, CA 94085 Phone (408) 737-4600 Fax (408) 737-4611 4900.2006.05.1.3 0.05 ± 0.05 13