APA2058QBI-TRL

APA2058 2.4W Stereo Fully Differential Audio Power Amplifier With Stereo Class AB Cap-free Headphone Driver and LDO Features • • General Description TM Meeting VISTA Requirement Fully Differential Power Amplifier with Excellent RF Rectification Immunity The APA2058 is a stereo fully differential audio power amplifier with stereo Class-AB cap-free headphone driver and LDO available in a TQFN5X5-32A pins package. The built-in gain setting at power amplifier can minimize the external component counts. For the flexible application, the gain can be set to 4-steps, 10, 12, 15.6, and 21.6dB by gain control pins (GAIN0 and GAIN1). The power amplifier’ s fully differential architecture provides high PSRR, increased immunity to noise and RF rectification. The APA2058 power amplifiers are capable of driving 2.4W at VDD=5V into 4Ω speaker, the cap-free headphone drivers can provide 180mW at HV DD =3.3V into16 Ω headphones, and the LDO has a maximum 200mA(3.3V) driver current for audio codec. The APA2058 provides thermal and over-current protections. The cap-free headphone driver eliminates the DC blocking capacitors at outputs, save the PCB space. The integration of fully differential power amplifier, cap-free headphone driver, and LDO is a best solution for VISTATM requirement and it can lower the total BOM costs. • • • • • • • • • • • No Output Capacitor Required for Head Phone Driver Integrated LDO (Low Dropout Regulator) for Audio Codec (3.3V) Adjustable Gain Setting for Power Amplifier AV=-1.5V/V Fixed Gain Setting for Headphone Driver Fast Start-up Time Integrated De-Pop Circuitry High PSRR (Power Supply Rejection Ratio) Thermal and Over-Current Protections Less External Components Required Space Saving Package – TQFN5x5-32A Lead Free and Green Devices Available (RoHS Compliant) +0 Common Mode Rejection Ratio (dB) Applications -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 20 • • • LCD Monitor Notebook Protable DVD VDD=5.0V RL=4Ω AV=10dB Vin=0.2VPP Ci=0.47µF Input Short AMP Mode Simplified Application Circuit Audio Codec Stereo Speakers 100 1k 10k 20k Frequency (Hz) Stereo Headphone LDO (Low Drop -Out Regulator) ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright © ANPEC Electronics Corp. Rev. A.3 - Aug., 2008 1 www.anpec.com.tw APA2058 Ordering and Marking Information (Note 1) APA2058 Assembly Material Handling Code Temperature Range Package Code APA2058 QB : APA2058 XXXXX Package Code QB : TQFN5x5-32A Operating Ambient Temperature Range I : -40 to 85 °C Handling Code TR : Tape & Reel Assembly Material L : Lead Free Device G : Halogen and Lead Free Device XXXXX - Date Code Note 1 : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J -STD020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Pin Configuration 23 AMP_EN 20 ROUTP 19 ROUTN 22 HP_EN 21 PGND 18 PVDD 17 HVDD 16 HP_LO 15 HP_RO 14 HVSS TQFN5x5-32A (Top View) 13 CVSS 12 CPN 11 CGND 10 CPP 9 NC RINN_A 1 RINP_A 2 LINP_A 3 LINN_A 4 LOUTP 6 LOUTN 7 PGND 5 PVDD 8 24 BIAS LDO_EN 25 RIN_H 26 LIN_H 27 GND 28 LDOUT 29 VDD 30 GAIN0 31 GAIN1 32 =Thermal-Pad (connected the Thermal-Pad to GND plane for better heat dissipation) Absolute Maximum Ratings Symbol VDD HVDD VSS (Note 2) Rating -0.3 to 6 -0.3 to 6 -6 to +0.3 -0.3 to VDD+0.3 VSS-0.3 to HVDD+0.3 -0.3 to VDD+0.3 -0.3 to +0.3 V Unit Parameter Supply Voltage (VDD to GND, PVDD to PGND) Supply Voltage (HVDD to GND) Supply Voltage (HVSS to GND) Input Voltage (RINN_A, RINP_A, LINN_A, LINP_A to GND) Input Voltage (RIN_H, LIN_H to GND) Input Voltage (GAIN0, GAIN1, LDO_EN, AMP_EN, HP_EN to GND) Input Voltage (PGND, CGND to GND) C opyright © A NPEC Electronics Corp. Rev. A.3 - Aug., 2008 2 www.anpec.com.tw APA2058 Absolute Maximum Ratings (Cont.) Symbol TJ TSTG TSDR PD Maximum Junction Temperature Storage Temperature Range Maximum Lead Soldering Temperature, 10 Seconds Power Dissipation Parameter (Note 2) Rating 150 -65 to +150 260 Internally Limited W ο Unit C Notes 2: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Symbol θJA θJC Parameter Thermal Resistance -Junction to Ambient Thermal Resistance -Junction to Case TQFN5X5-32A (Note 3) (Note 4) Typical Value 40 8 Unit ο C /W TQFN5X5-32A Note 3: Please refer to “ Layout Recommendation”, the Thermal-Pad on the bottom of the IC should soldered directly to the PCB’ s Thermal-Pad area that with several thermal vias connect to the ground plan, and the PCB is a 2-layer, 5-inch square area with 2oz copper thickness. Note 4: The case temperature is measured at the center of the Thermal-Pad on the underside of the TQFN5X5-32A package. Recommended Operating Conditions Symbol VDD HVDD VIH VIL Supply Voltage Supply Voltage High Level Input Voltage Low Level Input Voltage GAIN0, GAIN1, LDO_EN, AMP_EN, HP_EN GAIN0, GAIN1, LDO_EN, AMP_EN, HP_EN For Power Amplifier VIC ILDOUT TA TJ COUT RL RL Common Mode Input Voltage For Headphone Amplifier Output Current (LDOUT) Ambient Temperature Range Junction Temperature Range LDO Output Capacitor (MLCC type) Speaker Resistance Headphone Resistance HVSS ~ HVDD 0 ~ 200 -40 ~ 85 -40 ~ 125 1 ~ 100 4~ 16 ~ µF Ω mA ο Parameter Range 4.5 ~ 5.5 3.0 ~ 3.6 2 ~ VDD Unit V 0 ~ 0.5 0.5 ~ VDD-0.5 C C opyright © A NPEC Electronics Corp. Rev. A.3 - Aug., 2008 3 www.anpec.com.tw APA2058 Electrical Characteristics Refer to the typical application circuits. VDD=5V, HVDD=3.3V, Gnd=0V, TA=25 C (unless otherwise noted) Symbol IDD(HVDD) IDD(VDD) IAMP(HVDD) IAMP(VDD) IHP(HVDD) IHP(VDD) ILDO(HVDD) ILDO(VDD) ISD(HVDD) ISD(VDD) II Input Current Shutdown Current VHP_EN=VLDO_EN=0V LDO Supply Current V AMP_EN =VHP_EN=5V, Headphone Driver Supply Current VLDO_EN=0V V AMP_EN =VLDO_EN=5V, VHP_EN=0V V AMP EN =5V, Power Amplifier Supply Current Parameter Test Conditions Min. V AMP_EN =0V , Supply Current VHP_EN=VLDO_EN=5V V AMP_EN =VHP_EN=VLDO_EN=0V HVDD VDD HVDD VDD HVDD VDD HVDD VDD HVDD VDD APA2058 Typ. 2.5 9 0.1 4.5 2.5 6 0.1 0.4 Max. 4 15 0.2 7.5 4 10 0.2 0.65 2 5 1 µA mA Unit o GAIN0, GAIN1, LDO_EN, AMP_EN, HP_EN CB=0.47µF AV=10dB SPEAKER MODE, AV =10dB TSTART-UP Start-Up Time from Shutdown 17 9.5 11.5 15.1 21.1 25 76 60 40 20 10 12 15.6 21.6 5 1.9 1.3 2.4 1.5 0.07 0.05 -110 -110 -75 -65 100 100 22 10.5 12.5 16.1 22.1 20 W mV dB ms kΩ Ri Input Resistor AV=12dB AV=15.6dB AV=21.6dB VGAIN0=VGAIN1=0V. AV Closed-Loop Gain VGAIN0=0V, VGAIN1=VDD. VGAIN0=VDD, VGAIN1=0V. VGAIN0=VGAIN1=VDD. RL = 8Ω THD+N=1%, fin=1kHz RL=4Ω RL=8Ω THD+N=10%, fin= kHz RL=4Ω RL=8Ω fin=1kHz RL=4Ω ,PO=1.4W RL=8Ω, PO=0.9W fin=1kHz RL=4Ω, Po=200mW RL=8Ω, Po=130mW fin=217Hz, Vrr=0.2Vrms,RL=8Ω fin=1kHz, Vin=0.2Vrms.,RL=8Ω fin=20~20kHz With A-weighting Filter RL=4Ω, PO=1.4W, RL=8Ω, PO=0.9W, fin=20~20kHz,With A-weighting Filter RL=8Ω VOS Output Offset Voltage PO Output Power 1 - THD+N Crosstal k PSRR CMRR S/N Vn Total Harmonic Distortion Pulse Noise Channel Separation Power Supply Rejection Ratio Common Mode Rejection Ratio Signal-to-Noise Ratio Noise Output Voltage - - % - µVrms dB C opyright © A NPEC Electronics Corp. Rev. A.3 - Aug., 2008 4 www.anpec.com.tw APA2058 Electrical Characteristics (Cont.) Refer to the typical application circuits. VDD=5V, HVDD=3.3V, Gnd=0V, TA=25 C (unless otherwise noted) Symbol Parameter Test Conditions Min. HEADPHONE MODE, AV = -1.5V/V, CPF=CPO=1µF(X5R type) TSTART-UP Ri AV VOS Start-Up Time from shutdown Input Resistor Closed-Loop Gain Output Offset Voltage RL = 32Ω THD+N=1%, fin=1kHz RL=16Ω RL=32Ω THD+N=10%, fin=1kHz RL=16Ω RL=32Ω THD+N=1%, fin=1kHz RL=320Ω, RL=10kΩ, THD+N=10%, fin=1kHz RL=320Ω, RL=10kΩ, fin=1kHz RL=16Ω , PO=125mW RL=32Ω, PO=88mW RL=320Ω, VO=1.5V RL=10kΩ, VO=1.6V fin=1kHz RL=16Ω , PO=16mW RL=32Ω, PO=12mW RL=320Ω, VO=0.22V RL=10kΩ, VO=0.22V fin=217Hz,Vrr=0.2Vrms RL=32Ω, fin=20~20kHz, With A-weighting Filter RL=16Ω , PO=125mW RL=32Ω, PO=88mW RL=320Ω, VO=1.5V RL= 10kΩ, VO=1.6V fin=20~20kHz, With A-weighting Filter RL=32Ω CB=0.47µF 17 -1.45 10 20 -1.5 1 140 120 180 160 2.0 2.1 2.45 2.6 0. 03 0. 02 0. 005 0. 004 -82 -82 -77 -77 -80 99 100 100 100 15 -1.55 5 mW ms kΩ V/V mV APA2058 Typ. Max. Unit o PO Output Power 100 150 1.8 V - VO Output Swing Voltage - THD+N Total Harmonic Distortion Pulse Noise - - % Crosstalk Channel Separation - dB - PSRR Power Supply Rejection Ratio - S/N Signal-to-Noise Ratio - - Vn Noise Output Voltage - - µVrms LDO (LOW DROP-OUT REGULATOR) IO VO Output Current Output Voltage Line Regulation Load Regulation PSRR RDIS Power Supply Rejection Ratio Discharge Resistor IO=1mA IO=1mA, VDD=4.5V to 5.5V IO=1mA to 200mA IO=1mA,fin=120Hz,Vrr=0.2Vrms 3.2 3.3 1.5 0.03 -50 170 200 3.4 5 0.1 mA V mV mV/mA dB Ω CHARGE PUMP, CPF=CPO=1µF(X5R type) FOSC REQ CVss RDIS Oscillator Frequency Equivalent Resistance Negative Output Voltage Discharge Resistor 5 No load -5.1 - 450 10 -5 5 -4.9 - kHz Ω V kΩ C opyright © A NPEC Electronics Corp. Rev. A.3 - Aug., 2008 www.anpec.com.tw APA2058 Block Diagram LOUTP LINN_A LINP_A LOUTN GAIN1 GAIN0 Gain Control PVDD PGND ROUTN RINP_A RINN_A ROUTP LIN_H HP_LO + HVDD HVSS + HP_RO GND RIN_H VDD PVDD AMP_EN HP_EN LDO_EN Control LDO Charge Pump CPP CPN BIAS VDD LDOUT CVSS CGND C opyright © A NPEC Electronics Corp. Rev. A.3 - Aug., 2008 6 www.anpec.com.tw APA2058 Pin Description PIN NO. 1 2 3 4 5,21 6 7 8,18 9 10 11 12 13 14 15 16 17 19 20 22 23 24 25 26 27 28 29 30 31 32 NAME RINN_A RINP_A LINP_A LINN_A PGND LOUTP LOUTN PVDD NC CPP CGND CPN CVSS HVSS HP_RO HP_LO HVDD ROUTN ROUTP HP_EN AMP_EN BIAS LDO_EN RIN_H LIN_H GND LDOUT VDD GAIN0 GAIN1 I/O/P I I I I P O O P I/O P I/O O P O O P O O I I P I I I P O P I I FUNCTION The inverting input pin of right channel power amplifier. The non-inverting input pin of right channel power amplifier. The non-inverting input pin of left channel power amplifier. The inverting input pin of left channel power amplifier. Power amplifier’ ground s The positive output pin of left channel power amplifier. The negative output pin of left channel power amplifier. Power amplifier’ supply voltage pin. s No Connection. Charge pump flying capacitor positive connection. Charge pump’ ground. s Charge pump flying capacitor negative connection. Charge pump output pin, connect this pin to the “HVSS”. Headphone driver’ negative supply voltage pin. s The output pin of right channel headphone driver. The output pin of left channel headphone driver. Headphone driver’ positive supply voltage pin. s The negative output pin of right channel power amplifier. The positive output pin of right channel power amplifier. Headphone drivers enable input pin; High=Enable. Power amplifiers enable input pin; Low=Enable. Bias voltage for power amplifiers. LDO (Low Drop-Out Regulator) enables input pin; High=Enable. The input pin of right channel headphone driver. The input pin of left channel headphone driver. Control block’ ground, connect this pin to CGND and PGND. s LDO (Low Drop-Out Regulator)’ output pin. s Control block and LDO supply voltage pin. Control pin for internal gain setting, MSB, Bit 1. Control pin for internal gain setting, LSB, Bit 0. C opyright © A NPEC Electronics Corp. Rev. A.3 - Aug., 2008 7 www.anpec.com.tw APA2058 Typical Application Circuit Differential input mode VDD CS3 Gain Control (Amplifier) 1µF 29 LDOUT 32 GAIN1 31 GAIN0 CO2 CO1 Gnd 0.1µF 2.2µF 27 LIN_H 28 GND Regulator Output Ci5 1µF 26 RIN_H 25 LDO_EN Ci6 1µF 30 VDD Headphone Driver Input Signals Regulator Enable Right Channel Input Signal (Amplifier) Left Channel Input Signal (Amplifier) Ci1 RINN_A 0.47µF Ci2 RINP_A 0.47µF Ci3 LINP_A 0.47µF Ci4 LINN_A 0.47µF Gnd 1 2 3 4 24 BIAS CB Gnd Power Amplifier Enable Headphone Driver Enable Gnd 0.47µF 23 AMP_EN 22 HP_EN PGND 5 LOUTP 6 LOUTN 7 APA2058 21 PGND 20 ROUTP 19 ROUTN 18 PVDD 17 HVDD VDD HVDD CS5 0.1µF Gnd VDD PVDD 8 CS4 CGND 11 CVSS 13 HVSS 14 HP_RO 15 CPN 12 CPP 10 CS2 CS1 0.1µF 10µF CPF CPO 1µF VSS Gnd Tip Sleeve Ring Single-ended input mode VDD CS3 Gain Control (Amplifier) 1µF 29 LDOUT 31 GAIN0 Headphone Jack 1µF HP_LO 16 NC 9 2.2µF CO2 CO1 Gnd 0.1µF 2.2µF 28 GND 27 LIN_H Regulator Output Ci5 1µF 26 RIN_H 25 LDO_EN Ci6 1µF 32 GAIN1 30 VDD Headphone Driver Input Signals Regulator Enable Ci1 Right Channel GndC Input Signal i2 (Amplifier) Ci3 Left Channel Ci4 Input Signal (Amplifier) Gnd Gnd 0.47µF 0.47µF 0.47µF 0.47µF RINN_A 1 RINP_A 2 LINP_A 3 24 BIAS CB Gnd Power Amplifier Enable Headphone Driver Enable Gnd 0.47µF 23 AMP_EN 22 HP_EN LINN_A 4 PGND 5 LOUTP 6 LOUTN 7 APA2058 21 PGND 20 ROUTP 19 ROUTN 18 PVDD 17 HVDD VDD HVDD CS5 0.1µF Gnd VDD PVDD 8 CS4 CPP 10 CGND 11 CPN 12 CVSS 13 HVSS 14 HP_RO 15 HP_LO 16 CS2 CS1 0.1µF 10µF NC 9 2.2µF CPF CPO 1µF VSS Gnd Tip Sleeve C opyright © A NPEC Electronics Corp. Rev. A.3 - Aug., 2008 8 Headphone Jack Ring 1µF www.anpec.com.tw APA2058 Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) THD+N vs. Output Power 10 THD+N vs. Frequency 1 THD+N (%) THD+N (%) 1 RL=4Ω fin=1kHz Ci=0.47µF AV=10dB BW