APL3201
Li+ Battery Charger with Thermal Regulation
Features
• • • • • • • • • • •
Programmable Charge Current Up to 1A Charge Status Output Pins Soft-Start Limits Inrush Current 4.2V Charge Voltage with ±1% Accuracy Fixed 55mA Prequal Charge Current Thermal Limiting Simplifies Board Design External Thermistor Monitor Enable/Disable Control 3mm x 3mm DFN-10 Package (DFN3x3-10) Disable Charging When VIN > 6.4V Lead Free and Green Devices Available (RoHS Compliant)
General Description
The APL3201 is a constant-current/constant-voltage linear charger for single cell Li+ batteries. The APL3201 needs no external MOSFET or diodes, and accepts input voltage up to 6.0V. The small packages and low external component count make the APL3201 ideally suited for portable applications. On-chip thermal limiting simplifies PC board layout and allows optimum charging rate without the thermal limits imposed by worst-case battery and input voltage. When the APL3201 thermal limit is reached, the charger does not shut down but simply reduces charging current. Ambient or battery temperature can be monitored with an external thermistor. When the temperature is out of range, charging pauses. Other features include the STAT1 and 2 outputs to indicate four charge states, and the EN input, switches the APL3201 on or off. The APL3201 is available in 3mmx3mm DFN-10 package, and operates over the -40°C to +85°C temperature range.
Applications
• • • •
PDAs MP3 Players Cell Phones Wireless Appliances
Simplified Application Circuit
LI+ CELL
Pin Configuration
VIN STAT1 ISET GND EN 1 2 3 4 5 10 BATT 9 BYP 8 STAT2 7 REF 6 THRM
INPUT Voltage
VIN
BATT
STAT1 STAT2
BYP
REF EN ISET GND THRM NTC THERMISTOR
EP (Bottom)
DFN3x3-10 (Top View)
Note : EP should be connected to GND plane for better heat dissipation
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright © ANPEC Electronics Corp. Rev. A.4 - Mar., 2009 1 www.anpec.com.tw
APL3201
Ordering and Marking Information
APL3201 Assembly Material Handling Code Temperature Range Package Code APL 3201 XXXXX Package Code QA : DFN3x3-10 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device XXXXX - Date Code
APL3201 QA:
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight).
Absolute Maximum Ratings
Symbol VIN VEN, VBATT, VTHRM ICHG TJ TSTG TL VIN to GND
(Note 1)
Rating -0.3 to 7 -0.3 to 7 1.2 150 -65 to 150 260 Unit V V A °C °C °C
Parameter
EN, STAT1, STAT2, BATT, THRM to GND Charging Current Maximum Junction Temperature Storage Temperature Range Maximum Lead Soldering Temperature, 10 Seconds
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol θJA Parameter Junction To Air Thermal Resistance (Note 2) DFN3x3-10 Typical Value 50 Unit °C/W
Note 2 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. The exposed pad of DFN-10 is soldered directly on the PCB.
Recommended Operating Conditions
Symbol VIN ICHG TJ TA VIN To GND Charging Current Junction Temperature Ambient Temperature Parameter Range 4.35 to 6.0 0.1 to 1 -40 to 125 -40 to 85 Unit V A °C °C
C opyright © A NPEC Electronics Corp. Rev. A.4 - Mar., 2009
2
www.anpec.com.tw
APL3201
Electrical Characteristics
Refer to the typical application circuit. These specifications apply over VIN=5V, VBATT=4.2V, VTHRM=VREF/2, TJ= -40~125°C, TA= -40~85°C, unless otherwise specified. Typical values are at TA=25°C. Symbol SUPPLY CURRENT IIN VIN Supply Current VEN = 0V VEN = 5V, ICHG=0A VIN Rising 3.90 0.15 TA=25°C, VIN=4.35~6.0V TA =-40~85°C (TJ=-40~125°C) -0.5 -1 2.8 IREF=0~500µA, TJ=-40~125°C, VIN=4.35V~6.0V REF=GND ICHG=KSET x VSET / RSET, Without thermal regulation Without thermal regulation TJ=-40~125°C, VIN=4.35~6.0V ISET=GND 0.1A≤ICHG≤1A VBATT6.4V When input voltage is over 6.4V overvoltage threshold, the charging of APL3201 will be turned off. The charging will be turned on until the input voltage is below the OVP threshold. The absolute maximum rating of input voltage is 7V. If the input voltage is over 7V the IC may be damaged.
Soft-Start The APL3201 includes a soft-start function to control the rise rate of the charging current rising from zero to the fast-charging current level in constant current mode. During charger soft-start, the APL3201 ramps up the voltage on ISET pin with constant well-controlled slew rate. The charging current is proportional to the ISET voltage. The soft-start interval is 7ms (typical), which is independent of the fast-charging current level.
ICHG 4.2V VBATT
3.0V Charge Done
Full Charge Precharge Constant Current Mode Voltage Mode
Figure 2. Typical Charging Profile
C opyright © A NPEC Electronics Corp. Rev. A.4 - Mar., 2009
10
www.anpec.com.tw
APL3201
Applicaiton Information
STAT Pins The STAT1 and STAT2 outputs indicate four charger operations. These two pins can be used to drive LEDs or communicate to the host processor. When status pins are monitored by a processor, there should be a 10kΩ pull-up resistor to connect each status pin and the VCC of the processor; furthermore, when the status is viewed by the LED, the LED with a current rating is less than 10mA and a resistor should be selected to connect the LED in series, so the current will be limited to the desired current value. The resistor is calculated by the following equation:
R2,3 = ( VIN − VLED _ ON) PD
where: TJ=device junction temperature TA= ambient temperature PD=device power dissipation The device power dissipation, PD, is the function of the charge rate and the voltage drop across the internal FET. It can be calculated by the following equation:
PD = (VIN − VBATT ) × ICHG
PCB Layout Consideration The APL3201 is packaged in a thermally enhanced QFN package. The package includes a thermal pad to provide an effective thermal contact between the device and the printed circuit board. Connecting the exposed pad to a large copper ground plane on the backside of the circuit board through several thermal vias for heatsinking is recommended. Connecting the battery to BATT as close to the device as possible provides accurate battery voltage sensing. All decoupling capacitors and filter capacitors should be placed as close as possible to the device. The high-current charge path into VIN and from the BATT pin must be short and wide to minimize voltage drops.
In other words, the LED and resistor between the input and each status pin shoule be in series. Capacitor Selection Typically, a 4.7µF ceramic capacitor is used to connect from VIN to GND. For high charging current, it is recommended to use a larger input bypass capacitance to reduce supply noise. There is a ceramic capacitor connecting from BATT to GND for proper stability. To work well with most application, at least a 2.2µF X5R ceramic capacitor is required. Thermal Consideration The APL3201 is available in a thermally enhanced QFN package with an exposed pad. It is recommended to connect the exposed pad to a large copper ground plane on the backside of the circuit board through several thermal vias for heatsinking. The exposed pad transfers heat away from the device, allowing the APL3201 to charge the battery with maximum current while minimizing the increase in die temperature. The most common measure of package thermal performance is thermal resistance measured from the device junction to the air surrounding the package surface (θJA). The θJA can be calculated by the following equation: θJA = TJ − TA PD
C opyright © A NPEC Electronics Corp. Rev. A.4 - Mar., 2009
11
www.anpec.com.tw
APL3201
Package Information
DFN3x3-10
D A
Pin 1
E
D2
A3
Pin 1 Corner E2
e S Y M B O L A A1 A3 b D D2 E E2 e L K 0.30 0.20 0.18 2.90 2.20 2.90 1.40 0.50 BSC 0.50 0.012 0.008 DFN3x3-10 MILLIMETERS MIN. 0.80 0.00 0.20 REF 0.30 3.10 2.70 3.10 1.75 0.007 0.114 0.087 0.114 0.055 0.020 BSC 0.020 MAX. 1.00 0.05 MIN. 0.031 0.000 0.008 REF 0.012 0.122 0.106 0.122 0.069 INCHES MAX. 0.039 0.002
Note : 1. Followed from JEDEC MO-229 VEED-5.
C opyright © A NPEC Electronics Corp. Rev. A.4 - Mar., 2009
12
L
b A1
www.anpec.com.tw
APL3201
Carrier Tape & Reel Dimensions
OD0 P0 P2 P1 A E1 F K0 B SECTION A-A T B0 A0 OD1 B A SECTION B-B
d
Application
A 178.0± 2.00
H 50 MIN. P1 8.0± 0.10
H A
T1
T1 12.4+2.00 -0.00 P2 2.0± 0.05
C 13.0+0.50 -0.20 D0 1.5+0.10 -0.00
d 1.5 MIN. D1 1.5 MIN.
D 20.2 MIN. T 0.6+0.00 -0.40
W 12.0± 0.30 A0 3.30± 0.20
E1 1.75± 0.10 B0 3.30± 0.20
W
F 5.5± 0.05 K0 1.30± 0.20 (mm)
DFN3x3-10
P0 4.0± 0.10
Devices Per Unit
Package Type DFN3x3-10 Unit Tape & Reel Quantity 3000
C opyright © A NPEC Electronics Corp. Rev. A.4 - Mar., 2009
13
www.anpec.com.tw
APL3201
Taping Direction Information
DFN3x3-10
USER DIRECTION OF FEED
Classification Profile
C opyright © A NPEC Electronics Corp. Rev. A.4 - Mar., 2009
14
www.anpec.com.tw
APL3201
Classification Reflow Profiles
Profile Feature Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time (tP)** within 5°C of the specified classification temperature (Tc) Average ramp-down rate (Tp to Tsmax) Time 25°C to peak temperature Sn-Pb Eutectic Assembly 100 °C 150 °C 60-120 seconds 3 °C/second max. 183 °C 60-150 seconds See Classification Temp in table 1 20** seconds 6 °C/second max. 6 minutes max. Pb-Free Assembly 150 °C 200 °C 60-120 seconds 3°C/second max. 217 °C 60-150 seconds See Classification Temp in table 2 30** seconds 6 °C/second max. 8 minutes max.
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package Thickness