APL431L
Low Voltage Adjustable Precision Shunt Regulator
Features
• • • • • • • • •
Precise Reference Voltage to 1.24V Guaranteed 0.5% or 1% Reference Voltage Tolerance Sink Current Capability, 80uA to 100mA Quick Turn-on Adjustable Output Voltage, VO = VREF to 20V Low Operational Cathode Current, 80µA Typical 0.1Ω Typical Output Impedance SOT-23-3, SOT-23-5, TO-92 and SOT-89 Packages Lead Free Available (RoHS Compliant)
General Description
The APL431L is a 3-terminal low voltage adjustable precision reference with specified thermal stability over applicable commercial temperature ranges. Output voltage may be set to any value between Vref (1. 24 V) and 20 V with two external resistors (see Figure 2). When used with an photocoupler, the APL431L is an ideal voltage reference in isolated feedback circuits for 3V to 12V switching-mode power supplies. This device has a typical output impedance of 0.1Ω. Active output circuitry provides a very sharp turn-on characteristic, making the APL431L excellent replacements for zener diodes in many applications, including on-board regulation and adjustable power supplies.
ANODE
NC NC
3 1 2
5 1 2
4 3
Applications
• • •
Linear Regulators
REF CATHODE
REF ANO DE CATHO DE
SOT-23-3 (Top View)
3 C ATHO D E
SOT-23-5 (Top View)
Adjustable Power Supply
2 AN OD E
Switching Power Supply
1 R EF
1
2
3
REF
ANODE CATHODE
Symbol
REF Anode Cathode
TO-92 (Top View)
SOT-89 (Top View)
Functional Diagram
C athode
REF
+ _
V ref
Anode
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 1 www.anpec.com.tw
APL431L
Ordering and Marking Information
A P L 43 1 L
Le ad F re e C ode H and ling C od e T e m p. R a nge P ac k a ge C od e E le c . G rad e E le c . G rad e A : 0 .5 % R e fe re nc e V oltage T oleran c e B : 1 % R efe re nce V oltage T oleranc e P ac k a ge C od e A : S O T -23 -3 B : S O T -23 -5 D : S O T -89 E : T O -9 2 Y :C hip F orm T e m p. R a nge C : 0 to 70 ° C I : -40 to 85 ° C H and ling C od e P B : P las tic B a g T B : T ape & B o x T R : T a pe & R ee l Le ad F re e C ode L : L e a d F re e D e vic e B la n k : O rig in a l D evic e A P L 431 L E : APL 43 1L X XX XX
A P L 431 L A /B :
43 1L
X XX XX - D ate C od e
A P L 431 L D :
A P L 431 L X XX XX
X XX XX
- D a te C od e
Notes: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte in plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature.
Absolute Maximum Ratings
Symbol VKA IK IREF θJA Parameter Cathode voltage Continuous cathode current range Reference current range Thermal Resistance from Junction to Ambient in Free Air SOT-23-3 SOT-23-5 SOT-89 TO-92 Operating Junction Temperature Range Storage Temperature Range Lead temperature range, Ts (Soldering, 10sec) Rating 20 100 3 416 357 250 250 -40 to 150 -65 to 150 260 Unit V mA mA °C/W
TJ TSTG TSOL
°C °C °C
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APL431L
Electrical Characteristics
Symbol Parameter
TA= 25°C ( unless otherwise noted)
Test Conditions Unit
VREF
Reference voltage
VDEF
VDEF Temp Deviation
APL431L Min. Typ. Max. APL431LA 1.234 1.240 1.246 VKA=VREF, IK=10mA TA =25°C, (Fig. 1) APL431LB 1.228 1.240 1.252 APL431LA 1.222 1.240 1.258 TA =full range(see Note1), (Fig.1) APL431LB 1.215 1.240 1.265 TA =full range (see Note1) 5 15 VKA=VREF, IK=10mA (Fig. 1) -0.2 0.15 0.05 0.01 0.01 0.1 80 -1.0 0.5 0.3 0.1 0.5 0.4 100
V
mV
Ratio of Change in VREF IK=10mA, VKA=16V to VREF (Fig. ∆VREF / ∆VKA to Change in Cathods 2) Votage IREF Reference Input Current IK=10mA,R1 =10kΩ,R2 =∞ (Fig. 2) TK=full range (see Note 1), IREF(DEV) IREF Temp Deviation R1=10kΩ, R2=∞, IK=10mA, (Fig. 2) VK=6V IK(off) off-state cathode current VREF=0V, (Fig. 3) VK=16V VKA=VREF , IK=1mA to 100mA, Dynamic Output ZKA Impedance f ≤1kHz (Fig. 1) Minimum Operating IK(MIN) VKA=VREF (Fig. 1) Current
mV/V µA µA µA Ω µA
Notes : 1.Full temperature range is 0°C to 70°C for APL431LXXC,and -40°C to 85°C for APL431LXXl.
Test Figures
VIN IK VREF
Vo
VIN IK(off)
Vo
Figure 1. Test Circuit for VKA=VREF , VO=VKA=VREF
Figure 3. Test Circuit for IK(off)
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Figure 2. Test Circuit for V >V
,
APL431L
Test Figures (Cont.)
VIN IK R1 IREF VREF
VREF R2 0.1 µ F
Application Schematic
Vo
Precision Voltage Reference
V IN RB Vo
R1
R2
Figure 2. Test Circuit for VKA>VREF, VO= VKA= VREF× (1+R1/R2) + IREF × R1 Precision High-Current Series Regulator
V IN RB R1 V R EF 0.1 µ F R2 Vo
Notes for Application Circuits: 1) To improve the stability of output voltage, a 0.1µF capacitor between cathode and anode of APL431L is strongly recommended. 2)Set VOUT according to the following equation: VOUT = VREF(1+R1/R2)+lREF R1 3)Choose the value for RB as follows: A)The maximum limit for RB should be such that the cathode current(lK) is greater than the mini mum operating current (80µA) at VIN(MIN). B)The minimum limit for RB should be such that the cathode current (lK) does not exceed 100mA under all load conditions, and the instantaneous turnon value for lk does not exceed 150mA. Both of the following conditions must. be met: VIN(MAX) RB,Min≥ 150mA (to limit instantaneous turn-on lK) RB,Min≥ VIN(MAX)-VOUT lOUT(MIN)+100mA (to limit lK under normal operating conditions)
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APL431L
Typical Characteristics
Cathode Current vs. Cathode Voltage
250 200 100
Cathode Current vs. Cathode Voltage
VKA=VREF TA=25°C
VKA=VREF TA=25°C
Cathode Current (µA)
Cathode Current (mA)
-1 -0.5 0 0.5 1 1.5
150 100 50 0 -50 -100 -150 -200 -250
50
0
-50
-100 -1.5
-1
-0.5
0
0.5
1
1.5
Cathode Voltage (V)
Cathode Voltage (V)
Referemce Voltage vs. Junction Temperature
1.26
0.18
Reference Input Current vs. Junction Temperature
Reference Input Current (µA)
R1=10kΩ, R2=∞ IKA=10mA
IKA=10mA
Reference Voltage (V)
0.16
1.25
0.14
1.24
0.12
1.23
0.10
1.22 -50 -25 0 25 50 75 100 125 150
0.08 -50 -25 0 25 50 75 100 125 150
Junction Temperature (°C)
Junction Temperature (°C)
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APL431L
Typical Characteristics
Off State Cathode Current vs. Junction Temperature
0.5
∆VREF/∆VKA vs. Junction Temperature
0
Ratio of Delta Reference Voltage to Delta Cathode Voltage (-mV/V)
-0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 -50 -25 0 25 50
∆VKA=VREF to 20V
IKA=10mA
Off State Cathode Current (µA)
VREF =0V VKA =16V
0.4
0.3
0.2
0.1
VKA =6V
0 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Junction Temperature (°C)
Junction Temperature (°C)
IKA =1mA
3V
TA =25°C Input
IKA =0.1mA
3V
Input
TA =25°C
0 1V
0
Output
1V
Output
0 0µS 5 µS
0 0 µS 5µS
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APL431L
Typical Characteristics
Gain vs. Phase Shift vs. Frequency
60 0
Zka vs. Frequency
100
50 40
IKA=10mA TA =25°C
50 100 150 200 250 300 350
Phase Shift (degree)
10
IKA=10mA VKA=VREF TA =25°C
Gain (dB)
30
Zka (Ω)
1
20
10 0
0.1
-10 10 100 1000 10000 100000
0.01 10 100 1000 10000 100000 1000000
1000000
Frequency (Hz)
Frequency (Hz)
Stability Boundary Conditions
100 90 80 70
Unstable
VKA =VREF VKA =2.5V VKA =3.3V
TA =25°C
Ik (mA)
60 50 40 30 20 10 0 0.0001
Stable
0.001
0.01
0.1
1
Load Capacitance (µF)
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APL431L
Package Information
SOT-23
D B
3 E 1 2 H
e
A
A1
L
C
D im A A1 B C D E e H L
M illim e t e rs M in . 1 .0 0 0 .0 0 0 .3 5 0 .1 0 2 .7 0 1 .4 0 1 .9 0 /2 .1 B S C 2 .4 0 0 .3 7 3 .0 0 0 .0 9 4 0 .0 1 5 M ax. 1 .3 0 0 .1 0 0 .5 1 0 .2 5 3 .1 0 1 .8 0 M in . 0 .0 3 9 0 .0 0 0 0 .0 1 4 0 .0 0 4 0 .1 0 6 0 .0 5 5
In c h e s M ax. 0 .0 5 1 0 .0 0 4 0 .0 2 0 0 .0 1 0 0 .1 2 2 0 .0 7 1 0 .0 7 5 /0 .0 8 3 B S C 0 .11 8
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APL431L
Package Information
SOT-23-5
e1
5
4 E1 E
1
2
3
e
b
D
A2
A
a
L1
A1
L2
L
D im A A1 A2 b D E E1 e e1 L L1 L2 N α
M illimeters M in. 0 .95 0.05 0.90 0 .30 2 .8 2 .6 1.5 0 .95BSC 1.90BSC 0 .35 0.20 BSC 0.5 5 0° 10° 0° 0.7 0.020 0.55 0.014 M ax. 1.45 0.15 1.30 0.50 3.00 3.00 1.70 M in. 0.037 0.002 0.035 0.011 0.110 0.102 0.059
Inches M ax. 0.057 0.006 0.051 0.019 0.118 0.118 0.067 0.037BSC 0.074BSC 0.022 0.008 BSC 0.028 5 10°
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APL431L
Package Information
TO-92
3 J e e1 2 1 L1 Q E S D
b2
b S
A
L SEATING PLANE
Dim A φb φ b2 φD E e e1 J L L1 Q S
Millimeters Min. Max. 4.318 5.334 0.406 0.406 4.445 3.175 2.413 1.143 3.429 12.70 1.27 2.921 2.032 2.667 0.559 0.559 5.207 4.191 2.667 1.397
Inches Min. 0.170 0.016 0.016 0.175 0.125 0.095 0.045 0.135 0.500 0.050 0 . 115 0.080 0.105 Max. 0.210 0.022 0.022 0.205 0.165 0.105 0.055
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APL431L
Package Information
SOT-89 (Reference EIAJ ED-7500A Reg stration SC-62)
D
D1
a E H 1 2 3
L B1 B e e1 C
A a
D im A B B1 C D D1 e e1 E H L α
M illim eters M in. 1.40 0.40 0.35 0.35 4.40 1.35 1.50 B SC 3.00 B SC 2.29 3.75 0.80 2.60 4.25 1.20 10 ° 0.090 0.148 0.031 M ax. 1.60 0.56 0.48 0.44 4.60 1.83 M in. 0.055 0.016 0.014 0.014 0.173 0.053
Inches M ax. 0.063 0.022 0.019 0.017 0.181 0.072 0.059 BSC 0.118 B SC 0.102 0.167 0.047 10 °
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APL431L
Physical Specifications
Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
TP
(IR/Convection or VPR Reflow)
tp Critical Zone T L to T P
Ram p-up
Temperature
TL Tsm ax
tL
Tsm in Ram p-down ts Preheat
25
t 25 °C to Peak
Tim e
Classificatin Reflow Profiles
Profile Feature Sn-Pb Eutectic Assembly Large Body Small Body Pb-Free Assembly Large Body Small Body 3°C/second max. 150°C 200°C 60-180 seconds 3°C/second max 217°C 60-150 seconds 245 +0/-5°C 250 +0/-5°C 10-30 seconds 20-40 seconds 6°C/second max. 8 minutes max.
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Average ramp-up rate 3°C/second max. (TL to TP) Preheat - Temperature Min (Tsmin) 100°C - Temperature Mix (Tsmax) 150°C - Time (min to max)(ts) 60-120 seconds Tsmax to TL - Ramp-up Rate Tsmax to TL - Temperature(TL) 183°C - Time (tL) 60-150 seconds Peak Temperature(Tp) 225 +0/-5°C 240 +0/-5°C Time within 5°C of actual Peak 10-30 seconds 10-30 seconds Temperature(tp) Ramp-down Rate 6°C/second max. 6 minutes max. Time 25°C to Peak Temperature
Copyright ANPEC Electronics Corp. Rev. B.8 - Mar., 2005 12
Note: All temperatures refer to topside of the package. Measured on the body surface.
APL431L
Reliability Test Program
Test item S OLDERABILITY H OLT P CT T ST E SD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245 °C, 5 SEC 1000 Hrs Bias @125°C 168 Hrs, 100% RH, 121°C -65 °C~150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA
Carrier Tape & Reel Dimensions
t P P1 D
Po E
F W
Bo
Ao
Ko D1
T2
J C A B
T1
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APL431L
Carrier Tape & Reel Dimensions
Application A 178 ±1 SOT-89 F B 70 ± 2 D C 13.5 ± 0.15 D1 1.5± 0.1 C 12.0 D1 φ0.1MIN C J 3 ± 0.15 Po 4.0 ± 0.1 J T1 14 ± 2 P1 2.0 ± 0.1 T1 T2 1.3 ± 0.3 Ao 4.8 ± 0.1 T2 1.4 Ao 3.1 T2 1.5 ± 0.3 Ao W 12 + 0.3 12 - 0.1 Bo 4.5± 0.1 W 8.0+ 0.3 - 0.3 Bo 3.0 W 8.0 ± 0.3 Bo P 8 ± 0.1 Ko E 1.75± 0.1 t
5.5 ± 0.05 1.5± 0.1 Application A 178±1 SOT-23 F B 60 ± 1.0 D
1.80± 0.1 0.3±0.013 P 4.0 Ko 1.3 P 4 ± 0.1 Ko E 1.75 t 0.2±0.03 E 1.75± 0.1 t
2.5 ± 0.15 9.0 ± 0.5 Po 4.0 J P1 2.0 ± 0.05 T1 8.4 ± 2 P1
3.5 ± 0.05 1.5 +0.1 Application A 178 ±1 SOT-23-5 F B
72 ± 1.0 13.0 + 0.2 2.5 ± 0.15 D D1 1.5± 0.1 Po 4.0 ± 0.1
3.5 ± 0.05 1.5± 0.1
2.0 ± 0.1 3.15 ± 0.1 3.2± 0.1
1.4± 0.1 0.2±0.033
Carrier Tape & Reel Dimensions
H2 H2 H2A H2 D2
A
W2 L L1
H3 H4 H W1 H1 W
D T2 T T1 F1F2 P1 P P2 D1
Application
A 3.18~12 H3
D 4.0±0.2 H4
D1
D2
0.36~0.53 9.0 MAX L L1 2.5 MIN W2 0.5 MAX
F1,F2 2.5+0.2 -0.1 P 12.7±0.2
H 16±0.5 P1 6.35±0.4
H1 9±0.5 P2
H2 0.5 MAX T
H2A 0.5 MAX T1
TO-92
27.0 MAX 20.0 MAX 11.0 MAX T2 W W1 5.0~7.0
50.8±0.5 0.55 MAX 1.42 MAX
0.36~0.68 17.5~19
(mm)
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APL431L
Cover Tape Dimensions
Application SOT- 23 SOT-23-5 SOT- 89 TO-92 Carrier Width 8 8 12 17.5~19 Cover Tape Width 5.3 5.3 9.3 5.0~7.0 Devices Per Reel 3000 3000 1000 2000
Customer Service
Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369
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