APL5915
0.8V Reference Ultra Low Dropout (0.2V@1.5A) Linear Regulator
Features
General Description
•
The APL5915 is a 1.5A ultra low dropout linear regulator.
This product is specifically designed to provide well sup-
Ultra Low Dropout
- 0.2V(typical) at 1.5A Output Current
•
ply volatage for motherboards NB and VGA card
applications. The IC needs two supply voltages, a control
Low ESR Output Capacitor (Multi-layer Chip
Capacitors (MLCC)) Applicable
•
0.8V Reference Voltage
•
High Output Accuracy
voltage for the circuitry and a main supply voltage for
power conversion, to reduce power dissipation and provide extremely low dropout.
The APL5915 integrates many functions into a single
- ±1.5% over Line, Load, and Temperature
•
Fast Transient Response
•
Adjustable Output Voltage by External Resistors
•
Power-On-Reset Monitoring on both VCNTL and
package. A Power-On-Reset (POR) circuit monitors both
supply voltages to prevent wrong operations. Thermal
shutdown and current limit functions protect the device
against thermal and current over-loads. POK indicates
VIN Pins
•
Internal Soft-Start
•
Current-Limit Protection
•
Under-Voltage Protection
•
Thermal Shutdown with Hysteresis
•
Power-OK Output with a Delay Time
•
Shutdown for Standby or Suspend Mode
•
Simple SOP-8P Package with Exposed Pad
•
Lead Free and Green Devices Available
the output status with time delay which is set internally. It
can control other converter for power sequence. The
APL5915 is enabled by other power system. Pulling and
holding the EN pin below 0.3V to shuts off the output.
The APL5915 is available in SOP-8P package which features small size as SOP-8 and an Exposed Pad to reduce
the junction-to-case resistance, being applicable in 1~2W
applications.
(RoHS Compliant)
Pin Configuration
Applications
•
GND
FB
VOUT
VOUT
Note Book PC Applications
•
Motherboard Applications
•
VGA Card Applications
1
8
2
7
3
4
VIN
6
5
EN
POK
VCNTL
VIN
SOP-8P
(Top View)
= Exposed Pad
(connected to VIN plane for better heat dissipation)
Copyright ANPEC Electronics Corp.
Rev. A.4 - Jan., 2010
1
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APL5915
Ordering and Marking Information
Package Code
KA : SOP-8P
Operating Ambient Temperature Range
I : -40 to 85 oC
Handing Code
TR : Tape & Reel
Assembly Material
L : Lead Free Device
G : Halogen and Lead Free Device
APL5915
Assembly Material
Handling Code
Temperature Range
Package Code
APL5915
XXXXX
APL5915 KA:
XXXXX - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings
Symbol
VCNTL
Parameter
VCNTL Supply Voltage (VCNTL to GND)
VIN
VIN Supply Voltage (VIN to GND)
VI/O
EN and FB to GND
VPOK
POK to GND
PD
Power Dissipation
Rating
Unit
-0.3 ~ 7
V
-0.3 ~ 3.9
V
-0.3 ~ VCNTL+0.3
V
-0.3 ~ 7
V
2.8
W
TJ
Junction Temperature
150
o
TSTG
Storage Temperature
-65 ~ 150
o
260
o
TSDR
Maximum Lead Soldering Temperature, 10 Seconds
C
C
C
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol
θJA
θJC
Parameter
Typical Value
Junction-to-Ambient Thermal Resistance in Free Air
(Note 2)
SOP-8P
Junction-to-Case Thermal Resistance (Note 3)
SOP-8P
Unit
44
o
19
o
C/W
C/W
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. The exposed pad
of SOP-8P is soldered directly on the PCB.
Note 3: The “Thermal Pad Temperature” is measured on the PCB copper area connected to the thermal pad of package.
1
2
3
4
8
VIN
7
6
5
Measured Point
PCB Copper
Copyright ANPEC Electronics Corp.
Rev. A.4 - Jan., 2010
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APL5915
Recommended Operating Conditions
Symbol
VCNTL
Parameter
Range
Unit
3.1 ~ 6
V
1.1 ~ 3.5
V
0.8 ~ 1.2
0.8 ~ VIN-0.2
V
VCNTL Supply Voltage
VIN
VIN Supply Voltage
Output Voltage
VOUT
VCNTL=3.3±5%
VCNTL=5.0±5%
IOUT
VOUT Output Current
TJ
0 ~ 1.5
Junction Temperature
A
o
-40 ~ 125
C
Electrical Characteristics
Refer to the typical application circuit. These specifications apply over, VCNTL = 5V, VIN = 1.5V, VOUT = 1.2V and TA = -40
to 85°C, unless otherwise specified. Typical values refer to TA = 25°C.
Symbol
Parameter
APL5915
Test Conditions
Unit
Min.
Typ.
Max.
0.4
1
2
mA
-
180
380
µA
2.7
2.9
3.1
V
-
0.4
-
V
0.8
0.9
1.0
V
-
0.5
-
V
-
0.8
-
V
SUPPLY CURRENT
ICNTL
ISD
VCNTL Supply Current
EN = VCNTL, VFB is well regulated
VCNTL Shutdown Current
EN = GND
POWER-ON-RESET
VCNTL POR Threshold
VCNTL Rising
VCNTL POR Hysteresis
VIN POR Threshold
VIN Rising
VIN POR Hysteresis
OUTPUT VOLTAGE
VREF
Reference Voltage
FB =VOUT
o
Output Voltage Accuracy
IOUT=0A ~1.5A, TJ= -40~125 C
-1.5
-
+1.5
%
Line Regulation
VCNTL=3.3 ~ 5.5V
-0.13
-
0.13
%/V
Load Regulation
IOUT=0A ~1.5A
-
0.06
0.15
%
VOUT = 1.2V
-
0.12
0.18
VOUT = 2.5V
-
0.17
0.23
VOUT = 1.2V
-
-
0.25
VOUT = 2.5V
-
-
0.3
VCNTL=5V, TJ= 25oC
2.1
2.8
3.5
VCNTL=5V, TJ= -40 ~ 125oC
1.8
-
-
DROPOUT VOLTAGE
Dropout Voltage
IOUT = 1.5A,
VCNTL=5V,
TJ= 25oC
IOUT = 1.5A,
VCNTL=5V,
TJ= -40~125oC
V
V
PROTECTION
ILIM
TSD
Current Limit
Thermal Shutdown Temperature
TJ Rising
-
Thermal Shutdown Hysteresis
Under-Voltage Threshold
Copyright ANPEC Electronics Corp.
Rev. A.4 - Jan., 2010
VFB Falling
3
150
A
A
-
o
o
-
50
-
-
0.4
-
C
C
V
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APL5915
Electrical Characteristics (Cont.)
Refer to the typical application circuit. These specifications apply over, VCNTL = 5V, VIN = 1.5V, VOUT = 1.2V and TA = -40
to 85°C, unless otherwise specified. Typical values refer to TA = 25°C.
Symbol
Parameter
Test Conditions
APL5915
Unit
Min.
Typ.
Max.
0.3
0.4
0.5
V
-
30
-
mV
-
10
-
µA
-
2
-
ms
ENABLE AND SOFT-START
EN Logic High Threshold Voltage
VEN Rising
EN Hysteresis
EN Pin Pull-Up Current
TSS
EN=GND
Soft-Start Interval
POWER OK AND DELAY
VPOK
POK Threshold Voltage for Power
OK
VFB Rising
90%
92%
94%
VREF
VPNOK
POK Threshold Voltage for Power
Not OK
VFB Falling
79%
81%
83%
VREF
POK Low Voltage
POK sinks 5mA
-
0.25
0.4
V
1
3
10
ms
TDELAY
POK Delay Time
Copyright ANPEC Electronics Corp.
Rev. A.4 - Jan., 2010
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APL5915
Typical Operating Characteristics
VCNTL Supply Current vs. Junction
Temperature
Current-Limit vs. Junction Temperature
2.9
VCNTL=5V
0.9
0.8
VCNTL=5V
2.8
Current-limit, ILIM (A)
VCNTL Supply Current, ICNTL (mA)
1.0
0.7
0.6
VCNTL=3.3V
0.5
0.4
0.3
0.2
2.7
VCNTL=3.3V
2.6
2.5
0.1
0.0
-50
-25
0
25
50
75
100
Junction Temperature (°C)
2.4
-50
125
4.5
0.806
4.3
125
4.1
0.804
0.802
0.800
0.798
0.796
VCNTL=5V
3.9
3.7
3.5
3.3
VCNTL=3.3V
3.1
2.9
0.794
2.7
0.792
-50
-25
0
25
50
75
100
Junction Temperature (°C)
2.5
-50
125
-25
VCNTL PSRR vs. Frequency
125
0
VCNTL=5V
VCNTL=5V
-10 V
=200mV
IN PK-PK
-10 VCNTLPK-PK=200mV
VIN=1.5V
IOUT=1A
-20 V =1.2V
OUT
-20 IOUT=1A
VOUT=1.2V
COUT=22µF
VIN PSRR (dB)
-30
0
25
50
75
100
Junction Temperature (°C)
VIN PSRR vs. Frequency
0
VCNTL PSRR (dB)
0
25
50
75 100
Junction Temperature (°C)
POK Delay Time vs. Junction Temperature
0.808
POK Delay Time (ms)
Reference Voltage, VREF (mV)
Reference Voltage vs. Junction
Temperature
-25
-40
-50
-60
COUT=22µF
VIN=1.5V
-40
-50
VIN=1.8V
-60
VIN=1.6V
-70
-70
-80
100
-30
-80
1000
10000
100000
Frequency (Hz)
Copyright ANPEC Electronics Corp.
Rev. A.4 - Jan., 2010
-90
100
1000000
5
1000
10000
100000
Frequency (Hz)
1000000
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APL5915
Typical Operating Characteristics (Cont.)
VIN Dropout Voltage vs. Output Current
VIN Dropout Voltage vs. Output Current
200
VCNTL=5V
VOUT=2.5V
250
TJ=25oC
VIN Dropout Voltage (mV)
VIN Dropout Voltage (mV)
300
200
TJ=75oC
150
TJ=125oC
TJ=0oC
100
TJ=-25oC
50
0
VCNTL=5V
VOUT=1.8V
TJ=25oC
150
TJ=75oC
100
TJ=125oC
TJ=0oC
50
TJ=-25oC
0
0.5
1
Output Current, lOUT (A)
0
1.5
0
0.5
1
Output Current, lOUT (A)
1.5
VIN Dropout Voltage vs. Output Current
200
VIN Dropout Voltage (mV)
VCNTL=5V
VOUT=1.2V
TJ=25oC
150
TJ=75oC
100
TJ=125oC
TJ=0 oC
50
0
TJ=-25oC
0
0.5
1
1.5
Output Current, lOUT (A)
Copyright ANPEC Electronics Corp.
Rev. A.4 - Jan., 2010
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APL5915
Operating Waveforms
1. Load Transient Response :
1.1 Using an Output Capacitor with ESR≥18mΩ
- COUT=150µF/6.3V (ESR=30mΩ), CIN=22µF/6.3V
- IOUT=10mA to 1.5A to 10mA, Rise time=Fall time=1µs
IOUT=10mA ->1.5A
IOUT=10mA ->1.5A ->10mA
VVOUT
OUT
1
R1=1kΩ, R2=2kΩ,
R1=1kΩ,
R2=2kΩ,C1=33nF
C1=33nF
VVOUT
OUT
IIOUT
OUT
IOUT =1.5A ->10mA
OUT
VVOUT
1
IIOUT
OUT
IOUT
IOUT
2
2
2
Ch1 : VOUT, 50mV/Div
Ch2 : IOUT, 500mA/Div
Time : 1µs/Div
1
Ch1 : VOUT, 50mV/Div
Ch2 : IOUT, 500mA/Div
Time : 20µs/Div
Ch1 : VOUT, 50mV/Div
Ch2 : IOUT, 500mA/Div
Time : 1µs/Div
1.2 Using an MLCC as the Output Capacitor
- COUT=22µF/6.3V (ESR=3mΩ), CIN=22µF/6.3V
- IOUT=10mA to 1.5A to 10mA, Rise time=Fall time=1µs
IOUT = 10mA ->1.5A
IOUT = 10mA -> 1.5A ->10mA
IOUT = 1.5A ->10mA
R1=39kΩ,
C1=56pF
R1=39kΩ, R2=78kΩ,
R2=78kΩ, C1=56pF
VVOUT
OUT
1
IIOUT
OUT
VVOUT
OUT
1
IIOUT
OUT
Copyright ANPEC Electronics Corp.
Rev. A.4 - Jan., 2010
1
IIOUT
OUT
2
2
Ch1 : VOUT, 100mV/Div
Ch2 : IOUT, 500mA/Div
Time : 1µs/Div
VVOUT
OUT
Ch1 : VOUT, 100mV/Div
Ch2 : IOUT, 500mA/Div
Time : 20µs/Div
7
2
Ch1 : VOUT, 100mV/Div
Ch2 : IOUT, 500mA/Div
Time : 1µs/Div
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APL5915
Operating Waveforms (Cont.)
2. Power ON and Power OFF :
- VIN=1.5V, VCNTL=5V, VOUT=1.2V
- COUT=22µF/6.3V (ESR=3mΩ), CIN=22µF/6.3V
Power ON
Power OFF
IN
VVIN
1
VVOUT
OUT
2
IN
VVIN
VVCNTL
CNTL
VVOUT
OUT
2
VVCNTL
CNTL
VVPOK
POK
VVPOK
POK
3
VVCNTL
CNTL
1
3
4
4
Ch1 : VIN, 1V/div
Ch2 : VOUT, 1V/div
Ch3 : VPOK, 1V/div
Ch4 : VCNTL, 2V/div
Time : 10ms/div
Ch1 : VIN, 1V/div
Ch2 : VOUT, 1V/div
Ch3 : VPOK, 1V/div
Ch4 : VCNTL, 2V/div
Time : 50ms/div
3. Shutdown and Enable :
- VIN=1.5V, VCNTL=5V, VOUT=1.2V
- COUT=22µF/6.3V (ESR = 3mΩ), CIN=22µF/6.3V
Shutdown
Enable
VEN
V
EN
1
VVOUT
OUT
2
IIOUT
OUT
OUT
VVOUT
2
3
PVOK
POK
4
Ch1 : VEN, 5V/div
Ch2 : VOUT, 1V/div
Ch3 : IOUT, 1A/div
Ch4 : VPOK, 1V/div
Time : 1ms/div
Copyright ANPEC Electronics Corp.
Rev. A.4 - Jan., 2010
1
IIOUT
OUT
3
POK
VVPOK
VEN
V
EN
4
Ch1 : VEN, 5V/div
Ch2 : VOUT, 1V/div
Ch3 : IOUT, 1A/div
Ch4 : VPOK, 1V/div
Time : 1ms/div
8
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APL5915
Operating Waveforms (Cont.)
4. POK Delay :
- VIN=1.5V, VCNTL=5V, VOUT=1.2V
- COUT=22µF/6.3V (ESR=3mΩ), CIN=22µF/6.3V
VVIN
IN
1
POK Delay
VVOUT
OUT
2
VVPOK
POK
3
Ch1 : VIN, 1V/div
Ch2 : VOUT, 1V/div
Ch3 : VPOK, 1V/div
Time : 1ms/div
Pin Description
PIN
NO.
NAME
1
GND
FUNCTION
Ground pin of the circuitry. All voltage levels are measured with respect to this pin.
2
FB
Connecting this pin to an external resistor divider receives the feedback voltage of the regulator. The
output voltage set by the resistor divider is determined by:
R1
VOUT = 0.8 ⋅ 1 +
(V)
R2
where R1 is connected from VOUT to FB with Kelvin sensing and R2 is connected from FB to GND. A
bypass capacitor may be connected with R1 in parallel to improve load transient response.
3,4
VOUT
Output of the regulator. Please connect Pin 3 and 4 together using wide tracks. It is necessary to
connect a output capacitor with this pin for closed-loop compensation and improve transient
responses.
5
VIN,
Exposed
Pad
Main supply input pins for power conversions. The Exposed Pad provides a very low impedance input
path for the main supply voltage. Please tie the Exposed Pad and VIN Pin (Pin 8) together to reduce
the dropout voltage. The voltage at this pins is monitored for Power-On-Reset purpose.
6
VCNTL
Power input pin of the control circuitry. Connecting this pin to a +5V (recommended) supply voltage
provides the bias for the control circuitry. The voltage at this pin is monitored for Power-On-Reset
purpose.
7
POK
Power-OK signal output pin. This pin is an open-drain output used to indicate status of output voltage
by sensing FB voltage. This pin is pulled low when the rising FB voltage is not above the VPOK
threshold or the falling FB voltage is below the VPNOK threshold, indicating the output is not OK.
8
EN
Enable control pin. Pulling and holding this pin below 0.3V shuts down the output. When re-enabled,
the IC undergoes a new soft-start cycle. When leave this pin open, an internal current source 10µA
pulls this pin up to VCNTL voltage, enabling the regulator.
Copyright ANPEC Electronics Corp.
Rev. A.4 - Jan., 2010
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APL5915
Block Diagram
EN
VCNTL
VIN
PowerOn-Reset
Soft-Start
and
Control Logic
UV
Thermal
Limit
0.4V
VREF
0.8V
EAMP
VOUT
Current
Limit
FB
Delay
POK
GND
90%
VREF
POK
Typical Application Circuits
Test Circuit
R4
C2
1µF
L1
1µH
2.2
+5V
5
C8
R8
8.2K 470pF
VCC
BOOT
7
PHASE
Shutdown
C6
0.1µF
2
FB
VIN
+1.5V
VCNTL
5
VIN
CIN
22µF
C5
1000µF x2
Q2
APM2014N
LGATE
POK
Q1
APM2014N
L2
3.3µH
4
VCNTL
+5V
CVCNTL
1µF
8
U2
APW7057
6
C9
47µF
6
UGATE
C4
470µF x2
1
OCSET
Q3
C3
1µF
D1
1N4148
POK
VOUT
VOUT
7
R3
1K
VOUT
+1.2V/1.5A
3
4
COUT
150µF
U1
APL5915
GND
3
R5
1.75K
EN
Enable
8
EN
FB
GND
1
R7
2K
C7
0.1µF
Copyright ANPEC Electronics Corp.
Rev. A.4 - Jan., 2010
2
R2
2K
R1
1K
C1
33nF
R6
0
10
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APL5915
Typical Application Circuits (Cont.)
1. Using an Output Capacitor with ESR≥18mΩ
VCNTL
+5V
CCNTL
1µF
6
R3
1K
VCNTL
7
POK
VIN
POK
VOUT
VOUT
5
VOUT
+1.2V / 1.5A
3
4
COUT
150µF
APL5915
8
EN
EN
FB
2
GND
Enable
VIN
+1.5V
CIN
22µF
1
R2
2K
R1
1K
C1
33nF (in the range of 12 ~ 48nF)
2. Using an MLCC as the Output Capacitor
VCNTL
+5V
CCNTL
1µF
6
R3
1K
VCNTL
7
POK
VIN
POK
VOUT
VOUT
5
VOUT
+1.2V / 1.5A
3
4
COUT
22µF
APL5915
8
EN
EN
FB
2
GND
Enable
VIN
+1.5V
CIN
22µF
1
R2
78K
R1
39K
C1
56pF
DESIGNATION
DESCRIPTION
22µF ECJ3YBOJ226M
Panasonic
COUT
22µF GRM21BR60J226M
Murata
VOUT (V)
R1 (kΩ)
R2 (kΩ)
C1 (pF)
1.05
43
137.6
47
1.5
27
30.86
82
1.8
15
12
150
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APL5915
Function Description
allowing the device to cool down. The regulator regulates
the output again through initiation of a new soft-start cycle
Power-On-Reset
A Power-On-Reset (POR) circuit monitors both input voltages at VCNTL and VIN pins to prevent wrong logic
after the junction temperature is cooled by 50°C, resulting in a pulsed output during continuous thermal over-
controls. The POR function initiates a soft-start process
after the two supply voltages exceed their rising POR
load conditions. The thermal shutdown is designed with
a 50oC hysteresis to lower the average junction tempera-
threshold voltages during powering on. The POR function also pulls low the POK pin regardless the output
ture during continuous thermal overload conditions, extending lifetime of the device.
voltage when the VCNTL voltage falls below its falling
POR threshold.
For normal operation, device power dissipation should
be externally limited so that junction temperatures will
Internal Soft-Start
not exceed +125°C.
An internal soft-start function controls rising rate of the
output voltage to limit the current surge at start-up. The
Enable Control
typical soft-start interval is about 2ms.
The APL5915 has a dedicated enable pin (EN). A logic
Output Voltage Regulation
low signal (VEN
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