APL6535BI-TRL

APL6535 Two-Channel Supervisory IC Features • • • • • • • 2.6V to 5.5V Input Voltage Range Low Quiescent Current : less than 50µA High Accuracy Detection Threshold : ± 1.6% Adjustable Undervoltage Lockout for Each Supply Active high PGOOD Output Guaranteed PGOOD Valid to Falling VCC < 1V VMON Glitch Immunity : 30µs Lead Free Available (RoHS Compliant) General Description The APL6535 is a two channel supervisory IC designed to monitor voltage supplies in mP and digital system. This IC can supervise any positive voltage using an external resistor divider to translate to a lower voltage for comparison to the internal 0.633V reference. Once any VMON input falls below 0.633V the PGOOD output is pulled low, the hysteresis of the internal reference is 15mV. The PGOOD pin has an internal 20kW pull-up to VCC making an external pull-up resistor unnecessary. Each rail’ VMON point is independently s • Applications • • • • • • Graphics Cards Portable Battery-Powered Equipment µ P Voltage Monitoring Set-Top Boxes Notebook Computer Multiple Supply System adjustable with a resistor divider. The PGOOD output is guaranteed to be valid with IC bias lower than 1V. This IC is designed to reject fast line transient glitches 30ms on VMON input. The PGOOD output is an opendrain to allow ORing of multiple signals. If less than four voltages are being monitored, connect the unused VMON pins to VCC. The ENABLE input pin provides for a reset of the PGOOD output when it is pulled down below 0.5V. With an internal 10mA pull-up to Pinouts SOT-23-5 Top View Vcc GND PGOOD 1 2 3 4 VMON2 5 VMON1 VCC, it can be signaled with common logic or pulled to ground with a push button switch. APL6535 come in a miniature SOT-23-5 package. APL6535 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 1 www.anpec.com.tw ° APL6535 Ordering and Marking Information APL6535 Lead Free Code Handling Code Temp. Range Package Code A PL6535 : 535X Package Code B : SOT-23-5 Temp. Range I : -40 to 85 °C Handling Code TU : Tube TR : Tape & Reel Lead Free Code L : Lead Free Device Blank : Original Device X - Date Code N ote: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte in plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature. Pin Function Description PIN N o. 1 3 2 Name VCC P GOOD GND VMON1 VMON2 O I/O Supply Voltage PGOOD is the AND function of all the VMON inputs being satisfied. This is an open drain output and can be pulled high to the appropriate level with an external resistor. Additionally a 20kO pull up to VCC is provided internally. Ground Connection These inputs provide for a programmable monitored voltage threshold referenced to an internal 0.633V reference. These inputs have a 30µs glitch filter to prevent transie nt upsets from being recognized by PGOOD. Description 4, 5 I Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 2 www.anpec.com.tw APL6535 Block Diagram VC C(2.6~5.5V) 10uA 20k Ω VMON1 PGOOD F alling Edge Glitch Filter 1M Ω VMON2 0.633V Absolute Maximum Ratings Symbol VCC VMON1, 2 PGOOD TJ TSTG TS ESD Note: 1.Human body model: C=100pF, R=1500, 3 positives pulse plus 3 negative pulses. Parameter Input Voltage All Input Pins Output Pin Maximum Junction Temperature Storage Temperature Soldering Temperature (10 seconds) Electrostatic Discharge Rating 6.5 -0.3V to V +0.3V CC Unit V V V °C °C °C V -0.3V to VCC+0.3V 150 -65 to +150 260 -3000 to 3000*1 Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 3 www.anpec.com.tw APL6535 Electrical Characteristics Unless Otherwise noted these specifications apply over full temperature, Vcc = 3.3V, TJ =- 40 °C to 85°C Typical values refer to TJ =25°C Symbol B BIAS ICC ICC VCC_L2H VCC_POR PGOOD PGpd PGpu Parameter Test condition APL6535 Unit Min. Typ. Max. 40 400 230 2000 50 500 50 500 2.6 2.4 10 20 0 3 2 10 µA µA µA µA V V mA KΩ 100 mV µs µs ns Supply Current (EN enable) Supply Current (EN disable) VCC Power On VCC Power On Reset Pull-Down Current Pull-Up Resistance VMON > VMON_L2H VMON < VMON_H2L VMON > VMON_L2H VMON < VMON_H2L VCC low to high VCC high to low VPGOOD=0.5V VCC = 1V Last valid input =Vth to PG release EN high to PG release EN low to PG pulling low TJ=25°C TJ=-40°C to 85°C VPGI Output Low TPG del Delay From VMON Rising VMON TPG del ENR Delay From EN Rising TPG del ENF Delay From EN Falling VMON Input VMON_H2L Falling Threshold Voltage VMON _TC 0.623 0.633 0.643 V 100 15 10 µ V/°C mV mV µs VVMON_HYS VVMON_RNG Range TFIL Glitch Filter Duration Falling Threshold Temperature Coeff. Hysteresis Voltage VMON glitch to PGOOD low filter 30 Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 4 www.anpec.com.tw APL6535 Electrical Characteristics Unless Otherwise noted these specifications apply over full temperature, Vcc = 5V, TJ =- 40 °C to 85°C Typical values refer to TJ =25°C APL6535 Unit Min. Typ. Max. 50 500 230 2000 60 600 60 600 2.6 2.4 10 20 0 5 2 10 µA µA µA µA V V mA KΩ 100 mV µs µs ns Symbol B BIAS ICC ICC Parameter Test condition Supply Current (EN Enable) Supply Current (EN Disable) VCC_L2H VCC Power On VCC_POR VCC Power On Reset PGOOD PGpd Pull-Down Current PGpu Pull-Up Resistance VPGI Output Low TPG del Delay From VMON Rising VMON TPG del ENR Delay From EN Rising TPG del ENF Delay From EN Falling VMON Input VMON_H2L Falling Threshold Voltage Falling Threshold VMON_TC Temperature Coeff. VVMON_HYS Hysteresis Voltage VVMON_RNG Range TFIL Glitch Filter Duration VMON > VMON_L2H VMON < VMON_H2L VMON > VMON_L2H VMON < VMON_H2L VCC low to high VCC high to low VPGOOD=0.5V VCC = 1V Last valid input = Vth to PG release EN high to PG release EN low to PG pulling low TJ=25°C TJ=-40°C to 85°C 0.623 0.633 0.643 V 100 15 10 30 µ V/°C mV mV µs VMON glitch to PGOOD low filter Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 5 www.anpec.com.tw APL6535 Application Circuit 3.3V 12V 22kΩ APL6535 Vcc PGOOD Output *10K 1 V CC 2 GND 3 PGOOD 10k Ω VMON1 5 VMON2 4 4.7k Ω 0.47uF 1uF * Optional 1.5k Ω Timing Diagram Vth VMON TFIL PGOOD VMON_L2H VMONVMON_L2H 3.1 3.6 4.1 4.6 5.1 5.6 -40 -20 0 20 40 60 80 100 120 Supply Voltage(V) Temperature(°C) VMON_H2L vs. Temperature 0.638 0.636 0.634 0.632 VMON Threshold vs. Supply Voltage 0.651 VCC= 5 V 0.648 VMON Threshold(V) 0.645 0.642 0.639 0.636 VMON_L2H VMON_H2L(V) 0.630 0.628 0.626 0.624 0.622 0.620 0.618 -40 -20 0 20 40 60 80 100 120 VCC= 3. 3V VMON_H2L 0.633 0.630 2.6 3.1 3.6 4.1 4.6 5.1 5.6 Temperature(°C) Supply Voltage(V) Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 7 www.anpec.com.tw APL6535 Typical Characteristics (Cont.) EN High to PGOOD VCC=3.3V VMON High to PGOOD VCC=3.3V EN(2V/div) VMON(1V/div) PGOOD(2V/div) PGOOD(2V/div) Time(1us/div) Time(4us/div) EN Low to PGOOD VCC=3.3V VMON Low to PGOOD VCC=3.3V EN(2V/div) VMON(1V/div) PGOOD(2V/div) PGOOD(2V/div) Time(10ns/div) Time(20µs/div) Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 8 www.anpec.com.tw APL6535 Application Information PGOOD The APL6535 is a four channel supervisory IC designed to monitor multiple voltages greater than 0.7V. This IC is suitable for both microprocessors or industrial system applications. Once biased to 2.6V and enabled the IC continuously monitors from one to four voltages independently through external resistor dividers comparing each VMON pin voltage to an internal 0.633V reference. The PGOOD output is an opendrain to allow ORing of the signals and interfacing to a wide range of logic levels. If less than four voltages are being monitored, connect the unused VMON pins to V CC. The PGOOD pin has an internal 20kW pull-up to V CC m aking an external pull-up resistor unnecessary. Falling Edge Glitch Filter Once any VMON input falls below 0.633V the PGOOD output is pulled low, the VMON inputs are designed to reject fast transients (30us). Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 9 www.anpec.com.tw APL6535 Package Information SOT-23-5 e1 5 4 E1 E 1 2 3 e b D A2 A a L1 A1 L2 L D im A A1 A2 b D E E1 e e1 L L1 L2 N α Millimeters Min. 0 .95 0.05 0.90 0 .30 2 .8 2 .6 1.5 0 .95BSC 1.90BSC 0 .35 0.20 BSC 0.5 5 0° 10° 0° 0.7 0.020 0.55 0.014 Max. 1.45 0.15 1.30 0.50 3.00 3.00 1.70 Min. 0.037 0.002 0.035 0.011 0.110 0.102 0.059 I nches Max. 0.057 0.006 0.051 0.019 0 . 118 0 . 118 0.067 0.037BSC 0.07 4BSC 0.022 0.008 BSC 0.028 5 10° Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 10 www.anpec.com.tw APL6535 Physical Specifications Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. Reflow Condition TP (IR/Convection or VPR Reflow) tp Critical Zone T L to T P Ramp-up Temperature TL Tsmax tL Tsmin Ramp-down ts Preheat 25 t 2 5 °C to Peak Time Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Average ramp-up rate 3°C/second max. 3°C/second max. (TL to TP) Preheat 100°C 150°C - Temperature Min (Tsmin) 150°C 200°C - Temperature Max (Tsmax) 60-120 seconds 60-180 seconds - Time (min to max) (ts) Time maintained above: 183°C 217°C - Temperature (TL) 60-150 seconds 60-150 seconds - Time (tL) Peak/Classificatioon Temperature (Tp) See table 1 See table 2 Time within 5°C of actual 10-30 seconds 20-40 seconds Peak Temperature (tp) Ramp-down Rate 6°C/second max. 6°C/second max. 6 minutes max. 8 minutes max. Time 25°C to Peak Temperature Notes: All temperatures refer to topside of the package .Measured on the body surface. Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 11 (mm) www.anpec.com.tw APL6535 Classification Reflow Profiles(Cont.) Table 1. SnPb Entectic Process – Package Peak Reflow Temperature s 3 3 P ackage Thickness Volume mm Volume mm < 350 ≥ 350 < 2.5 mm 240 +0/-5 ° C 225 +0/-5 ° C ≥ 2.5 mm 225 +0/-5 ° C 225 +0/-5 ° C T able 2. Pb-free Process – Package Classification Reflow Temperatures 3 3 3 P ackage Thickness Volume mm Volume mm Volume mm < 350 3 50-2000 > 2000 < 1.6 mm 260 +0 ° C* 260 +0 ° C* 260 +0 ° C* 1 .6 mm – 2.5 mm 260 +0 ° C* 250 +0 ° C* 245 +0 ° C* ≥ 2.5 mm 250 +0 ° C* 245 +0 ° C* 245 +0 ° C* * Tolerance: The device manufacturer/supplier s hall a ssure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0 ° C. For example 260 ° C+0 ° C) at the rated MSL level. Reliability Test Program Test item S OLDERABILITY HOLT P CT TST E SD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245°C, 5 SEC 1000 Hrs Bias @125°C 168 Hrs, 100% RH, 121°C -65° C~150 °C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1 tr > 1 00mA Carrier Tape & Reel Dimensions t P P1 D Po E F W Bo Ao Ko D1 Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 12 www.anpec.com.tw APL6535 Carrier Tape & Reel Dimensions(Cont.) T2 J C A B T1 Application A 178±1 B 72 ± 1.0 D 1.5 +0.1 C J T1 8.4 ± 2 P1 T2 1.5± 0.3 Ao 13.0 + 0.2 2.5 ± 0.15 D1 1.5 +0.1 Po 4.0 ± 0.1 W 8.0+ 0.3 - 0.3 Bo 3.2± 0.1 P 4 ± 0.1 Ko 1.4± 0.1 E 1.75± 0.1 t 0.2±0.03 SOT-23-5 F 3.5 ± 0.05 2.0 ± 0.1 3.15 ± 0.1 (mm) Cover Tape Dimensions Application SOT- 23 Carrier Width 8 Cover Tape Width 5.3 Devices Per Reel 3000 Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Copyright © ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 13 www.anpec.com.tw