APL6536
Four-Channel Supervisory IC
Features
• • • • • • • 2.6V to 5.5V Input Voltage Range Low Quiescent Current : less than 50µA High Accuracy Detection Threshold : ±1.6% Adjustable Undervoltage Lockout for Each Supply Active high PGOOD Output Guaranteed PGOOD Valid to Falling VCC < 1V VMON Glitch Immunity : 30µs Lead Free Available (RoHS Compliant)
General Description
The APL6536 is a four channel supervisory IC designed to monitor voltage supplies in µP and digital system. This IC can supervise any positive voltage using an external resistor divider to translate to a lower voltage for comparison to the internal 0.633V reference. Once any VMON input falls below 0.633V the PGOOD output is pulled low, the hysteresis of the internal reference is 15mV. The PGOOD pin has an internal 20kΩ pull-up to VCC making an external pull-up resistor unnecessary. Each rail’s VMON point is independently adjustable with a resistor divider. The PGOOD output is guaranteed to be valid with IC bias lower than 1V. This IC is designed to reject fast line transient glitches 30µs on VMON input. The PGOOD output is an open-drain to allow ORing of multiple signals. If less than four voltages are being monitored, connect the unused VMON pins to VCC. The ENABLE input pin provides for a reset of the PGOOD output when it is pulled down below 0.5V. With an internal 10µA pull-up to VCC, it can be signaled with common logic or pulled to ground with a push button switch. APL6536 come in a miniature SOP-8 package.
•
Applications
• • • • • • Graphics Cards Portable Battery-Powered Equipment µP Voltage Monitoring Set-Top Boxes Notebook Computer Multiple Supply System
Pinouts
SOP-8 Top View
Vcc PG OO D ENABLE G ND 1 2 3 4 8 7 6 5 VMO N1 VMO N2 VMO N3 VMO N4
APL6536
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2005 1 www.anpec.com.tw
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APL6536
Ordering and Marking Information
APL6536
Lead Free Code Handling Code Tem p. Range Package Code APL6536 : APL6536 XXXXX Package Code K : SOP-8 Tem p. Range I : -40 to 85 °C Handling Code TU : Tube TR : Tape & Reel Lead Free Code L : Lead Free Device Blank : Original Device XXXXX - Date Code
Notes: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte in plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature.
Pin Function Description
PIN No. 1 2 3 4 5-8 Name VCC PGOOD ENABLE GND VMON1 VMON2 VMON3 VMON4 I O I I/O Supply Voltage (2.6V to 5V) PGOOD is the AND function of all the VMON inputs being satisfied. T his is an open drain output and can be pulled high to the appropriate level with an external resistor. Additionally a 20k Ω pull up to VCC is provided internally. Enabling input for supervisory function. Has a 10µA pull-up to VCC. Ground Connection These inputs provide for a programmable monitored voltage threshold referenced to an internal 0.633V reference. These inputs have a 30µs glitch filter to prevent transient upsets from being recognized by PGOOD. Description
Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2005
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APL6536
Block Diagram
V C C ( 2 .6 ~ 5 . 5 V )
EN
V MON1 10uA
20kΩ
V MON2 P GOOD F a llin g E d g e G litc h F ilte r 1MΩ V MON4
V MON3
0.633V
Absolute Maximum Ratings
Symbol VCC Input Voltage VMON1-4,EN All Input Pins PGOOD Output Pin TJ T
STG
Parameter
Rating 7 -0.3V to VCC+0.3V -0.3V to VCC+0.3V 150 -65 to +150 260 -3000 to 3000*
1
Unit V V V °C °C °C V
Maximum Junction Temperature Storage Temperature Soldering Temperature (10 seconds) Electrostatic Discharge
TS ESD
Note:1.Human body model: C=100pF, R=1500Ω, 3 positives pulse plus 3 negative pulses.
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APL6536
Electrical Characteristics
Unless Otherwise noted these specifications apply over full temperature, Vcc = 3.3V, TJ =- 40 °C to 85°C Typical values refer to TJ =25°C
Symbol BIAS ICC ICC VCC_L2H VCC_POR PGOOD PGpd PGpu VPGI
Parameter Supply Current (EN enable) Supply Current (EN disable) VCC Power On VCC Power On Reset Pull-Down Current Pull-Up Resistance Output Low VCC = 1V
Test condition VMON > VMON_L2H VMON < VMON_H2L VMON > VMON_L2H VMON < VMON_H2L VCC low to high VCC high to low VPGOOD=0.5V
APL6536 Unit Min. Typ. Max. 40 400 µA 230 2000 µA 50 500 µA 50 500 µA 2.6 V 2.4 V 10 20 0 3 2 10 1.30 1.65 80 10 2 mA KΩ 100 mV µs µs ns V mV µA
TPG del Delay From VMON Rising VMON TPG del ENR Delay From EN Rising TPG del ENF Delay From EN Falling ENABLE VEN VEN_HYS Rising Threshold Voltage Threshold Hysteresis Voltage
Last valid input =Vth to PG release EN high to PG release EN low to PG pulling low Enable low to high threshold VEN = 0.5V TJ=25°C TJ=-40°C to 85°C
IENpu Pull-up current VMON Input VMON_H2L Falling Threshold Voltage VMON_TC Falling Threshold Temperature Coeff. VVMON_HYS Hysteresis Voltage VVMON_RNG Range TFIL Glitch Filter Duration
0.623 0.633 0.643 V 100 15 10 µV/°C mV mV µs
VMON glitch to PGOOD low filter
30
Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2005
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APL6536
Electrical Characteristics
Unless Otherwise noted these specifications apply over full temperature, Vcc = 5V, TJ =- 40 °C to 85°C Typical values refer to TJ =25°C
APL6536 Unit Min. Typ. Max. 50 500 µA 230 2000 µA 60 600 µA 60 600 µA 2.6 V 2.4 V 10 20 0 5 2 10 2 2.5 80 10 3 mA KΩ 100 mV µs µs ns V mV µA
Symbol BIAS ICC ICC
Parameter Supply Current (EN Enable) Supply Current (EN Disable)
Test condition VMON > VMON_L2H VMON < VMON_H2L VMON > VMON_L2H VMON < VMON_H2L VCC low to high VCC high to low VPGOOD=0.5V VCC = 1V Last valid input = Vth to PG release EN high to PG release EN low to PG pulling low Enable low to high threshold VEN = 0.5V TJ=25°C TJ=-40°C to 85°C
VCC_L2H VCC Power On VCC_POR VCC Power On Reset PGOOD PGpd Pull-Down Current PGpu Pull-Up Resistance VPGI Output Low TPG del Delay From VMON Rising VMON TPG del ENR Delay From EN Rising TPG del ENF Delay From EN Falling ENABLE VEN Rising Threshold Voltage VEN_HYS Threshold Hysteresis Voltage IENpu Pull-Up Current VMON Input VMON_H2L Falling Threshold Voltage Falling Threshold VMON_TC Temperature Coeff. VVMON_HYS Hysteresis Voltage VVMON_RNG Range TFIL Glitch Filter Duration
0.623 0.633 0.643 V 100 15 10 30 µV/°C mV mV µs
VMON glitch to PGOOD low filter
Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2005
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APL6536
Application Circuit
5V
12V 22k Ω
5V 10k Ω
3.3V 10k Ω
APL6536
PGOOD Output Vcc
O p tio na l 2 PGD 3 EN 4 G ND 1 V CC
10k Ω
V M O N1 8 V M O N2 7 V M O N3 6 V M O N4 5
2.7k Ω 0.47uF 1uF
1.5k Ω
2.7k Ω
4.7k Ω
Timing Diagram
Vth VMON TFIL PGOOD VMON_L2H
VMONVMON_L2H
3.1
3.6
4.1
4.6
5.1
5.6
-40
-20
0
20
40
60
80
100
120
Supply Voltage(V)
Temperature(°C)
VMON_H2L vs. Temperature
0.638 0.636 0.634 0.632
VMON Threshold vs. Supply Voltage
0.651
VCC=5V
0.648
VMON Threshold(V)
0.645 0.642 0.639 0.636 0.633 0.630
VMON_L2H
VMON_H2L(V)
0.630 0.628 0.626 0.624 0.622 0.620 0.618 -40 -20 0 20 40 60 80 100 120
VCC=3.3V
VMON_H2L
2.6
3.1
3.6
4.1
4.6
5.1
5.6
Temperature(°C)
Supply Voltage(V)
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APL6536
Typical Characteristics (Cont.)
EN High to PGOOD
VCC=3.3V
VMON High to PGOOD
VCC=3.3V
EN(2V/div)
VMON(1V/div)
PGOOD(2V/div) PGOOD(2V/div)
Time(1us/div)
Time(4us/div)
EN Low to PGOOD
VCC=3.3V
VMON Low to PGOOD
VCC=3.3V
EN(2V/div)
VMON(1V/div)
PGOOD(2V/div)
PGOOD(2V/div)
Time(10ns/div)
Time(20µs/div)
Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2005
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APL6536
Application Information
PGOOD
The APL6536 is a four channel supervisory IC designed to monitor multiple voltages greater than 0.7V. This IC is suitable for both microprocessors or industrial system applications. Once biased to 2.6V and enabled the IC continuously monitors from one to four voltages independently through external resistor dividers comparing each VMON pin voltage to an internal 0.633V reference. The PGOOD output is an opendrain to allow ORing of the signals and interfacing to a wide range of logic levels. If less than four voltages are being monitored, connect the unused VMON pins to VCC. The PGOOD pin has an internal 20kΩ pull-up to V CC m aking an external pull-up resistor unnecessary.
Falling Edge Glitch Filter
Once any VMON input falls below 0.633V the PGOOD output is pulled low, the VMON inputs are designed to reject fast transients (30us).
Enable
The APL6536 has an active high enable function. Force EN high (>=0.5VCC) enables the PGOOD, EN low( 2KV, VMM > 200V 10ms , Itr > 1 00mA
Carrier Tape
t P P1 D
Po E
F W
Bo
Ao
Ko D1
T2
J C A B
T1
Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2005
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APL6536
Reel Dimensions
Application A 330 ± 1 SOP- 8 F 5.5± 1 B 62 +1.5 D C 12.75+ 0.15 D1 J 2 ± 0.5 Po T1 12.4 ± 0.2 P1 2.0 ± 0.1 T2 2 ± 0.2 Ao 6.4 ± 0.1 W 12± 0. 3 Bo 5.2± 0. 1 P 8± 0.1 Ko E 1.75±0.1 t
1.55 +0.1 1.55+ 0.25 4.0 ± 0.1
2.1± 0.1 0.3±0.013
(mm)
Cover Tape Dimensions
Application SOP- 8 Carrier Width 12 Cover Tape Width 9.3 Devices Per Reel 2500
Customer Service
Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369
Copyright ANPEC Electronics Corp. Rev. A.4 - Mar., 2005
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