APL78L12-DC-PB

APL78L05/12 Three-Terminal Low Current Positive Voltage Regulator Features • • • • • • • • • 3-Ternimal Regulators Maximum Input Voltage : 30V Output Voltages of 5V,12V Output Current Up to 100mA No External Components Internal Thermal Overload Protection Internal Short-Circuit Limiting Output Voltage Offered in 4% tolerance SOP-8, SOT-89 and TO-92 Packages. General Description This series of fixed-voltage monolithic integrated-circuit voltage regulators is designed for a wide range of applications. These applications include on-card regulation for elimination of noise and distribution problems associated with single-point regulation. In addition, they can be used with power-pass elements to make high-current voltage regulators. Each of these regulators can deliver up to 100mA of output current. The internal limiting and ternal shutdown features of these regulators make them essentially immune to overload. When used as a replacement for a Zener diode-resistor combination, an effective improvement in output impedance can be obtained together with lower-bias current. Applications • • Battery-Powered Circuitry Post Regulator for Switching Power Supply Pin Description V O UT GND GND NC 1 8 V IN GND 3 V IN GND VOUT 2 7 2 3 6 GND NC 1 4 5 SOP-8 (Top View) TO-92 (Top View) 1 VOUT 2 GND 3 VIN Ordering and Marking Information A P L 7 8 L 0 5 /1 2 L e a d F re e C o d e H a n d l in g C o d e Tem p. Range Package C ode SOT-89 (Front View) Package C ode E : T O -9 2 K : S O P -8 D : S O T -8 9 Tem p. Range C : 0 to 7 0 ° C H a n d l in g C o d e TU : Tube TR : Tape & R eel P B : P la s t ic B a g TB : Tape & Box L e a d F re e C o d e L : L e a d F r e e D e v ic e B l a n k : O r i g in a l D e v ic e A P L 7 8 L 0 5 /1 2 D /K : A P L 7 8 L 0 5 /1 2 XXXXX XXXXX - D a te C o d e A P L 7 8 L 0 5 /1 2 E : APL 7 8 L 0 5 /1 2 XXXXX XXXXX - D a te C o d e ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 1 www.anpec.com.tw APL78L05/12 Absolute Maximum Ratings Symbol VIN TJ Parameter Input Voltage Operating Junction Temperature Range Control Section Power Transistor Storage Temperature Range Thermal Resistance from Junction to Ambient in Free Air SOP-8 SOT-89/TO-92 Rating 30 0 to 125 0 to 150 -65 to +150 160 180 Unit VDC °C TSTG θJA °C °C/W Electrical Characteristics VIN=10V, IOUT=40mA, TJ=25°C, CIN=0.33µF, COUT=0.1µF, unless otherwise specified APL78L05 Symbol Parameter Test Condition Typ. Max. Min. VO VO Output Voltage 1.0mA≤IOUT≤40mA Output Voltage (0° to +125°C) 7.0Vdc≤VIN≤20Vdc VIN=10V, 1.0mA≤IOUT≤40mA 7.0Vdc≤VIN≤20Vdc 8.0Vdc≤VIN≤20Vdc 1.0mA≤IOUT≤100mA 1.0mA≤IOUT≤40mA 8.0Vdc≤VIN≤20Vdc 1.0mA≤IOUT≤40mA IOUT=100mA 4.75 5 29 26 9 5 2.8 0.15 0.08 1.9 5.25 150 100 60 30 6.0 1.5 0.1 Vdc 4.8 5.0 5.2 Unit Vdc Regline Line Regulation Regload Load Regulation IB ∆ IB Quiescent Current Quiescent Current Change mV mV mA mA Vdc VIN-VO Dropout Voltage Symbol VO VO Regline Parameter Output Voltage Test Condition APL78L12 Typ. Max. Min. 11.5 12 12 12.5 12.6 250 100 50 6.5 1.5 1.9 Unit Vdc Vdc mV mV mA mA Vdc 1.0mA≤IOUT≤40mA Output Voltage (0° to +125°C) 14Vdc≤VIN≤27Vdc VIN=19V, 1.0mA≤IOUT≤40mA Line Regulation 14.5Vdc≤VIN≤27Vdc 1.0mA≤IOUT≤100mA 1.0mA≤IOUT≤40mA 16Vdc≤VIN≤27Vdc 1.0mA ≤IOUT≤40mA IOUT=100mA 2 11.4 Regload Load Regulation IB ∆ IB VIN-VO Quiescent Current Quiescent Current Change Dropout Voltage Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 www.anpec.com.tw APL78L05/12 Application Circuit V IN C in = 0 .3 3 µ F A P L 7 8 L 0 5 /1 2 V OUT C OUT= 0 .1 µ F Note1 : A common ground is required between the input and the output voltage. The input voltage must remain typically 2V above the output voltage even during the low point on the input ripple voltage. Note2 : Cin is required if regulator is located an appreciable distance from power supply filter. Note3 : COUT is not needed for stability; however, it does improve transient response. Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 3 www.anpec.com.tw APL78L05/12 Typical Characteristics Output Voltage vs. Input Voltage 8 7 APL78L05 Dropout Voltage vs. Junction Temperature 2.25 APL78L05 2 6 5 Dropout Voltage (V) Output Voltage (V) IO=70mA IO=1mA 4 3 2 1 0 0 2 4 6 8 10 1.75 IO=40mA IO=100mA 1.5 IO=40mA IO=1mA 1.25 Dropout of Regulation is defined as when ∆Vo=1% of Vo 0 25 50 75 100 125 1 Input Voltage (V) Junction Temperature (°C) Quiescent Current vs. Ambient Temperature 3.0 APL78L05 Quiescent Current vs. Input Voltage 3 .5 3 APL78L05 VIN=10V IO=40mA No Load Quiescent Current (mA) 2.8 Quiescent Current (mA) 0 25 50 75 100 125 2 .5 2 1 .5 1 0 .5 0 0 5 10 15 20 25 30 35 2.6 2.4 2.2 Ambient Temperature (°C) Input Voltage (V) Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 4 www.anpec.com.tw APL78L05/12 Typical Characteristics (Cont.) Quiescent Current vs. Output Current 3 APL78L05 Dropout Voltage vs. Output Current 1.9 APL78L05 VIN=10V Quiescent Current (mA) 2.5 1.85 Dropout Voltage (V) 2 1.8 1.5 1.75 1 1.7 0.5 1.65 Dropout of Regulation is defined as when ∆Vo=1% of Vo 0 20 40 60 80 100 0 0 20 40 60 80 100 1.6 Output Current (mA) Output Current (mA) PSRR vs. Frequency +0 APL78L05 Load-Transient Response APL78L05 VIN=10V -10 IOUT=10mA -20 COUT=0.1uF COUT=0.1µF PSRR (dB) VOUT(100mv/div) VOUT -30 -40 -50 -60 -70 -80 10 100 1k 10k 100k OUT= IOUT=10mA~80mA 10mA~80mA Frequency (Hz) Time (20µs/div) Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 5 www.anpec.com.tw APL78L05/12 Typical Characteristics (Cont.) Line Transient Response APL78L05 Maximum Power Dissipation vs. Ambient Temperature APL78L05 Maximum Power Dissipation (mW) 1300 1100 900 700 500 300 100 25 50 75 100 125 150 TO-92 Type Package No Heat Sink VIN=9.5V~10.5V COUT=0.1µF IOUT=10mA VOUT=10(mV/div) Time (100us/div) Ambient Temperature (°C) Output Voltage vs. Ambient Temperature 5.02 Region of Stable ESR vs. Output Current APL78L05 APL78L05 VIN=10V IO=40mA 5.015 10 COUT=0.1uF Output Voltage(V) COUTESR(Ω) 1 5.01 Stable Region 5.005 0.1 5 Untested 4.995 0 25 50 75 100 125 0.01 0 20 40 60 80 100 Ambient Temperature (°C) Output Current(mA) Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 6 www.anpec.com.tw APL78L05/12 Typical Characteristics The APL78L05/12 Series of fixed voltage regulators are designed with Thermal Overload Protection that shuts down the circuit when subjected to an excessive power overload condition. Internal Short Circuit Protection limits the maximum current the circuit will pass. In many low current applications, compensation capacitors are not required. However, it is recommended that the regulator input be bypassed with a capacitor if the regulator is connected to the power supply filter with long wire lengths, or if the output load capacitance is large. The input bypass capacitor should be selected to provide good high-frequency characteristics to insure stable operation under all load conditions. A 0.33µF or larger tantalum, mylar, or other capacitor having low internal impedance at high frequencies should be chosen. The bypass capacitor should be mounted with the shortest possible leads directly across the regulators input terminals. Good construction techniques should be used to minimize ground loops and lead resistance drops since the regulator has no external sense lead. Bypassing the output is also recommended. 0.33µ F 6.5 20V MPSU55 -VO Figure 1. Current Regulator Input 0.33µ F lO APL78L05 R Constant Current to Grounded Load The APL78L00 regulators can also be used as a current source when connected as above. In order to minimize dissipation the APL78L05 is chosen in this application. Resistor R determines the current as follows : IO = 5.0V R + IB IB =3.8mA over line and load changes For example, a 100mA current source would require R to be a 50Ω, 1/2W resistor and the output voltage compliance would be the input voltage less 7V. Figure 2. ±15V Tracking Voltage Regulator +20V APL78L15 0.33µ F 7 6 2 +VO 10K MC1741 3 4 10K MPSA70 Figure 3. Positive and Negative Regulator +VI 0.33µ F -VI 0.33µ F APL79LXX 0.1µ F -VO APL78LXX 0.1µ F +VO Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 7 www.anpec.com.tw APL78L05/12 Packaging Information SOP-8 pin ( Reference JEDEC Registration MS-012) E H e1 D e2 A1 A 1 L 0.004max. Dim A A1 D E H L e1 e2 φ1 Mi ll im et er s Min . 1. 35 0. 10 4. 80 3. 80 5. 80 0. 40 0. 33 1. 27B S C 8° Max . 1. 75 0. 25 5. 00 4. 00 6. 20 1. 27 0. 51 Min. 0. 053 0. 004 0. 189 0. 150 0. 228 0. 016 0. 013 0.015X45 Inche s Max . 0. 069 0. 010 0. 197 0. 157 0. 244 0. 050 0. 020 0. 50B S C 8° Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 8 www.anpec.com.tw APL78L05/12 Package Information TO-92 3 J e e1 2 1 L1 Q A L2 L SEATING PLANE E b2 S D b S Dim A φb φ b2 φD E e e1 J L L1 L2 Q S Millimeters Min. Max. 4.58 0.41 0.41 4.96 3.94 2.42 1.15 3.43 12.70 1.27 6.35 2.93 2.42 2.66 5.33 0.53 0.48 5.20 4.19 2.66 1.39 Inches Min. 0.170 0.160 0.160 0.175 0.125 0.095 0.045 0.135 0.500 0.050 0.250 0 . 11 5 0.080 0.105 Max. 0.210 0.021 0.019 0.205 0.165 0.105 0.055 Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 9 www.anpec.com.tw APL78L05/12 Package Information SOT-89 (Reference EIAJ ED-7500A Reg stration SC-62) D D1 a E H 1 2 3 L B1 B e e1 C A a D im A B B1 C D D1 e e1 E H L α M illim eters M in. 1.40 0.40 0.35 0.35 4.40 1.35 1.50 B SC 3.00 B SC 2.29 3.75 0.80 2.60 4.25 1.20 10 ° 0.090 0.148 0.031 M ax. 1.60 0.56 0.48 0.44 4.60 1.83 M in. 0.055 0.016 0.014 0.014 0.173 0.053 Inches M ax. 0.063 0.022 0.019 0.017 0.181 0.072 0.059 BSC 0.118 B SC 0.102 0.167 0.047 10 ° Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 10 www.anpec.com.tw APL78L05/12 Physical Specifications Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. Reflow Condition TP (IR/Convection or VPR Reflow) tp Critical Zone T L to T P Ram p-up Temperature TL Tsm ax tL Tsm in Ram p-down ts Preheat 25 t 25 °C to Peak Tim e Classificatin Reflow Profiles Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classificatioon Temperature (Tp) Time within 5°C of actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly 3°C/second max. 100°C 150°C 60-120 seconds 183°C 60-150 seconds See table 1 10-30 seconds Pb-Free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds See table 2 20-40 seconds 6°C/second max. 6°C/second max. 6 minutes max. 8 minutes max. Time 25°C to Peak Temperature Notes: All temperatures refer to topside of the package .Measured on the body surface. Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 11 www.anpec.com.tw APL78L05/12 Classificatin Reflow Profiles(Cont.) Table 1. SnPb Entectic Process – Package Peak Reflow Tem peratures 3 3 P ackage Thickness Volum e m m Volum e m m < 350 ≥ 350 < 2.5 m m 240 +0/-5 ° C 225 +0/-5 ° C ≥ 2.5 m m 225 +0/-5 ° C 225 +0/-5 ° C Table 2. Pb-free Process – Package Classification Reflow Tem peratures 3 3 3 P ackage Thickness Volum e mm Volum e mm Volum e mm < 350 3 50-2000 > 2000 < 1.6 m m 260 +0 ° C* 260 +0 ° C* 260 +0 ° C* 1 .6 m m – 2.5 m m 260 +0 ° C* 250 +0 ° C* 245 +0 ° C* ≥ 2.5 m m 250 +0 ° C* 245 +0 ° C* 245 +0 ° C* * Tolerance: The device m anufacturer/supplier s hall a ssure process com patibility up to and including the stated classification tem perature (this m eans Peak reflow tem perature +0 ° C. For exam ple 260 ° C+0 ° C) at the rated MSL level. R eliability test program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245°C , 5 SEC 1000 Hrs Bias @ 125 °C 168 Hrs, 100 % RH , 121 °C -65°C ~ 150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms , Itr > 1 00mA Carrier Tape & Reel Dimensions t E Po P P1 D F W Bo Ao D1 Ko Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 12 www.anpec.com.tw APL78L05/12 Carrier Tape & Reel Dimensions(Cont.) T2 J C A B T1 Application A 330±1 B 62 ± 1.5 D SOP-8 F 5.5 ± 0.1 C 12.75 + 0.1 5 D1 J 2 + 0.5 Po T1 12.4 +0.2 P1 2.0 ± 0.1 T2 2± 0.2 Ao 6.4 ± 0.1 W 12 + 0.3 - 0.1 Bo 5.2± 0.1 P 8± 0.1 Ko E 1.75± 0.1 t 1.55±0.1 1.55+ 0.25 4.0 ± 0.1 2.1± 0.1 0.3±0.013 (mm) H2 H2 H2A H2 D2 A0 M W2 L L1 H3 H4 H W1 H1 W D T2 T T1 F1F2 P1 P P2 D1 40 205 B2 C0 A3 B1 B0 C2 C1 Box Dimensions 330 A2 A1 T3 T4 UNIT : mm Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 13 www.anpec.com.tw APL78L05/12 Carrier Tape & Reel Dimensions(Cont.) Application A 3.18~12 C2 TO-92 7.8 T1 A1 90±1 H3 A2 76±1 H4 A3 30±1 L B0 90±1 L1 2.5 MIN W 17.5~19 B1 31±1 P 12.7±0.2 W1 5.0~7.0 B2 76±1 P1 6.35±0.4 W2 0.5 MAX C0 5.8 P2 C1 3.8 T 27.0 MAX 20.0 MAX 11.0 MAX T2 T3 15 T4 1.7 50.8±0.5 0.55 MAX 1.42 MAX 0.36~0.68 (mm) Cover Tape Dimensions Application SOP- 8 TO-92 Carrier Width 12 17.5~19 Cover Tape Width 9.3 5.0~7.0 Devices Per Reel 2500 2000 Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Copyright  ANPEC Electronics Corp. Rev. A.4 - Oct., 2003 14 www.anpec.com.tw