APW7004KC-TR

APW7004 Synchronous-Rectifier PWM Controller for PentiumTM II Microprocessor Features • • • Simple Single-Loop Control Design-VoltageMode PWM Control Fast Transient Response • High-Bandwidth Error Amplifier 5-Bit Digital-to-Analog Output Voltage Selection • Wide Range from1.3VDC to 3.5VDC • 0.1V Binary Steps from 2.1VDC to 3.5VDC .05V Binary Steps from 1.3VDC to 2.05 VDC 6´ 86TM is a trademark of Cyrix Corporation AlphaTM is a trademark of Digital Equipment Corporation K6 TM is a trademark of Advanced Micro Devices, Inc. Pentium TM is a trademark of Intel Corporation PowerPC TM is a trademark of IBM General Description The APW7004 provides a complete control and multiple protection for a DC-DC converter optimized for high performance microprocessor applications. It is designed to drive two N-Channel MOSFETs in a synchronous-rectified buck topology. The APW7004 integrates output voltage control, output voltage programming, monitoring and protection functions into a single chip IC. The APW7004 includes a 5-bit digital-to-analog converter (DAC) that provides a easily adjustable and precisely output voltage from 2.1VDC to 3.5VDC in 0. 1 increments and from 1.3 VDC to 2.05 VDC in 0. 05V increments. Any selected output voltage can be maintained within ±1% accuracy over temperature and line voltage variations. With a 200kHz free-running triangle-wave oscillator and a error amplifier featuring a 15MHz unity-gain bandwidth and 6V/us slew rate inside the chip, APW7004 can implement a simple, single feedback loop, voltage-mode control topology with high transient performance. The APW7004 also features with multiple protections against over-current and over-voltage conditions by inhibiting PWM operation. The APW7004 uses the RDS(ON) of the upper MOSFET as the current sensing element which eliminates the demend for an extra component. The APW7004 also monitors the output voltage using a comparator with hysteresis that tracks the DAC output and issues a Power Good signal once the output is within ±10%. • • • VID0-4 Input Pins with Pull High Resistors Built in Power-Good Output Voltage Monitor, PGOOD Pin with an Open Collector Configuration Over-Voltage and Over-Current Fault Monitors • Uses MOSFET’s RDS(ON) as Current Sensing, No Extra Element Required • Programmable Switching Frequency Setting • 200kHz Free-Running Oscillator Applications • Power Supply for Pentium TM, Pentium ProTM, Pentium TM II,PowerPC TM, K6 TM , 6´86TM and AlphaTM Microprocessors • • High-Power 5V to 3.xV (or below) DC-DC Regulators Low-Voltage Distributed Power Supplies ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright  ANPEC Electronics Corp. Rev. P.4 - Mar., 2001 1 www.anpec.com.tw APW7004 Pin Description VSEN OCSET SS VID0 VID1 VID2 VID3 VID4 COMP FB 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 RT OVP Vcc LGATE PGND BOOT UGATE PHASE PGOOD GND Ordering Information APW7004 Handling Code Temp. Range Package Code Package Code K : SOP - 20 Temp. Range C : 0 to 70 °C Handling Code TU : Tube TR : Tape & Reel Block Diagram OVP 19 VCC 18 VSEN 1 + CP2 110% Power on Reset - DETN (Power on Reset) 12 PGOOD OCSET + CP2 90% 2 UGATE + CP2 SS 115% 3 PHASE OVP + - CP1 OC 200µA OC DETN (Power on Reset) SOFT START 15 BOOT UGATE PHASE 14 DETN, OC 13 VID0 VID1 VID2 VID3 VID4 FB 4 5 6 7 8 TTL D/A CONVERER (DAC) DAC OUT + - ERRAMP + + - CP4 DRIVER 17 10 16 LGATE PGND OSC DETN (Power on Reset) 9 20 11 GND COMP RT Copyright  ANPEC Electronics Corp. Rev. P.4 - Mar., 2001 2 www.anpec.com.tw APW7004 Absolute Maximum Ratings Symbol VCC VBOOT –VPHASE VI , VO TA TJ T STG TS Parameter Supply Voltage Boot Voltage Input , Output or I/O Voltage Operating Ambient Temperature Range Junction Temperature Range Storage Temperature Range Soldering Temperature Rating 15 15 GND - 0.3 V to VCC + 0.3 0 to 70 0 to 150 -65 to +150 300,10 seconds Unit V V V °C °C °C °C Thermal Characteristics Symbol R θJA SOP SOP (with 3in of Copper) 2 Parameter Thermal Resistance in Free Air Value 110 86 Unit °C/W Electrical Characteristics Recommended operating conditions , unless otherwise noted Symbol Parameter Test Conditions UGATE and LGATE open Vocset=4.5V Vocset=4.5V RT= Open RT= Open 185 APW7004 Min. Typ. Max. 3 9.0 8.8 200 2 215 Unit mA V V kHz VP-P V V % dB MHz V/µs VCC Supply Current ICC Nominal Supply Power-on Reset Rising VCC Threshold Falling VCC Threshold Oscillator Free Running Frequency ∆VOSC Ramp Amplitude Reference and DAC DAC(VID0-VID4) Input Low Voltage DAC(VID0-VID4) Input High Voltage DACOUT Voltage accuracy Error Amplifier DC Gain GBW Gain-Bandwidth Product SR Slew Rate 0.8 3.0 -1.0 88 15 6 +1.0 COMP=20pF Copyright  ANPEC Electronics Corp. Rev. P.4 - Mar., 2001 3 www.anpec.com.tw APW7004 Electrical Characteristics CONT. Symbol Gate Drivers RUG, SOURCE Upper Gate Source RUG, SINK Upper Gate Sink RLG, SOURCE Lower Gate Source RLG, SINK Lower Gate Sink Protection Over-Voltage Trip (VSEN /DACOUT) IOCSET IOVP ISS OCSET Current Source OVP Souring Current Soft Start Current Upper Threshold (VSEN /DACOUT) VSEN Rising VOCSET=4.5VDC VSEN =5.5V ,VOVP=0V 170 115 200 30 10 110 90 2 0.5 120 230 % µA mA µA % % % V VBOOT-VPHASE =12V VBOOT-VPHASE =12V VCC=12V VCC=12V 8.3 5 8.3 5 Ω Ω Ω Ω Parameter Test Conditions APW7004 Min. Typ. Max. Unit Power Good Lower Threshold (VSEN /DACOUT) VSEN Rising Upper and Lower Hysteresis (VSEN /DACOUT) Threshold PGOOD Voltage Low IPGOOD= -5mA VPGOOD Pin Function Description VSEN (pin 1) Connect this pin to the converter’s voltage output. The PGOOD and OVP comparator circuits monitor output voltage status and act over voltage protection by using this signal. OCSET(pin 2) Connect a resistor(ROCSET) from this pin to the drain of the upper MOSFET. An internal 200mA current source (IOCS), ROCSET, and the upper MOSFET’s onresistance (RDS(ON)) set the converter over-current (OC) trip point according to the following equation: IPEAK= IOCS´ ROCSET /RDS(ON) An over-current trip resets the soft-start function. SS (Pin 3) Connect a capacitor from this pin to ground. This capacitor, along with an internal 10mA current source, Copyright  ANPEC Electronics Corp. Rev. P.4 - Mar., 2001 4 sets the soft-start interval of the converter. VID0-4 (Pins 4-8) VID0-4 are the input pins to the 5-bit DAC. The states of these five pins decide the internal voltage reference (DACOUT). The level of DACOUT sets the converter output voltage and also sets the PGOOD and OVP thresholds. Table 1 specifies DACOUT for the 32 combinations of DAC inputs. COMP (pin 9) and FB (pin 10) COMP and FB are the accessiable pins of the error amplifier. FB pin is the inverting input of the error amplifier and COMP pin is output of the error amplifier. These pins provide the compensation for the voltage-control feedback loop of the converter. GND (Pin 11) GND is signal ground of the IC. All voltage levels are measured with respect to this pin. www.anpec.com.tw APW7004 Electrical Characteristics Cont. PGOOD (PIin 12) PGOOD is an open collector output used to indicate the status of the converter output voltage. This pin is pulled low when the converter output is not within ±10% of the DACOUT reference voltage. The PGOOD pin is floating when no CPU exists. PHASE (pin 13) RT (pin 20) Connect the PHASE pin to the source of the upper MOSFET. This pin is used to monitor the voltage drop across the upper MOSFET for over-current protection. RT pin provides oscillator switching frequency adujstment. By connecting a resistor (RT) from this pin to GND, the nominal 200kHz switching frequency is increased. Conversely. connecting a pull-up resistor (RT) from this pin to VCC reduces the switching frequency. OVP (pin 19) OVP pin reports the event of an over-voltage condition . Converter output rising 15% more than the DACset voltage triggers a high output on this pin with a typical 30mA sourcing capability which can be used to drive an external device and disables PWM gate drive circuitry. UGATE (pin 14) Connect UGATE to the upper MOSFET gate. This pin enables the gate drive signal to drive the upper MOSFET . BOOT (pin 15) BOOT pin provides bias voltage to the upper MOSFET gate driver. A bootstrap circuit could be used to pump a BOOT voltage for enforcing the driving capability of the gate driver and improving the performance of the upper MOSFET. PGND(pin 16) PGND pin provides the power ground connection. Connect this pin to the source of the lower MOSFET. LGATE (pin 17) Connect LGATE to the lower MOSFET gate. This pin enables the gate drive signal to drive the lower MOSFET. VCC (pin 18) Connect VCC to 12V voltage supply. This pin supplies the bias for the chip. Copyright  ANPEC Electronics Corp. Rev. P.4 - Mar., 2001 5 www.anpec.com.tw APW7004 Table 1 Output Voltage Program Pin Name VID4 VID3 VID2 VID1 VID0 Nominal Output Voltage Dacout VID4 Pin Name VID3 VID2 VID1 VID0 Nominal Output Voltage Dacout 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1.3 1.35 1.4 1.45 1.5 1.55 1.6 1.65 1.7 1.75 1.8 1.85 1.90 1.95 2.00 2.05 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 Application Schematic VIN = +5V +12V VCC OVP APW7004 PGOOD SS MONITOR AND PROTECTION OCSET BOOT RT OSC UGATE VID0 VID1 VID2 VID3 VID4 FB PHASE D/A VOUT + + - LGATE PGND COMP VSEN GND Copyright  ANPEC Electronics Corp. Rev. P.4 - Mar., 2001 6 www.anpec.com.tw APW7004 Packaging Information SO – 300mil ( Reference JEDEC Registration MS-013) D N H E GAUGE PLANE 1 2 3 A e B A1 L 1 Millimeters Dim A A1 B D E e H L N φ1 Min. 2.35 0.10 0.33 7.40 10 0.40 0° Max. 2.65 0.30 0.51 7.60 10.65 1.27 8° Variations- D Variations SO-16 SO-18 SO-20 SO-24 SO-28 SO-14 Min. 10.10 11.35 12.60 15.20 17.70 8.80 Max. Dim 10.50 11.76 13 15.60 18.11 9.20 A A1 B D E e H L N φ1 Inches Min. Max. 0.093 0.1043 0.004 0.0120 0.013 0.020 See variations 0.2914 0.2992 0.050BSC 0.394 0.016 0° 0.419 0.050 8° Variations- D Variations SO-16 SO-18 SO-20 SO-24 SO-28 SO-14 Min. Max. 0.398 0.413 0.447 0.463 0.496 0.512 0.599 0.614 0.697 0.713 0.347 0.362 See variations 1.27BSC See variations See variations Copyright  ANPEC Electronics Corp. Rev. P.4 - Mar., 2001 7 www.anpec.com.tw APW7004 Physical Specifications Terminal Material Lead Solderability Packaging Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb) Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. 1000 devices per reel Reflow Condition (IR/Convection or VPR Reflow) Reference JEDEC Standard J-STD-020A APRIL 1999 temperature Peak temperature 183°C Pre-heat temperature Time Classification Reflow Profiles Convection or IR/ Convection Average ramp-up rate(183°C to Peak) 3°C/second max. 120 seconds max Preheat temperature 125 ± 25°C) 60 – 150 seconds Temperature maintained above 183°C Time within 5°C of actual peak temperature 10 –20 seconds Peak temperature range 220 +5/-0°C or 235 +5/-0°C Ramp-down rate 6 °C /second max. 6 minutes max. Time 25°C to peak temperature VPR 10 °C /second max. 60 seconds 215-219°C or 235 +5/-0°C 10 °C /second max. Package Reflow Conditions pkg. thickness ≥ 2.5mm and all bgas Convection 220 +5/-0 °C VPR 215-219 °C IR/Convection 220 +5/-0 °C pkg. thickness < 2.5mm and pkg. volume ≥ 350 mm³ pkg. thickness < 2.5mm and pkg. volume < 350mm³ Convection 235 +5/-0 °C VPR 235 +5/-0 °C IR/Convection 235 +5/-0 °C www.anpec.com.tw Copyright  ANPEC Electronics Corp. Rev. P.4 - Mar., 2001 8 APW7004 Reliability test program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245°C , 5 SEC 1000 Hrs Bias @ 125 °C 168 Hrs, 100 % RH , 121 °C -65°C ~ 150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms , Itr > 1 00mA Carrier Tape & Reel Dimensions t P P1 D Po E F W Bo Ao Ko D1 T2 J C A B T1 Application SOP-20 A 330 ±1 B C J T1 62 ± 1.5 12.75 ±0.15 2 + 0.6 24.4 +0.2 T2 2± 0.2 W 24 + 0.3 - 0.1 Bo 13± 0.1 P 12± 0.1 E 1.75± 0.1 F D Application SOP-20 11.5 ± 0.1 1.5+0.1 D1 Po P1 Ao 1.5+0.25 4.0 ± 0.1 2.0 ± 0.1 8.2 ± 0.1 Ko t 2.5 ± 0.1 0.35 ±0.013 (mm) Copyright  ANPEC Electronics Corp. Rev. P.4 - Mar., 2001 9 www.anpec.com.tw APW7004 Cover Tape Dimensions Carrier Width Cover Tape Width 24 21.3 (mm) Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Copyright  ANPEC Electronics Corp. Rev. P.4 - Mar., 2001 10 www.anpec.com.tw