APW7035BKC-TR

APW7035 Advanced PWM and Linear Power Control Features • 2 Regulated Voltage are provided General Description The APW7035 integrates PWM controller and linear controller , as well as the monitoring and protection functions into a single package , which provides two controlled power outputs with over-voltage and overcurrent protections. The PWM controller regulates the DDR reference voltage (1.25V) or GPU Voltage (2.05V) with a synchronous-rectified buck converter. The linear controller regulates power for Memory Voltage. The precision reference and voltage-mode PWM control provide ±1% static regulation. The linear controller drives an external N-channel MOSFET to provide adjustable voltage. The APW7035 monitors all the output voltages , and a single Power Good signal is issued when the PWM Voltage is within ±10% of the DAC setting and the Linear regulator output levels are above their undervoltage thresholds. Additional built-in over-voltage protection for the PWM output uses the lower MOSFET to prevent output voltages above 115% of the DAC setting. The PWM over-current function monitors the output current by using the voltage drop across the upper MOSFET’s RDS(ON) , eliminating the need for a current sensing resistor. The APW7035A/B/C/D support a TTL 3-input Digital to Analog converter that adjusts the synchronousrectified buck converter output from 1.00V to 3.20V , reference to Table1. − Switching Power for Fixed Voltage (1.25V / 2.05V) or Adjustable Voltage − Linear Regulator for FBVDDQ(2.5V) • • Simple Single-Loop Control Design − Voltage-Mode PWM Control Excellent Output Voltage Regulation − PWM Output : ±1% − Linear Output : ±3% • Fast Transient Response − High-Bandwidth Error Amplifier − Full 0% to 100% Duty Ratio • • • Power-Good Output Voltage Monitor Over-Voltage and Over-Current Fault Monitors Small Converter Size − Constant Frequency Operation(200kHz) − Reduce External Component Count Applications • • • • Motherboard Power Regulation for Computers Low-Voltage Distributed Power Supplies VGA Card Power Regulation Termination Voltage ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright  ANPEC Electronics Corp. Rev. A.4 - Jul., 2001 1 www.anpec.com.tw APW7035 Pin Description VCC DRIVE NC NC PGOOD SD VSEN2 SS NC VAUX 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 UGATE PHASE LGATE PGND OCSET VSEN1 FB COMP NC GND VCC DRIVE VID2 VID1 VID0 SD VSEN2 SS NC VAUX 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 UGATE PHASE LGATE PGND OCSET VSEN1 FB COMP NC GND APW7035-12/19 APW7035A/B/C/D Ordering Information A P W 703 5 L ea d F re e C o de H a nd ling C od e T e m p . R an ge P a c ka ge C od e V o ltag e C o de V o ltag e C o de 12 : 1.2 5V 2 0 : 2.05 V A : 1 .0 0V ~1 .35 V B : 1 .40 V ~ 1.75 V C : 1 .8 0V ~2 .40 V D : 2 .5 0V ~3 .20 V P a c ka ge C od e K : S O P -2 0 T e m p . R an ge C : 0 to 70 ° C H a nd ling C od e T U : T u be T R : T ap e & R ee l L ea d F re e C o de L : L ea d F re e D evice B lan k : O rigina l D evice Block Diagram VSEN2 VAUX VSEN1 OCSET VCC ´1 .10 + ´0 .75 + 1.5V ´1 .15 + INHIBIT SOFT START & FAULT LOGIC V CC + 2 8m A SS DAC ERROR AMP1 + PWM COMP1 PWM1 4.5V + V DAC DRIVE + + 2 0 0m A Power-on Reset (POR) VAUX ´0 .90 + - PGOOD VCC OV OC1 UGATE + INHIBIT GATE CONTROL PHASE SD V CC LGATE PGND GND DAC + OSCILLATOR SYNCH DRIVE VID0 VID1 VID2 FB COMP Copyright  ANPEC Electronics Corp. Rev. A.4 - Jul., 2001 2 www.anpec.com.tw APW7035 Absolute Maximum Ratings Symbol VCC VI , VO TA TJ TSTG TS Supply Voltage Input , Output or I/O Voltage Operating Ambient Temperature Range Junction Temperature Range Storage Temperature Range Soldering Temperature Parameter Rating 15 GND -0.3 V to VCC +0.3 0 to 70 0 to 125 -65 to +150 300 ,10 seconds Unit V V °C °C °C °C Thermal Characteristics Symbol R θJA Parameter Thermal Resistance in Free Air SOIC SOIC (with 3in2 of Copper) Value 75 65 Unit °C/W Electrical Characteristics (Recommended operating conditions , Unless otherwise noted) Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic. APW7035 Min. Typ. Max. 9 Unit Symbol VCC Supply Current ICC Parameter Test Conditions UGATE, LGATE, DRIVE open Vocset=4.5V Vocset=4.5V Vocset=4.5V Vocset=4.5V Nominal Supply Current mA Power-on Reset Rising VCC Threshold Falling VCC Threshold Rising VAUX Threshold VAUX Threshold Hysteresis Rising VOCSET Threshold Oscillator FOCS ∆VOSC Free Running Frequency Ramp Amplitude RT= Open RT= Open 185 200 1.9 215 kHz VP-P 10.7 8.2 2.5 0.5 1.26 V V V V V Copyright  ANPEC Electronics Corp. Rev. A.4 - Jul., 2001 3 www.anpec.com.tw APW7035 Electrical Characteristics Cont. (Recommended operating conditions , Unless otherwise noted) Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic. APW7035 Min. Typ. Max. -1.0 1.265 -2.5 3 40 88 15 6 1 3.5 1 3 115 170 200 28 109 93 2 0.8 120 230 +2.5 +1.0 Unit Symbol Parameter Test Conditions DAC and Bandgap Reference VDAC DACOUT Voltage accuracy VBG Bandgap Reference Voltage Bandgap Reference Tolerance Linear Regulators Regulation Output Drive Current VAUX-VDRIVE >0.6V Synchronous PWM Controller Error Amplifier DC Gain GBWP Gain-Bandwidth Product SR Slew Rate COMP=10pF PWM Controller Gate Driver IUGATE UGATE Source VCC=12V, VUGATE =6V RUGATE UGATE Sink VUGATE1-PHASE =1V ILGATE LGATE Source VCC=12V, VLGATE =1V RLGATE LGATE Sink VLGATE= 1V Protection VSEN1 Over-Voltage VSEN1 Rising Protection IOCSET OCSET Current Source VOCSET= 4.5VDC ISS Soft Start Current Power Good VSEN1 Upper Threshold VSEN1 Rising VSEN1 Under Voltage VSEN1 Rising VSEN1 Hysteresis Upper /Lower Threshold VPGOOD PGOOD Voltage Low IPGOOD= -4mA % V % % mA dB MHz V/µs A Ω A Ω % µA µA % % % V 20 Functional Pin Description VCC (Pin 1) Provide a 12V bias supply for the IC to this pin. This pin also provides the gate bias charge for all the MOSFETs controlled by the IC. The voltage at this pin is monitored for Power-On Reset (POR) purposes. DRIVE (Pin 2) Connect this pin to the gate of an external MOSFET. This pin provides the drive for the FBVDDQ regulator’s pass transistor. Copyright  ANPEC Electronics Corp. Rev. A.4 - Jul., 2001 4 www.anpec.com.tw APW7035 Functional Pin Description cont. NC (Pin 3, Pin 4 and Pin 5) No Connect. (APW7035-12,19) PGOOD (Pin 5) PGOOD is an open drain output used to indicate the status of the output voltages. This pin is pulled low when the synchronous regulator output is not within ±10% of the DAC reference voltage or Linear regulator outputs are below under-voltage thresholds. (APW7035-A,B,C,D) VID2 , VID1 , VID0 (Pin 3,4 and 5) VID0-2 are the TTL-compatible input pins to the 3-bit DAC. The logic states of these three pins program the internal voltage reference (DAC). The level of DAC sets the microprocessor core converter output voltage , as well as the corresponding PGOOD and OVP thresholds. (APW7035-A,B,C,D) SD (Pin 6) The pin shuts down all the outputs. A TLL-compatible , logic lebel high signal applied at this pin immediately discharges the soft-start capacitor , disbling all the output. VSEN2 (Pin 7) Connect this pin to a resistor divider to set the linear regulator (FBVDDQ) output voltage. SS (Pin 8) Connect a capacitor from this pin to ground. This capacitor , along with an internal 28µA current source , sets the soft-start interval of the converter. NC (Pin 9 and Pin12) No Connection. VAUX (Pin 10) This pin provides boost current for the linear regulator’s output drives in the event bipolar NPN transistors Copyright  ANPEC Electronics Corp. Rev. A.4 - Jul., 2001 5 (instead of N-channel MOSFETs) are employed as pass elements. The voltage at this pin is monitored for power-on reset purposes. GND (Pin 11) Signal ground for the IC. All voltage levels are measured with respect to this pin. FB and COMP (Pin 13, and 14) COMP and FB are the available external pins of the PWM converter error amplifier. The FB pin is the inverting input of the error amplifier. Similarly , the COMP pin is the error amplifier output. These pins are used to compensate the voltage-mode control feedback loop of the synchronous PWM converter. VSEN1 (Pin 15) This pin is connected to the PWM converter’s output voltage. The PGOOD and OVP comparator circuits use this signal to report output voltage status and for over- voltage protection. OCSET (Pin 16) Connect a resistor from this pin to the drain of the respective upper MOSFET. This resistor , an internal 200µA current source , and the upper MOSFET’s on-resistance set the converter over-current trip point. An over-current trip cycles the soft-start function. The voltage at this pin is monitored for power-on reset (POR) purposes and pulling this pin low with an open drain device will shutdown the IC. PGND (Pin 17) This is the power ground connection. Tie the synchronous PWM converter’s lower MOSFET source to this pin. LGATE (Pin 18) Connect LGATE to the PWM converter ’ s lower MOSFET gate. This pin provides the gate drive for the lower MOSFET. www.anpec.com.tw APW7035 Functional Pin Description cont. PHASE (Pin 19) Connect the PHASE pin to the PWM converter’s upper MOSFET source. This pin represents the gate drive return current path and is used to monitor the voltage drop across the upper MOSFET for over-current protection. UGATE (Pin 20) Connect UGATE pin to the PWM converter’s upper MOSFET gate. This pin provides the gate drive for the upper MOSFET. Table1 Output Voltage Program VID2 0 0 0 0 1 1 1 1 VID2 0 0 0 0 1 1 1 1 VID1 0 0 1 1 0 0 1 1 VID1 0 0 1 1 0 0 1 1 VID0 0 1 0 1 0 1 0 1 VID0 0 1 0 1 0 1 0 1 APW7035-A 1.35V 1.30V 1.25V 1.20V 1.15V 1.10V 1.05V 1.00V APW7035-C 2.40V 2.30V 2.20V 2.10V 2.00V 1.90V 1.80V 0 VID2 0 0 0 0 1 1 1 1 VID2 0 0 0 0 1 1 1 1 VID1 0 0 1 1 0 0 1 1 VID1 0 0 1 1 0 0 1 1 VID0 0 1 0 1 0 1 0 1 VID0 0 1 0 1 0 1 0 1 APW7035-B 1.75V 1.70V 1.65V 1.60V 1.55V 1.50V 1.45V 1.40V APW7035-D 3.20V 3.10V 3.00V 2.90V 2.80V 2.70V 2.60V 2.50V Simplified Power System Diagram 3.3 V IN Q1 Linear Controller PWM1 Controller Q2 V OUT1 5 .0V IN Q3 V OUT2 APW7035 Copyright  ANPEC Electronics Corp. Rev. A.4 - Jul., 2001 6 www.anpec.com.tw APW7035 Typical Application Circuit 12V R1 10 1 C1 1uF 6 VCC OCSET SD PGOOD 16 5 C2 220pF L1 5.0V C3 330uF R4 1.2K C4 10uF UGATE 20 R5 5.1 19 Q2A APM7313 L2 2.05V APW7035-12 PHASE 3.3V 10 Q1 APM3055L 2 VAUX LGATE 18 R6 5.1 Q2B APM7313 R7 64 C5 330uF C6 330uF C10 330uF PGND DRIVE VENS1 17 15 14 C7 10pF 13 R9 3K R8 100 2.5V R2 66.7 7 VENS1 FB C11 330uF R3 100 8 SS GND COMP C9 0.1uF 11 C8 2700pF R10 150K Copyright  ANPEC Electronics Corp. Rev. A.4 - Jul., 2001 7 www.anpec.com.tw APW7035 Package Information SO – 300mil ( Reference JEDEC Registration MS-013) D h*45 C H E GAUGE PLANE 1 2 3 A e B A1 L 1 Dim A A1 B C D E e H h L φ1 Millimeters Min. 2.35 0.10 0.33 0.23 Max. 2.65 0.30 0.51 0.32 Variations Variations SO-20 SO-24 SO-28 Min. 12.60 15.20 17.70 Max. 13.0 15.60 18.11 Dim A A1 B C D E e H h L φ1 Inches Min. 0.093 0.004 0.013 Max. 0.1043 0.0120 0.020 Variations Variations SO-20 SO-24 SO-28 Min. 0.496 0.599 0.697 Max. 0.512 0.614 0.713 0.0091 0.0125 See variations 0.2914 0.2992 0.050BSC 0.394 0.010 0.016 0° 0.419 0.029 0.050 8° See variations 7.40 7.60 1.27BSC 10 10.65 0.25 0.40 0° 0.75 1.27 8° Copyright  ANPEC Electronics Corp. Rev. A.4 - Jul., 2001 8 www.anpec.com.tw APW7035 Physical Specifications Terminal Material Lead Solderability Packaging Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb) Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. 1000 devices per reel Reflow Condition TP (IR/Convection or VPR Reflow) tp C ritical Zone T L to T P R am p-up T e m p e ra tu re TL T sm ax tL T sm in R am p-down ts Preheat 25 t 25 °C to Peak Classificatin Reflow Profiles Profile Feature T im e Pb-Free Assembly Large Body Small Body 3°C/second max. 150°C 200°C 60-180 seconds 3°C/second max 217°C 60-150 seconds 245 +0/-5°C 250 +0/-5°C 10-30 seconds 20-40 seconds 6°C/second max. 8 minutes max. www.anpec.com.tw Sn-Pb Eutectic Assembly Large Body Small Body Average ramp-up rate 3°C/second max. (TL to TP) Preheat - Temperature Min (Tsmin) 100°C - Temperature Mix (Tsmax) 150°C - Time (min to max)(ts) 60-120 seconds Tsmax to TL - Ramp-up Rate Tsmax to TL - Temperature(TL) 183°C - Time (tL) 60-150 seconds Peak Temperature(Tp) 225 +0/-5°C 240 +0/-5°C Time within 5°C of actual Peak 10-30 seconds 10-30 seconds Temperature(tp) Ramp-down Rate 6°C/second max. 6 minutes max. Time 25°C to Peak Temperature Copyright  ANPEC Electronics Corp. Rev. A.4 - Jul., 2001 9 Note: All temperatures refer to topside of the package. Measured on the body surface. APW7035 Reliability test program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245°C , 5 SEC 1000 Hrs Bias @ 125 °C 168 Hrs, 100 % RH , 121°C -65°C ~ 150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms , Itr > 100mA Tape & Reel Dimensions t Po P P1 D E F W Bo Ao Ko D1 T2 J C A B T1 Application SOP-20 Application SOP-20 A 330±1 F 11.5 ± 0.1 B 62 ± 1.5 D 1.5+0.1 C 12.75 ±0.15 D1 1.5+0.25 J 2 + 0.6 Po 4.0 ± 0.1 T1 24.4 +0.2 P1 2.0 ± 0.1 T2 2± 0.2 Ao 8.2 ± 0.1 W 24 + 0.3 - 0.1 Bo 13± 0.1 P 12± 0.1 Ko E 1.75± 0.1 t 2.5± 0.1 0.35±0.013 (mm) Copyright  ANPEC Electronics Corp. Rev. A.4 - Jul., 2001 10 www.anpec.com.tw APW7035 Cover Tape Dimensions Application SOP- 20 Carrier Width 24 Cover Tape Width 21.3 Devices Per Reel 1000 Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Copyright  ANPEC Electronics Corp. Rev. A.4 - Jul., 2001 11 www.anpec.com.tw