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APW7080KAI-TRG

APW7080KAI-TRG

  • 厂商:

    ANPEC(茂达电子)

  • 封装:

    SOIC8_150MIL_EP

  • 描述:

    4A,26V,380kHz,异步降压转换器

  • 数据手册
  • 价格&库存
APW7080KAI-TRG 数据手册
APW7080 4A, 26V, 380kHz, Asynchronous Step-Down Converter Features • • • • • • • • • • • • • • • Wide Input Voltage from 4.5V to 26V Output Current up to 4A Adjustable Output Voltage from 0.8V to 90%VIN - 0.8V Reference Voltage - ±2.5% System Accuracy 80mΩ Integrated P-Channel Power MOSFET High Efficiency up to 91% - Pulse-Skipping Mode (PSM) / PWM Mode Operation Current-Mode Operation - Stable with Ceramic Output Capacitors - Fast Transient Response Power-On-Reset Monitoring Fixed 380kHz Switching Frequency in PWM Mode Built-in Digital Soft-Start Output Current-Limit Protection with Frequency Foldback 70% Undervoltage Protection Over-Temperature Protection 100ns < 100ns VIN > 6.2V VIN ≤ 6.2V -2 ~ VIN+0.3 -5 ~ VIN+6 -0.3 ~ 6.5 < VIN+0.3 -0.3 ~ VIN+0.3 -0.3 ~ 6.5V -0.3 ~ 20 -0.3 ~ VCC +0.3 150 -65 ~ 150 260 Unit V V VCC VUGND_GND VVIN_UGND VCC Supply Voltage (VCC to GND) UGND to GND Voltage VIN to UGND Voltage EN to GND Voltage FB, COMP to GND Voltage Maximum Junction Temperature V V V V V ° C ° C ° C TSTG TSDR Storage Temperature Maximum Lead Soldering Temperature, 10 Seconds Note 1: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 2 www.anpec.com.tw APW7080 Thermal Characteristics Symbol θJA θJC Parameter Junction-to-Ambient Resistance in Free Air (Note 2) o Typical Value SOP-8P 50 10 Unit C/W C/W Junction-to-Case Resistance in Free Air (Note 3) SOP-8P o Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. The exposed pad of SOP-8P is soldered directly on the PCB. Note 3: The case temperature is measured at the center of the exposed pad on the underside of the SOP-8P package. Recommended Operating Conditions Symbol VIN VOUT IOUT VIN Supply Voltage VCC Supply Voltage Converter Output Voltage Converter Output Current VCC Input Capacitor VIN-to-UGND Input Capacitor TA TJ Ambient Temperature Junction Temperature Parameter (Note 4) Range 4.5 ~ 26 4.0 ~ 5.5 0.8 ~ 90% VIN 0~4 0.22 ~ 2.2 0.22 ~ 2.2 -40 ~ 85 -40 ~ 125 Unit V V V A µF µF o C C o Note 4: Refer to the typical application circuits Electrical Characteristics Refer to the typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V and TA= -40 ~ 85oC, unless otherwise specified. VCC is regulated by an internal regulator. Typical values are at TA=25oC. Symbol SUPPLY CURRENT IVIN IVIN_SD IVCC IVCC_SD VIN Supply Current VIN Shutdown Supply Current VCC Supply Current VCC Shutdown Supply Current VFB = 0.85V, VEN=3V, LX=Open VEN = 0V, VIN=26V VEN = 3V, VCC = 5.0V, VFB=0.85V VEN = 0V, VCC = 5.0V VIN = 5.2 ~ 26V, IO = 0 ~ 8mA IO = 0 ~ 8mA VCC > POR Threshold VIN = 6.2 ~ 26V, IO = 0 ~ 10mA IO = 0 ~ 10mA VIN = 6.2 ~ 26V 1.0 0.7 2.0 5 1 mA µA mA µA V mV mA Parameter Test Conditions APW7080 Min. Typ. Max. Unit VCC 4.2V LINEAR REGULATOR Output Voltage Load Regulation Current-Limit VIN-to-UGND 5.5V LINEAR REGULATOR Output Voltage (VVIN-UGND) Load Regulation Current-Limit 5.3 -80 10 5.5 -60 5.7 0 30 V mV mA 4.0 -60 8 4.2 -40 4.5 0 30 C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 3 www.anpec.com.tw APW7080 Electrical Characteristics (Cont.) Refer to the typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V and TA= -40 ~ 85oC, unless otherwise specified. VCC is regulated by an internal regulator. Typical values are at TA=25oC. Symbol Parameter Test Conditions APW7080 Min. Typ. Max. Unit POWER-ON-RESET (POR) AND LOCKOUT VOLTAGE THRESHOLDS VCC POR Voltage Threshold VCC POR Hysteresis EN Lockout Voltage Threshold EN Lockout Hysteresis VIN-to-UGND Lockout Voltage Threshold VIN-to-UGND Lockout Hysteresis REFERENCE VOLTAGE VREF Reference Voltage TJ = 25oC, IOUT=0A, VIN=12V Output Voltage Accuracy Line Regulation Load Regulation OSCILLATOR AND DUTY FOSC Free Running Frequency Foldback Frequency Maximum Converter’ Duty Cycle s Minimum Pulse Width of LX CURRENT-MODE PWM CONVERTER Gm Error Amplifier Transconductance Error Amplifier DC Gain Current-Sense Resistance P-channel Power MOSFET Resistance PROTECTIONS ILIM VUV P-channel Power MOSFET Current-limit FB Under-Voltage Threshold FB Under-Voltage Hysteresis FB Under-Voltage Debounce TOTP Over-Temperature Trip Point Over-Temperature Hysteresis SOFT-START, ENABLE AND INPUT CURRENTS tSS Soft-Start Interval Preceding Delay before Soft-Start EN Shutdown Voltage Threshold EN Enable Voltage Threshold EN Pin Clamped Voltage VEN falling, VIN = 4 ~ 26V VEN rising, VIN = 4 ~ 26V IEN=10mA 9 9 0.5 12 10.8 10.8 12 12 2.1 17 ms ms V V V Peak Current VFB falling 5.0 66 6.5 70 40 2 150 50 8.0 74 A % mV µs o o VCC rising VEN rising 3.7 2.3 - 3.9 0.15 2.5 0.2 3.5 0.2 4.1 2.7 - V V V V V V VVIN-UGND rising - -1.0 -2.5 TJ = -40 ~ 125oC, IOUT = 0 ~ 4A, VIN = 4.5 ~ 26V VIN = 4.5V to 26V, IOUT = 0A IOUT = 0 ~ 4A VIN = 4.5 ~ 26V VFB = 0V VIN = 4.5 ~ 26V 0.8 0.36 0.4 +1.0 +2.5 - V % % % 340 - 380 80 93 200 420 - kHz kHz % ns µA/V dB Ω mΩ COMP = Open 60 Between VIN and Exposed Pad, TJ=25oC - 400 80 0.12 80 100 C C C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 4 www.anpec.com.tw APW7080 Electrical Characteristics (Cont.) Refer to the typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V and TA= -40 ~ 85oC, unless otherwise specified. VCC is regulated by an internal regulator. Typical values are at TA=25oC. Symbol Parameter Test Conditions APW7080 Min. Typ. Max. Unit SOFT-START, ENABLE, AND INPUT CURRENTS (Cont.) P-channel Power MOSFET Leakage Current IFB IEN FB Pin Input Current EN Pin Input Current VEN = 0V, VLX = 0V, VIN = 26V VFB = 0.8V VEN < 3V -100 -500 4 +100 +500 µA nA nA C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 5 www.anpec.com.tw APW7080 Typical Operating Characteristics Reference Voltage vs. Junction Temperature 0.816 Switching Frequency vs. Junction Temperature 420 Switching Frequency, FOSC (kHz) -50 -25 0 25 50 75 100 o 0.812 410 400 390 380 370 360 350 340 Reference Voltage, VREF (V) 0.808 0.804 0.800 0.796 0.792 0.788 0.784 125 150 -50 -25 0 25 50 75 100 o 125 150 Junction Temperature, TJ ( C) Junction Temperature, TJ ( C) Output Voltage vs. Supply Voltage 3.36 3.35 3.34 I OUT = 1A Output Voltage vs. Output Current 3.36 3.35 3.34 VIN = 12V Output Voltage, VOUT (V) 3.33 3.32 3.31 3.30 3.29 3.28 3.27 3.26 3.25 3.24 4 6 8 10 12 14 16 18 20 22 24 26 Output Voltage, VOUT (V) 3.33 3.32 3.31 3.30 3.29 3.28 3.27 3.26 3.25 3.24 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Supply Voltage, VIN (V) Output Current, IOUT (A) VIN Input Current vs. Supply Voltage 1.6 1.4 VFB =0.85V Current-Limit Level (Peak Current) vs. Junction Temperature 8.0 7.5 7.0 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 4 8 12 16 20 24 28 Current-Limit Level, ILIM (A) VIN Input Current, IVIN (mA) 6.5 6.0 5.5 5.0 -50 -25 0 25 50 75 100 125 150 VIN Supply Voltage, VIN (V) C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 6 Junction Temperature, TJ (oC) www.anpec.com.tw APW7080 Typical Operating Characteristics (Cont.) Efficiency vs. Output Current 100 90 80 VOUT =5V VOUT=5V VOUT=3.3V EN Clamp Voltage vs. EN Input Current 18 16 EN Clamp Voltage, VEN (V) 14 12 10 8 6 4 2 0 1 10 100 1000 10000 TJ =-30oC Efficiency (%) 70 60 50 40 30 20 10 0.001 TJ =25oC TJ =100oC VIN=12v, L=10µH (DCR=50mΩ) C1=10µF, C4=22µF 0.01 0.1 1 10 Output Current, IOUT (A) EN Input Current, IEN (µA) Operating Waveforms (Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=10µH) Load Transient Response I OUT = 50mA -> 3A -> 50mA I OUT rise/f all time=10µ s Load Transient Response I OUT = 0.5A -> 3A -> 0.5A I OUT rise/f all time=10µ s 1 VOUT 1 VOUT 3A 3A IL1 IL1 2 0A 2 0.5A Ch1 : VOUT, 200mV/Div, DC, Voltage Offset = 3.3V Ch2 : IL1, 1A/Div, DC Time : 50µs/Div Ch1 : VOUT, 100mV/Div, DC, Voltage Offset = 3.3V Ch2 : IL1, 1A/Div, DC Time : 50µs/Div C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 7 www.anpec.com.tw APW7080 Operating Waveforms (Cont.) (Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=10µH) Power On I OUT = 3A Power Off I OUT = 3A 1 VIN VIN 1 VOUT VOUT 2 2 3 IL1 3 IL1 Ch1 : VIN, 5V/Div, DC Ch2 : VOUT, 2V/Div, DC Ch3 : IL1, 2A/Div, DC Time : 5ms/Div Ch1 : VIN, 5V/Div, DC Ch2 : VOUT, 2V/Div, DC Ch3 : IL1, 2A/Div, DC Time : 5ms/Div Enable Through EN Pin I OUT = 3A Shutdown Through EN Pin I OUT = 3A 1 VEN 1 VEN VOUT VOUT 2 2 3 IL1 3 IL1 Ch1 : VEN, 5V/Div, DC Ch2 : VOUT, 2V/Div, DC Ch3 : IL1, 2A/Div, DC Time : 5ms/Div Ch1 : VEN, 5V/Div, DC Ch2 : VOUT, 2V/Div, DC Ch3 : IL1, 2A/Div, DC Time : 5ms/Div C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 8 www.anpec.com.tw APW7080 Operating Waveforms (Cont.) (Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=10µH) Over Current I OUT = 1 -> 6A Short Circuit VOUT is shorted to ground by a short wire VOUT 1 VOUT 1 I L1 IL1 2 2 Ch1 : VOUT, 1V/Div, DC Ch2 : IL1, 2A/Div, DC Time : 50µs/Div Ch1 : VOUT, 1V/Div, DC Ch2 : IL1, 2A/Div, DC Time : 50ms/Div Switching Waveform I OUT = 0.2A 3A Switching Waveform I OUT = 3A VLX VLX 1 1 IL1 IL1 2 2 Ch1 : VLX, 5V/Div, DC Ch2 : IL1, 1A/Div, DC Time : 1.25µs/Div Ch1 : VLX, 5V/Div, DC Ch2 : IL1, 2A/Div, DC Time : 1.25µs/Div C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 9 www.anpec.com.tw APW7080 Operating Waveforms (Cont.) (Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=10µH) Line Transient Response VIN = 12V --> 24V --> 24V VIN rise/f all time=20µ s VOUT 1 VIN 24V 2 12V Ch1 : VOUT, 50mV/Div, DC, Voltage Offset = 3.3V Ch2 : VIN, 5V/Div, DC, Voltage Offset = 12V Time : 50µs/Div Pin Description PIN 1 NAME VIN FUNCTION Power Input. VIN supplies the power (4.5V to 26V) to the control circuitry, gate driver and step-down converter switch. Connecting a ceramic bypass capacitor and a suitably large capacitor between VIN and GND eliminates switching noise and voltage ripple on the input to the IC. Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator, drive it low to turn it off. Pull up with 100kΩ resistor for automatic startup. Gate driver power ground of the P-channel Power MOSFET. A linear regulator regulates a 5.5V voltage between VIN and UGND to supply power to P-channel MOSFET gate driver. Connect a ceramic capacitor (1µF typ.) between VIN and UGND for noise decoupling and stability of the linear regulator. Bias input and 4.2V linear regulator’ output. This pin supplies the bias to some control circuits. The s 4.2V linear regulator converts the voltage on VIN to 4.2V to supply the bias when no external 5V power supply is connected with VCC. Connect a ceramic capacitor (1µF typ.) between VCC and GND for noise decoupling and stability of the linear regulator. Power Switching Output. Connect this pin to the underside Exposed Pad. Output of error amplifier. Connect a series RC network from COMP to GND to compensate the regulation control loop. In some cases, an additional capacitor from COMP to GND is required for noise decoupling. Feedback Input. The IC senses feedback voltage via FB and regulate the voltage at 0.8V. Connecting FB with a resistor-divider from the output set the output voltage in the range from 0.8V to 90% VIN. Power and Signal Ground. Power Switching Output. LX is the Drain of the P-channel MOSFET to supply power to the output. The Exposed Pad provides current with lower impedance than Pin 5. Connect the pad to output LC filter via a top-layer thermal pad on PCBs. The PCB will be a heat sink of the IC. 2 EN 3 UGND 4 VCC 5 6 LX COMP 7 8 9 (Exposed Pad) FB GND LX C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 10 www.anpec.com.tw APW7080 Block Diagram VIN Current Sense Amplifier VCC VCC 4.2V Regulator and Power-On-Reset Current Limit POR 70%VREF Soft-Start and Fault Logic Inhibit Gate Control VREF 0.8V Error Amplifier UG Gate Driver UVP Soft-Start FB Current Compartor UGND LX VIN COMP ENOK 2.5V Slope Compensation Over Temperature Protection Oscillator 380kHz 5.5V EN 0.8V Enable FB VIN-to-UGND Linear Regulator GND Typical Application Circuit 1. 4.5~26V Single Power Input Step-down Converter (with Ceramic Input/Output Capacitors) C1 10µF 1 VIN 4 VCC UGND LX LX 3 9 5 4.5~26V VIN C2 1µF C3 1µF R5 100kΩ U1 APW7080 2 6 EN COMP GND L1 4A VOUT D1 R1 1% 22µF 0.8V~90%VIN C4 /4A VIN FB 7 R4 C6 C5 R2 1% C7 (Optional) 8 C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 11 www.anpec.com.tw APW7080 Typical Application Circuit (Cont.) Recommended Feedback Compensation Network Components List: VIN (V) 24 24 24 24 12 12 12 12 12 12 12 12 5 5 5 5 5 5 VOUT (V) 12 12 5 5 5 5 3.3 3.3 2 2 1.2 1.2 3.3 3.3 1.2 1.2 0.8 0.8 L1 (µH) 15 15 10 10 10 10 10 10 4.7 4.7 3.3 3.3 3.3 3.3 2.2 2.2 2.2 2.2 C4 (µF) 22 44 22 44 22 44 22 44 22 44 22 44 22 44 22 44 22 44 C4 ESR (mΩ ) 5 3 5 3 5 3 5 3 5 3 5 3 5 3 5 3 5 3 R1 (kΩ ) 140 140 63 63 63 63 46.9 46.9 30 30 7.5 7.5 46.9 46.9 7.5 7.5 0 0 R2 (kΩ ) 10 10 12 12 12 12 15 15 20 20 15 15 15 15 15 15 NC NC C7 (pF) 22 22 33 33 68 68 82 82 56 56 150 150 68 68 270 270 NC NC R4 (kΩ ) 62 120 24 51 24 51 15 33 10 20 6.2 12 15 33 5.6 12 2.7 6.2 C5 (pF) 820 820 1500 1500 820 820 1000 1000 2200 2200 3300 3300 560 560 1500 1500 2700 2700 C6 (pF) 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 2. Dual Power Inputs Step-down Converter (VIN=4.5~26V) +5V D2 Schottky Diode 4 VCC C1 10µF 1 VIN UGND LX LX 3 9 5 4.5~26V VIN C2 1µF C3 1µF R5 100kΩ U1 APW7080 2 6 EN COMP GND L1 4A VOUT D1 R1 1% 22µF 0.8V~90%VIN C4 /4A VIN FB 7 R4 C6 C5 R2 1% C7 (Optional) 8 C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 12 www.anpec.com.tw APW7080 Typical Application Circuit (Cont.) 3. 4.5~5.5V Single Power Input Step-down Converter C1 10µF 1 VIN 4 VCC UGND 3 4.5~5.5V VIN C2 1µF L1 4A C3 1µF LX 9 5 VOUT D1 R1 1% 22µF VIN R5 100kΩ LX U1 APW7080 2 6 EN COMP GND FB 0.8V~90%VIN C4 /4A 7 R4 C6 C5 R2 1% C7 (Optional) 4. +12V Single Power Input Step-down Converter (with Electrolytic Input/Output Capacitors) 8 VIN 4 VCC UGND LX LX C1 2.2µF 1 3 9 5 C8 +12V 470µF VIN C2 1µF C3 1µF R5 100kΩ U1 APW7080 2 6 EN COMP GND L1 10uH 4A +3.3V/4A D1 R1 46.9k 1% C4 470µF (ESR=30mΩ) VOUT VIN FB 7 C6 22pF R4 56k C5 4700pF R2 15k 1% 8 C7 33pF C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 13 www.anpec.com.tw APW7080 Typical Application Circuit (Cont.) 5. -8V Inverting Converter with 4.5~5.5V Single Power Input VIN 4.5~5.5V C1 10µF 3 1 R5 100kΩ 2 EN VIN UGND LX 4 LX VCC C2 1µF 9 5 C3 1µF U1 APW7080 FB 7 L1 6.8µH 4A D1 6 COMP R1 90kΩ PGND C6 22pF R4 39kΩ C5 560pF GND R2 10kΩ C7 27pF AGND C4 22µF 8 VOUT -8V/4A C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 14 www.anpec.com.tw APW7080 Function Description Main Control Loop The APW7080 is a constant frequency current mode switching regulator. During normal operation, the internal P-channel power MOSFET is turned on each cycle when the oscillator sets an internal RS latch and would be turned off when an internal current comparator (ICMP) resets the latch. The peak inductor current at which ICMP resets the RS latch is controlled by the voltage on the COMP pin, which is the output of the error amplifier (EAMP). An external resistive divider connected between VOUT and ground allows the EAMP to receive an output feedback voltage VFB at FB pin. When the load current increases, it causes a slight decrease in V FB r elative to the 0.8V reference, which in turn causes the COMP voltage to increase until the average inductor current matches the new load current. VCC Power-On-Reset(POR) and EN Undervoltage Lockout The APW7080 keeps monitoring the voltage on VCC pin to prevent wrong logic operations which may occur when VCC voltage is not high enough for the internal control circuitry to operate. The VCC POR has a rising threshold of 3.9V (typical) with 0.15V of hysteresis. An external undervoltage lockout (UVLO) is sensed and programmed at the EN pin. The EN UVLO has a rising threshold of 2.5V with 0.2V of hysteresis. The EN UVLO should be programmed by connecting a resistive divider from VIN to EN to GND. After the VCC, EN, and VIN-to-UGND voltages exceed their respective voltage thresholds, the IC starts a start-up process and then ramps up the output voltage to the setting of output voltage. Connect a RC network from EN to GND to set a turn-on delay that can be used to sequence the output voltages of multiple devices. VCC 4.2V Linear Regulator VCC is the output terminal of the internal 4.2V linear regulator which is powered from VIN and provides power to the APW7080. The linear regulator is designed to be stable with a low-ESR ceramic output capacitor powers the internal control circuitry. Bypass VCC to GND with a ceramic capacitor of at least 0.22µF. Place the capacitor physically close to the IC to provide good noise decoupling. The linear regulator is not intended for powering up any external loads. Do not connect any external loads to VCC. The linear regulator is also equipped with current-limit protection to protect itself during over-load or short-circuit conditions on VCC pin. VIN-to-UGND 5.5V Linear Regulator The built-in 5.5V linear regulator regulates a 5.5V voltage between VIN and UGND pins to supply bias and gate charge for the P-channel Power MOSFET gate driver. The linear regulator is designed to be stable with a low-ESR ceramic output capacitor of at least 0.22 µF. It is also equipped with current-limit function to protect itself during over-load or short-circuit conditions between VIN and UGND. The APW7080 shuts off the output of the converters when the output voltage of the linear regulator is below 3.5V (typical). The IC resumes working by initiating a new softstart process when the linear regulator’ output voltage s is above the undervoltage lockout voltage threshold. Digital Soft-Start The APW7080 has a built-in digital soft-start to control the output voltage rise and limit the input current surge during start-up. During soft-start, an internal ramp, connected to the one of the positive inputs of the error amplifier, rises up from 0V to 1V to replace the reference voltage (0.8V) until the ramp voltage reaches the reference voltage. The device is designed with a preceding delay about 10.8ms (typical) before soft-start process. Output Undervoltage Protection In the process of operation, if a short-circuit occurs, the output voltage will drop quickly. Before the current-limit circuit responds, the output voltage will fall out of the required regulation range. The undervoltage continually monitors the FB voltage after soft-start is completed. If a load step is strong enough to pull the output voltage lower than the undervoltage threshold, the IC shuts down converter’ output. s The undervoltage threshold is 70% of the nominal output C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 15 www.anpec.com.tw APW7080 Function Description (Cont.) Output Undervoltage Protection (Cont.) voltage. The undervoltage comparator has a built-in 2µs noise filter to prevent the chips from wrong UVP shutdown caused by noise. The undervoltage protection works in a hiccup mode without latched shutdown. The IC will initiate a new soft-start process at the end of the preceeding delay. Over-Temperature Protection (OTP) The over-temperature circuit limits the junction temperature of the APW7080. When the junction temperature exceeds TJ = +150oC, a thermal sensor turns off the power MOSFET, allowing the devices to cool. The thermal sensor allows the converter to start a start-up process and regulate the output voltage again after the junction temperature is cooled by 50 oC. The OTP is designed with a 50oC hysteresis to lower the average TJ during continuous thermal overload conditions, increasing lifetime of the IC. Enable/Shutdown Driving EN to ground places the APW7080 in shutdown. When in shutdown, the internal power MOSFET turns off, all internal circuitry shuts down and the quiescent supply current of VIN reduces to 2KV, VMM > 200V 10ms, 1tr > 100mA Classification Reflow Profiles Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5°C of actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly 3°C/second max. 100°C 150°C 60-120 seconds 183°C 60-150 seconds See table 1 10-30 seconds Pb-Free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds See table 2 20-40 seconds 6°C/second max. 6°C/second max. 6 minutes max. 8 minutes max. Time 25°C to Peak Temperature Notes: All temperatures refer to topside of the package. Measured on the body surface. C opyright © A NPEC Electronics Corp. Rev. A.6 - Jun., 2008 22 www.anpec.com.tw APW7080 Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures 3 Package Thickness Volume mm
APW7080KAI-TRG 价格&库存

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APW7080KAI-TRG
  •  国内价格
  • 1+2.92100
  • 10+2.69100
  • 30+2.64500
  • 100+2.50700

库存:405

APW7080KAI-TRG
    •  国内价格
    • 1+10.11600

    库存:5