AO4268

AO4268 60V N-Channel AlphaSGT TM General Description Product Summary • Trench Power AlphaSGTTM technology • Low RDS(ON) • Low Gate Charge ID (at VGS=10V) 60V 19A RDS(ON) (at VGS=10V) < 4.8mΩ RDS(ON) (at VGS=4.5V) < 6.5mΩ VDS Applications 100% UIS Tested 100% Rg Tested • Synchronous Rectification for AC-DC Quick Charger SOIC-8 Top View D D D Bottom View D D G G S S S S Orderable Part Number Package Type Form Minimum Order Quantity AO4268 SO-8 Tape & Reel 3000 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Drain-Source Voltage Symbol VDS Gate-Source Voltage Continuous Drain Current VGS TA=25°C Pulsed Drain Current C L=0.3mH C Avalanche energy VDS Spike Power Dissipation B 10µs TA=25°C Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead Rev.1.0: February 2016 30 A EAS 135 mJ 72 V 3.1 Steady-State Steady-State W 2 TJ, TSTG Symbol t ≤ 10s A IAS PD Junction and Storage Temperature Range V 76 VSPIKE TA=70°C ±20 14.5 IDM Avalanche Current C Units V 19 ID TA=70°C Maximum 60 RθJA RθJL -55 to 150 Typ 31 59 16 www.aosmd.com °C Max 40 75 24 Units °C/W °C/W °C/W Page 1 of 5 AO4268 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=250µA, VGS=0V Typ Zero Gate Voltage Drain Current IGSS VGS(th) Gate-Body leakage current VDS=0V, VGS=±20V Gate Threshold Voltage VDS=VGS, ID=250µA V 1 TJ=55°C 1.3 ±100 nA 1.8 2.3 V 4 4.8 6.3 7.6 6.5 RDS(ON) Static Drain-Source On-Resistance VGS=4.5V, ID=16A 5.2 gFS Forward Transconductance VDS=5V, ID=19A 83 VSD Diode Forward Voltage IS=1A, VGS=0V 0.7 IS Maximum Body-Diode Continuous Current TJ=125°C DYNAMIC PARAMETERS Input Capacitance Ciss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance VGS=0V, VDS=30V, f=1MHz mΩ S 1 V 4 A 2500 pF 670 pF 65 pF 1.2 2 Ω 44 65 nC Qg(4.5V) Total Gate Charge 21 30 Gate Source Charge Qgd tD(on) tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Turn-Off Fall Time Qrr VGS=10V, VDS=30V, ID=19A 0.5 mΩ SWITCHING PARAMETERS Qg(10V) Total Gate Charge Qgs f=1MHz µA 5 VGS=10V, ID=19A Coss Units 60 VDS=60V, VGS=0V IDSS Max nC 6.5 nC Gate Drain Charge 8.5 nC Turn-On DelayTime 7.5 ns VGS=10V, VDS=30V, RL=1.6Ω, RGEN=3Ω 6.5 ns 38 ns 8 ns IF=19A, di/dt=500A/µs 22 Body Diode Reverse Recovery Charge IF=19A, di/dt=500A/µs 80 ns nC Body Diode Reverse Recovery Time A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using or equal to 4.5V Figure 9: Maximum Forward Biased Safe Operating Area (Note F) 100 1 1E-05 0.001 0.1 10 1000 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F) ZθJA Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA 1 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJA=75°C/W 0.1 PDM 0.01 0.001 1E-05 Single Pulse Ton 0.0001 0.001 0.01 0.1 1 T 10 100 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev.1.0: February 2016 www.aosmd.com Page 4 of 5 AO4268 Figure A: Charge Gate Charge Test Circuit & Waveforms Gate Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC - DUT Vgs Ig Charge Figure B:Resistive ResistiveSwitching Switching Test Test Circuit Circuit&&Waveforms Waveforms RL Vds Vds DUT Vgs 90% + Vdd VDC - Rg 10% Vgs Vgs td(on) tr td(off) ton tf toff Figure C: UnclampedInductive InductiveSwitching Switching (UIS) Test Unclamped Test Circuit Circuit&&Waveforms Waveforms L 2 EAR= 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Figure D: Recovery Diode Recovery Test Circuit & Waveforms Diode Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vgs Vds - Isd Vgs Ig Rev.1.0: February 2016 L Isd + Vdd t rr dI/dt I RM Vdd VDC - IF Vds www.aosmd.com Page 5 of 5