AO4292E

AO4292E 100V N-Channel MOSFET General Description Product Summary VDS • Trench Power MV MOSFET technology • Low RDS(ON) • Low Gate Charge • Optimized for fast-switching applications • ESD protected • RoHS and Halogen-Free Compliant Applications ID (at VGS=10V) 100V 8A RDS(ON) (at VGS=10V) < 23mΩ RDS(ON) (at VGS=4.5V) < 33mΩ Typical ESD protection HBM Class 2 100% UIS Tested 100% Rg Tested • Synchronus Rectification in DC/DC and AC/DC Converters • Industrial and Motor Drive applications SOIC-8 Top View D D D Bottom View D D G G S S S S Orderable Part Number Package Type Form Minimum Order Quantity AO4292E SO-8 Tape & Reel 3000 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Drain-Source Voltage Symbol VDS VGS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current TA=25°C Avalanche energy L=0.1mH VDS Spike 10µs TA=25°C Power Dissipation B C Junction and Storage Temperature Range Thermal Characteristics Parameter A Maximum Junction-to-Ambient AD Maximum Junction-to-Ambient Maximum Junction-to-Lead Rev.1.0: August 2015 Steady-State Steady-State A IAS 14 A EAS 10 mJ VSPIKE 120 V 3.1 W 2.0 TJ, TSTG Symbol t ≤ 10s V 32 PD TA=70°C ±20 6.2 IDM Avalanche Current C Units V 8 ID TA=70°C C Maximum 100 RθJA RθJL -55 to 150 Typ 31 59 16 www.aosmd.com °C Max 40 75 24 Units °C/W °C/W °C/W Page 1 of 5 AO4292E Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=250µA, VGS=0V 100 Typ Zero Gate Voltage Drain Current IGSS VGS(th) Gate-Body leakage current VDS=0V, VGS=±20V Gate Threshold Voltage VDS=VGS, ID=250µA 1 TJ=55°C 1.6 ±10 µA 2.15 2.7 V 18.5 23 33 42 23.5 33 RDS(ON) Static Drain-Source On-Resistance gFS Forward Transconductance VDS=5V, ID=8A 30 VSD Diode Forward Voltage IS=1A,VGS=0V 0.72 IS Maximum Body-Diode Continuous Current TJ=125°C VGS=4.5V, ID=6A DYNAMIC PARAMETERS Input Capacitance Ciss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance µA 5 VGS=10V, ID=8A Coss Units V VDS=100V, VGS=0V IDSS Max mΩ mΩ S 1 V 4 A 1200 VGS=0V, VDS=50V, f=1MHz f=1MHz SWITCHING PARAMETERS Total Gate Charge Qg(10V) 0.5 pF 93 pF 6.3 pF 1.0 1.5 Ω 16.5 25 nC 8 14 nC Qg(4.5V) Total Gate Charge Qgs Gate Source Charge 3.5 nC Qgd Gate Drain Charge 2.5 nC tD(on) Turn-On DelayTime 6 ns tr Turn-On Rise Time 3 ns tD(off) Turn-Off DelayTime 22 ns tf trr Turn-Off Fall Time Qrr VGS=10V, VDS=50V, ID=8A VGS=10V, VDS=50V, RL=6.25Ω, RGEN=3Ω 3 ns IF=8A, dI/dt=500A/µs 20 Body Diode Reverse Recovery Charge IF=8A, dI/dt=500A/µs 80 ns nC Body Diode Reverse Recovery Time A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using or equal to 4.5V Figure 9: Maximum Forward Biased Safe Operating Area (Note F) ZθJA Normalized Transient Thermal Resistance 10 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA 1 RθJA=75°C/W 0.1 PDM 0.01 Single Pulse Ton T 0.001 1E-05 0.0001 0.001 0.01 0.1 1 10 100 1000 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev.1.0: August 2015 www.aosmd.com Page 4 of 5 AO4292E Gate Charge Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC - DUT Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds Vds DUT Vgs 90% + Vdd VDC - Rg 10% Vgs Vgs td(on) tr td(off) ton tf toff Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L 2 EAR= 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vds - Isd Vgs Ig Rev.1.0: August 2015 Vgs L Isd + Vdd t rr dI/dt I RM Vdd VDC - IF Vds www.aosmd.com Page 5 of 5