AO4405E
30V P-Channel MOSFET
General Description
Product Summary
VDS
-30V
ID (at VGS=-10V)
-6A
RDS(ON) (at VGS=-10V)
< 45mΩ
RDS(ON) (at VGS=-4.5V)
< 80mΩ
Applications
Typical ESD protection
HBM Class 1C
• This device is suitable for use as a load switch or in
PWM applications.
100% UIS Tested
100% Rg Tested
• Trench Power LV (P-ch) MOSFET technology
• Low RDS(ON)
• Low Gate Charge
• ESD protected
• RoHS and Halogen-Free Compliant
SOIC-8
Top View
D
D
Top View
Bottom View
D
D
D
G
1
8
2
7
3
6
4
5
G
PIN1
S
S
S
S
PIN1
Orderable Part Number
Package Type
Form
Minimum Order Quantity
AO4405E
SO-8
Tape & Reel
3000
Absolute Maximum Ratings TA=25°C unless otherwise noted
Symbol
VDS
Parameter
Drain-Source Voltage
Gate-Source Voltage
±20
V
-6
ID
TA=70°C
Pulsed Drain Current C
Avalanche Current
Units
V
VGS
TA=25°C
Continuous Drain
Current
Maximum
-30
C
A
-4.7
IDM
-24
IAS, IAR
15
A
Avalanche energy L=0.1mH C
EAS, EAR
11
mJ
VDS Spike
VSPIKE
-36
V
10µs
TA=25°C
Power Dissipation
B
PD
TA=70°C
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Lead
Rev.2.0: August 2016
2.5
TJ, TSTG
Symbol
t ≤ 10s
Steady-State
Steady-State
RθJA
RθJL
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W
1.6
-55 to 150
Typ
42
70
20
Max
50
85
30
°C
Units
°C/W
°C/W
°C/W
Page 1 of 5
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=-250µA, VGS=0V
-30
-1
TJ=55°C
IGSS
Gate-Body leakage current
VDS=0V, VGS=±20V
Gate Threshold Voltage
VDS=VGS, ID=-250µA
-5
±10
µA
V
29
45
40
65
VGS=-4.5V, ID=-4A
50
80
TJ=125°C
gFS
Forward Transconductance
VDS=-5V, ID=-6A
14
VSD
Diode Forward Voltage
IS=-1A,VGS=0V
-0.76
IS
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
µA
-1.5
Static Drain-Source On-Resistance
Output Capacitance
Units
-2
-2.5
VGS=-10V, ID=-6A
Coss
Max
V
VDS=-30V, VGS=0V
VGS(th)
RDS(ON)
Typ
VGS=0V, VDS=-15V, f=1MHz
mΩ
S
-1
V
-3
A
495
pF
100
pF
56
pF
7.5
11.5
SWITCHING PARAMETERS
Qg(10V)
Total Gate Charge
8.8
16
nC
Qg(4.5V)
Total Gate Charge
4.2
8
nC
Qgs
Gate Source Charge
Qgd
tD(on)
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
Qrr
Body Diode Reverse Recovery Charge IF=-6A, dI/dt=500A/µs
f=1MHz
VGS=-10V, VDS=-15V, ID=-6A
3.5
mΩ
Ω
1.8
nC
Gate Drain Charge
2.0
nC
Turn-On DelayTime
9
ns
4.5
ns
15.5
ns
VGS=-10V, VDS=-15V, RL=2.5Ω,
RGEN=3Ω
IF=-6A, dI/dt=500A/µs
4.5
ns
9
ns
nC
13.5
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using or equal to -4.5V
Figure 9: Maximum Forward Biased
Safe Operating Area (Note F)
ZθJA Normalized Transient
Thermal Resistance
10
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
1
RθJA=85°C/W
0.1
PDM
0.01
Single Pulse
Ton
T
0.001
1E-05
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev.2.0: August 2016
www.aosmd.com
Page 4 of 5
Gate Charge Test Circuit & Waveform
Vgs
Qg
-10V
-
-
VDC
Qgs
Vds
+
VDC
Qgd
+
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
toff
ton
Vgs
-
DUT
Vgs
VDC
td(on)
td(off)
tr
tf
90%
Vdd
+
Rg
Vgs
10%
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
2
L
EAR= 1/2 LIAR
Vds
Vds
Id
-
Vgs
Vgs
VDC
+
Rg
BVDSS
Vdd
Id
I AR
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds -
Isd
Vgs
Ig
Rev.2.0: August 2016
L
-Isd
+ Vdd
t rr
dI/dt
-I RM
Vdd
VDC
-
-I F
-Vds
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Page 5 of 5
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