AO4447A_102

AO4447A 30V P-Channel MOSFET General Description Product Summary • Trench Power MOSFET technology • Low RDS(ON) • ESD Protected • RoHS and Halogen-Free Compliant ID (at VGS=-10V) VDS Applications -30V -18.5A RDS(ON) (at VGS=-10V) < 5.8mΩ RDS(ON) (at VGS=-4.5V) < 8.2mΩ Typical ESD protection HBM Class 3B 100% UIS Tested • System/Load Switch • Battery Switch • USB-PD Load Switch SOIC-8 Top View D D D Top View Bottom View D D 1 8 2 7 3 6 4 5 G G S S S S Orderable Part Number Package Type Form Minimum Order Quantity AO4447A SO-8 Tape & Reel 3000 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Drain-Source Voltage Symbol VDS Gate-Source Voltage VGS TA=25°C Continuous Drain Current Pulsed Drain Current C Avalanche energy L=0.1mH TA=25°C Power Dissipation B TA=70°C C Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead Rev.5.0: October 2017 Steady-State Steady-State A IAS 54 A EAS 146 mJ 3.1 W 2.0 -55 to 150 TJ, TSTG Symbol t ≤ 10s V -74 PD Junction and Storage Temperature Range ±20 -14.5 IDM Avalanche Current C Units V -18.5 ID TA=70°C Maximum -30 RθJA RθJL Typ 31 59 16 www.aosmd.com °C Max 40 75 24 Units °C/W °C/W °C/W Page 1 of 5 AO4447A Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=-250µA, VGS=0V -30 Typ Zero Gate Voltage Drain Current IGSS VGS(th) Gate-Body leakage current VDS=0V, VGS=±16V Gate Threshold Voltage VDS=VGS, ID=-250µA -1 TJ=55°C ±10 µA -1.7 -2.2 V 4.7 5.8 6.6 8.2 8.2 RDS(ON) Static Drain-Source On-Resistance VGS=-4.5V, ID=-16A 6.3 gFS Forward Transconductance VDS=-5V, ID=-18.5A 65 VSD Diode Forward Voltage IS=-1A, VGS=0V IS Maximum Body-Diode Continuous Current TJ=125°C DYNAMIC PARAMETERS Input Capacitance Ciss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance VGS=0V, VDS=-15V, f=1MHz f=1MHz µA -5 -1.2 VGS=-10V, ID=-18.5A Coss Units V VDS=-30V, VGS=0V IDSS Max -0.66 mΩ mΩ S -1 V -4 A 5020 pF 815 pF 615 pF 125 250 Ω SWITCHING PARAMETERS Total Gate Charge Qg(10V) 93 130 nC Qg(4.5V) Total Gate Charge 46 nC Qgs Gate Source Charge 14 nC Qgd Gate Drain Charge 21 nC tD(on) Turn-On DelayTime 180 ns VGS=-10V, VDS=-15V, ID=-18.5A tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Turn-Off Fall Time 830 ns IF=-18.5A, di/dt=500A/µs 17 Qrr Body Diode Reverse Recovery Charge IF=-18.5A, di/dt=500A/µs 53 ns nC Body Diode Reverse Recovery Time VGS=-10V, VDS=-15V, RL=0.8Ω, RGEN=3Ω 280 ns 1400 ns A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using or equal to 4.5V Figure 9: Maximum Forward Biased Safe Operating Area (Note F) 100 1 0.0001 0.001 0.01 0.1 1 10 100 1000 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F) ZθJA Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA 1 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJA=75°C/W 0.1 PDM 0.01 Single Pulse Ton T 0.001 1E-05 0.0001 0.001 0.01 0.1 1 10 100 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev.5.0: October 2017 www.aosmd.com Page 4 of 5 AO4447A Gate Charge Test Circuit & Waveform Vgs Qg -10V - - VDC + VDC Qgd + DUT Qgs Vds Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds toff ton td(on) Vgs - DUT Vgs VDC td(off) tr tf 90% Vdd + Rg Vgs 10% Vds Unclamped Inductive Switching (UIS) Test Circuit & Waveforms 2 L EAR= 1/2 LIAR Vds Vds Id - Vgs Vgs VDC BVDSS Vdd + Rg Id I AR DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vds - Isd Vgs Ig Rev.5.0: October 2017 Vgs L -Isd + Vdd t rr dI/dt -I RM Vdd VDC - -I F -Vds www.aosmd.com Page 5 of 5