AO4568

AO4568 30V N-Channel AlphaMOS General Description Product Summary VDS • Trench Power AlphaMOS (αMOS LV) technology • Low RDS(ON) • Low Gate Charge • High Current Capability • RoHS and Halogen-Free Compliant 30V 12A ID (at VGS=10V) Applications RDS(ON) (at VGS=10V) < 11.5mΩ RDS(ON) (at VGS=4.5V) < 17.5mΩ 100% UIS Tested 100% Rg Tested • DC/DC Converters in Computing, Servers, and POL • Isolated DC/DC Converters in Telecom and Industrial SOIC-8 Top View D D D Bottom View D D G G S S S S Orderable Part Number Package Type Form Minimum Order Quantity AO4568 SO-8 Tape & Reel 3000 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Drain-Source Voltage Symbol VDS Gate-Source Voltage VGS TA=25°C Continuous Drain Current G Pulsed Drain Current Avalanche Current C Avalanche energy VDS Spike L=0.1mH C 10µs Power Dissipation B Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead Rev.1.0: February 2014 Steady-State Steady-State A 48 IAS 13 A EAS 8 mJ 36 V 2.5 W 1.6 TJ, TSTG Symbol t ≤ 10s V 9.4 PD TA=70°C ±20 IDM VSPIKE TA=25°C Units V 12 ID TA=70°C C Maximum 30 RθJA RθJL -55 to 150 Typ 42 70 20 www.aosmd.com °C Max 50 85 30 Units °C/W °C/W °C/W Page 1 of 5 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=250µA, VGS=0V Zero Gate Voltage Drain Current IGSS VGS(th) Gate-Body leakage current VDS=0V, VGS=±20V Gate Threshold Voltage VDS=VGS, ID=250µA gFS Forward Transconductance VDS=5V, ID=12A 1.4 VSD Diode Forward Voltage IS=1A,VGS=0V IS Maximum Body-Diode Continuous Current TJ=125°C VGS=4.5V, ID=10A Crss Reverse Transfer Capacitance Rg Gate resistance µA ±100 nA 1.8 2.2 V 9.5 11.5 13.6 16.5 13.8 17.5 mΩ mΩ 40 0.73 DYNAMIC PARAMETERS Input Capacitance Ciss Output Capacitance V 5 VGS=10V, ID=12A Static Drain-Source On-Resistance Units 1 TJ=55°C RDS(ON) Max 30 VDS=30V, VGS=0V IDSS Coss Typ VGS=0V, VDS=15V, f=1MHz S 1 V 3 A 600 pF 230 pF 30 pF 1.5 2.3 Ω SWITCHING PARAMETERS Qg(10V) Total Gate Charge 9 15 nC Qg(4.5V) Total Gate Charge 4.4 10 nC Qgs Gate Source Charge Qgd f=1MHz VGS=10V, VDS=15V, ID=12A 0.7 1.4 nC Gate Drain Charge 1.9 nC tD(on) Turn-On DelayTime 5 ns tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Turn-Off Fall Time IF=12A, dI/dt=500A/µs Qrr Body Diode Reverse Recovery Charge IF=12A, dI/dt=500A/µs 10.5 Body Diode Reverse Recovery Time VGS=10V, VDS=15V, RL=1.25Ω, RGEN=3Ω 2.5 ns 17.5 ns 2.5 ns 8.6 ns nC A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using or equal to 4.5V Figure 9: Maximum Forward Biased Safe Operating Area (Note F) 0 1E-05 100 0.001 0.1 10 1000 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F) Zθ JA Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA 1 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJA=85°C/W 0.1 PD 0.01 Single Pulse Ton T 0.001 1E-05 0.0001 0.001 0.01 0.1 1 10 100 1000 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev.1.0: February 2014 www.aosmd.com Page 4 of 5 Gate Charge Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC - DUT Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds Vds DUT Vgs 90% + Vdd VDC - Rg 10% Vgs Vgs td(on) tr td(off) ton tf toff Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L 2 EAR= 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vgs Vds Isd Vgs Ig Rev.1.0: February 2014 L Isd + Vdd t rr dI/dt I RM Vdd VDC - IF Vds www.aosmd.com Page 5 of 5