AOB414

AOB414 N-Channel SDMOS TM Power Transistor General Description Product Summary The AOB414/L is fabricated with SDMOSTM trench technology that combines excellent RDS(ON) with low gate charge.The result is outstanding efficiency with controlled switching behavior. This universal technology is well suited for PWM, load switching and general purpose applications.AOB414 and AOB414L are electrically identical. VDS ID (at VGS=10V) 100V 51A RDS(ON) (at VGS=10V) < 25mΩ RDS(ON) (at VGS = 7V) < 31mΩ 100% UIS Tested 100% Rg Tested -RoHS Compliant TO-263 D2PAK Top View D Bottom View D G G S S S G Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage VGS TC=25°C Continuous Drain Current G Pulsed Drain Current Continuous Drain Current C V A 100 6.6 IDSM TA=70°C ±25 36 IDM TA=25°C Units V 51 ID TC=100°C Maximum 100 A 5.3 Avalanche Current C IAR 28 A Repetitive avalanche energy L=0.1mH C TC=25°C EAR 39 mJ Power Dissipation B TC=100°C Power Dissipation A TA=70°C TA=25°C Rev1: May 2012 2.5 Steady-State Steady-State RθJA RθJC www.aosmd.com W 1.6 TJ, TSTG Symbol t ≤ 10s W 75 PDSM Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Case 150 PD -55 to 175 Typ 11 40 0.7 °C Max 14 50 1 Units °C/W °C/W °C/W Page 1 of 7 AOB414 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current Conditions Min ID=250µA, VGS=0V 100 10 TJ=55°C 50 IGSS Gate-Body leakage current VDS=0V, VGS= ±25V Gate Threshold Voltage VDS=VGS ID=250µA 2 ID(ON) On state drain current VGS=10V, VDS=5V 100 nA 4 V 20.5 25 36 43 VGS=7V, ID=15A 25 31 mΩ 37 1 V 40 A TJ=125°C gFS Forward Transconductance VDS=5V, ID=20A VSD Diode Forward Voltage IS=1A,VGS=0V IS Maximum Body-Diode Continuous Current DYNAMIC PARAMETERS Ciss Input Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance Gate Source Charge Qgd Gate Drain Charge tD(on) Turn-On DelayTime A 0.66 mΩ S 1400 1770 2200 pF VGS=0V, VDS=50V, f=1MHz 115 165 214 pF 33 55 80 pF VGS=0V, VDS=0V, f=1MHz 0.3 0.65 1.0 Ω 14 28 42 nC 4 9 14 nC 10 14 nC SWITCHING PARAMETERS Qg(10V) Total Gate Charge Qgs µA 100 Static Drain-Source On-Resistance Output Capacitance Units 3.3 VGS=10V, ID=20A Coss Max V VDS=100V, VGS=0V VGS(th) RDS(ON) Typ VGS=10V, VDS=50V, ID=20A 6 12 ns tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf Turn-Off Fall Time trr Body Diode Reverse Recovery Time IF=20A, dI/dt=100A/µs 20 29 37 Qrr 25 36 47 trr Body Diode Reverse Recovery Charge IF=20A, dI/dt=100A/µs IF=20A, dI/dt=500A/µs Body Diode Reverse Recovery Time 12 20 26 Qrr Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs 60 82 110 VGS=10V, VDS=50V, RL=2.5Ω, RGEN=3Ω 4 ns 17 ns 5 ns ns nC ns nC A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial TJ =25°C. D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using