AOB4184

AOB4184 40V N-Channel MOSFET General Description Features The AOB4184 uses advanced trench technology and design to provide excellent RDS(ON) with low gate charge. With the excellent thermal resistance of the D2PAK package, this device is well suited for high current load applications. VDS (V) =40V ID = 50 A RDS(ON) < 10 mΩ RDS(ON) < 13 mΩ (VGS = 10V) (VGS = 10V) (VGS = 4.5V) 100% UIS Tested 100% Rg Tested TO-263 D2PAK Top View D Bottom View D G G S S S G Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage VGS TC=25°C Continuous Drain Current G C C Avalanche energy L=100uH C TC=25°C Power Dissipation B TC=100°C Power Dissipation A TA=70°C 40 IDM 120 Maximum Junction-to-Case Alpha & Omega Semiconductor, Ltd. 10 IAS, IAR 35 A EAS, EAR 61 mJ 50 2.5 W 1.6 TJ, TSTG -55 to 175 Symbol t ≤ 10s Steady-State Steady-State W 25 PDSM Junction and Storage Temperature Range B A IDSM PD TA=25°C Thermal Characteristics Parameter Maximum Junction-to-Ambient A A Maximum Junction-to-Ambient V 12 TC=70°C Avalanche Current ±20 ID TC=25°C Continuous Drain A Current Units V 50 TC=100°C Pulsed Drain Current Maximum 40 RθJA RθJC Typ 11 42 2.4 °C Max 17 50 3 Units °C/W °C/W °C/W www.aosmd.com AOB4184 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Min Conditions ID=250µA, VGS=0V Max V 1 Zero Gate Voltage Drain Current IGSS Gate-Body leakage current VDS=0V, VGS=±20V VGS(th) Gate Threshold Voltage VDS=VGS, ID=250µA 1.7 ID(ON) On state drain current VGS=10V, VDS=5V 120 RDS(ON) Static Drain-Source On-Resistance gFS Forward Transconductance VSD Diode Forward Voltage TJ=55°C µA 5 ±100 VGS=10V, ID=20A 2.1 V A 8.5 10 17 VGS=4.5V, ID=20A 10 13 VDS=5V, ID=20A 100 IS=1A, VGS=0V 0.72 G DYNAMIC PARAMETERS Ciss Input Capacitance nA 3 13.2 TJ=125°C Maximum Body-Diode Continuous Current Units 40 VDS=40V, VGS=0V IDSS IS Typ mΩ mΩ S 1 V 30 A 1250 1500 1800 pF 165 215 280 pF 95 135 190 pF 2 3.5 5 Ω SWITCHING PARAMETERS Qg(10V) Total Gate Charge 22 27.2 35 nC Qg(4.5V) Total Gate Charge 11 13.6 18 nC 3.5 4.5 6 nC 4.5 6.4 9 nC Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance Qgs Gate Source Charge Qgd Gate Drain Charge VGS=0V, VDS=20V, f=1MHz VGS=0V, VDS=0V, f=1MHz VGS=10V, VDS=20V, ID=20A tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Turn-Off Fall Time Body Diode Reverse Recovery Time IF=20A, dI/dt=500A/µs 15 19 Qrr Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs 48 59 VGS=10V, VDS=20V, RL=1Ω, RGEN=3Ω 6.4 ns 17.2 ns 29.6 ns 16.8 ns 25 78 ns nC A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using