AOD407
P-Channel Enhancement
Mode Field Effect Transistor
General Description
Features
The AOD407 uses advanced trench technology to
provide excellent RDS(ON), low gate charge and low
gate resistance. With the excellent thermal
resistance of the DPAK package, this device is well
suited for high current load applications.
VDS (V) = -60V
ID = -12A (VGS = -10V)
RDS(ON) < 115mW (VGS = -10V)
RDS(ON) < 150mW (VGS = -4.5V)
100% UIS tested
100% RG tested
-RoHS Compliant
-Halogen Free*
TO252
DPAK
TopView
Bottom View
D
D
D
S
D
G
G
S
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TC=25°C
Continuous Drain
Current G
C
Avalanche Current C
Repetitive avalanche energy L=0.1mH
TC=25°C
Power Dissipation
B
Power Dissipation
A
C
TA=25°C
Junction and Storage Temperature Range
Maximum Junction-to-Case
Rev.8.0: August 2019
B
IDM
-30
IAR
-12
A
EAR
23
A
mJ
50
W
25
2.5
TJ, TSTG
t ≤ 10s
Steady-State
Steady-State
W
1.6
-55 to 175
Symbol
A
V
-10
PDSM
TA=70°C
A
±20
ID
PD
TC=100°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
Units
V
-12
TC=100°C
Pulsed Drain Current
Maximum
-60
RqJA
RqJC
www.aosmd.com
Typ
16.7
40
2.5
°C
Max
25
50
3
Units
°C/W
°C/W
°C/W
Page 1 of 6
AOD407
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=-250mA, VGS=0V
-60
VDS=-48V, VGS=0V
Max
Zero Gate Voltage Drain Current
IGSS
Gate-Body leakage current
VDS=0V, VGS=±20V
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=-250mA
-1.5
ID(ON)
On state drain current
VGS=-10V, VDS=-5V
-30
-1
TJ=55°C
VGS=-10V, ID=-12A
Static Drain-Source On-Resistance
TJ=125°C
VGS=-4.5V, ID=-8A
-5
mA
±100
nA
-2.1
-3
V
91
115
A
150
114
gFS
Forward Transconductance
VDS=-5V, ID=-12A
12.8
VSD
Diode Forward Voltage
IS=-1A,VGS=0V
-0.76
IS
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Units
V
-0.003
IDSS
RDS(ON)
Typ
150
mW
mW
S
-1
V
-12
A
987
pF
VGS=0V, VDS=-30V, f=1MHz
114
pF
VGS=0V, VDS=0V, f=1MHz
9.5
15
W
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge (10V)
15.8
22
nC
Qg(4.5V) Total Gate Charge (4.5V)
7.4
12
nC
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
46
VGS=-10V, VDS=-30V, ID=-12A
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
Qrr
Body Diode Reverse Recovery Charge IF=-12A, dI/dt=100A/ms
VGS=-10V, VDS=-30V, RL=2.5W,
RGEN=3W
IF=-12A, dI/dt=100A/ms
pF
3
nC
3.5
nC
9
ns
10
ns
25
ns
11
ns
27.5
ns
nC
30
A: The value of R qJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
Power dissipation PDSM is based on R qJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R qJA is the sum of the thermal impedence from junction to case R qJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using
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