AOD4126

AOD4126/AOI4126 100V N-Channel MOSFET SDMOS TM General Description Product Summary The AOD4126&AOI4126 are fabricated with SDMOSTM trench technology that combines excellent RDS(ON) with low gate charge.The result is outstanding efficiency with controlled switching behavior. This universal technology is well suited for PWM, load switching and general purpose applications. VDS ID (at VGS=10V) 100V 43A RDS(ON) (at VGS=10V) < 24mΩ RDS(ON) (at VGS = 7V) < 30mΩ 100% UIS Tested 100% Rg Tested TO252 DPAK Top View Top View Bottom View TO-251A IPAK D Bottom View D D D G S G S S G G D S Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage VGS TC=25°C Continuous Drain Current B Pulsed Drain Current Continuous Drain Current A C Units V ±25 V A 100 7.5 IDSM TA=70°C Maximum 100 30 IDM TA=25°C S D 43 ID TC=100°C G A 6 Avalanche Current C IAS, IAR 28 A Avalanche energy L=0.1mH C TC=25°C EAS, EAR 39 mJ Power Dissipation B TC=100°C Power Dissipation A TA=70°C TA=25°C Rev1 : May 2012 3 Steady-State Steady-State RθJA RθJC W 1.9 TJ, TSTG Symbol t ≤ 10s W 50 PDSM Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Case 100 PD -55 to 175 Typ 8 35 1 www.aosmd.com °C Max 10 42 1.5 Units °C/W °C/W °C/W Page 1 of 7 AOD4126/AOI4126 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current Conditions Min ID=250µA, VGS=0V 100 10 TJ=55°C 50 IGSS Gate-Body leakage current VDS=0V, VGS= ±25V Gate Threshold Voltage VDS=VGS ID=250µA 2 ID(ON) On state drain current VGS=10V, VDS=5V 100 nA 4 V 19 24 36 43 VGS=7V, ID=15A 23.5 30 mΩ 34 1 V 40 A TJ=125°C gFS Forward Transconductance VDS=5V, ID=20A VSD Diode Forward Voltage IS=1A,VGS=0V IS Maximum Body-Diode Continuous Current DYNAMIC PARAMETERS Ciss Input Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance Gate Source Charge Qgd Gate Drain Charge tD(on) Turn-On DelayTime A 0.66 mΩ S 1400 1770 2200 pF VGS=0V, VDS=50V, f=1MHz 115 165 214 pF 33 55 80 pF VGS=0V, VDS=0V, f=1MHz 0.3 0.65 1.0 Ω 14 28 42 nC 4 9 14 nC 10 14 nC SWITCHING PARAMETERS Qg Total Gate Charge Qgs µA 100 Static Drain-Source On-Resistance Output Capacitance Units 3.3 VGS=10V, ID=20A Coss Max V VDS=100V, VGS=0V VGS(th) RDS(ON) Typ VGS=10V, VDS=50V, ID=20A 6 12 ns tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf Turn-Off Fall Time trr Body Diode Reverse Recovery Time IF=20A, dI/dt=500A/µs 12 20 26 Qrr Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs 60 82 110 VGS=10V, VDS=50V, RL=2.5Ω, RGEN=3Ω 4 ns 17 ns 5 ns ns nC A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial TJ =25°C. D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using