AOD484
30V N-Channel MOSFET
General Description
Features
The AOD484 uses advanced trench technology and
design to provide excellent RDS(ON) with low gate
charge. This device is suitable for use in PWM, load
switching and general purpose applications.
VDS (V) = 30V
ID = 25 A (VGS = 10V)
RDS(ON) < 15 mΩ (VGS = 10V)
RDS(ON) < 23 mΩ (VGS = 4.5V)
100% UIS Tested
100% Rg Tested
TO252
DPAK
Top View
D
Bottom View
D
D
G
S
S
G
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
Continuous Drain
Current G
VGS
TC=25°C
TC=100°C
Avalanche Current C
Power Dissipation B
TC=100°C
Power Dissipation A
TA=70°C
C
V
ID
20
80
IAR
15
A
EAR
33
mJ
2.1
W
1.3
-55 to 175
Symbol
Alpha & Omega Semiconductor, Ltd.
W
25
TJ, TSTG
t ≤ 10s
Steady-State
Steady-State
A
50
PDSM
Junction and Storage Temperature Range
Maximum Junction-to-Case B
±20
IDM
PD
TA=25°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A
Units
V
25
Pulsed Drain Current C
Repetitive avalanche energy L=0.3mH
TC=25°C
Maximum
30
RθJA
RθJC
Typ
17
55
2.3
°C
Max
25
60
3
Units
°C/W
°C/W
°C/W
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AOD484
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=250uA, VGS=0V
IGSS
Gate-Body leakage current
VDS=0V, VGS=±20V
VGS(th)
Gate Threshold Voltage
VDS=VGS, ID=250µA
1
ID(ON)
On state drain current
VGS=10V, VDS=5V
80
TJ=55°C
VGS=10V, ID=20A
TJ=125°C
VGS=4.5V, ID=15A
5
±100
nA
2.5
V
12.1
15
A
19
18.5
Forward Transconductance
VDS=5V, ID=20A
26
VSD
Diode Forward Voltage
IS=1A, VGS=0V
0.71
IS
Maximum Body-Diode Continuous Current
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
938
VGS=0V, VDS=15V, f=1MHz
µA
1.5
gFS
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Units
V
1
Zero Gate Voltage Drain Current
Static Drain-Source On-Resistance
Max
30
VDS=24V, VGS=0V
IDSS
RDS(ON)
Typ
mΩ
23
mΩ
1
V
21
A
S
1220
pF
142
pF
99
pF
1.2
1.8
Ω
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
17.5
21
nC
Qg(4.5V) Total Gate Charge
8.4
nC
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
trr
Turn-Off Fall Time
Qrr
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=15V, ID=20A
3
nC
4.1
nC
5
ns
VGS=10V, VDS=15V, RL=0.75Ω,
RGEN=3Ω
12
ns
19
ns
6
ns
IF=20A, dI/dt=100A/µs
19
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge IF=20A, dI/dt=100A/µs
10
21
12
ns
nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
25 s it.
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allow
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and
25is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using
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