AON6524
30V N-Channel AlphaMOS
General Description
Product Summary
• Latest Trench Power AlphaMOS (αMOS LV) technology
• Very Low RDS(on) at 4.5VGS
• Low Gate Charge
• High Current Capability
• RoHS and Halogen-Free Compliant
Application
• DC/DC Converters in Computing, Servers, and POL
• Isolated DC/DC Converters in Telecom and Industrial
VDS
ID (at VGS=10V)
30V
68A
RDS(ON) (at VGS=10V)
< 5.0mΩ
RDS(ON) (at VGS = 4.5V)
< 8.5mΩ
100% UIS Tested
100% Rg Tested
DFN5X6
Top View
D
Top View
Bottom View
1
8
2
7
3
6
4
5
G
S
PIN1
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TC=25°C
Continuous Drain
Current
Pulsed Drain Current C
Avalanche Current
C
V
A
170
27
IDSM
TA=70°C
±20
43
IDM
TA=25°C
Continuous Drain
Current
Units
V
68
ID
TC=100°C
Maximum
30
A
22
IAS
32
A
Avalanche energy L=0.05mH C
EAS
26
mJ
VDS Spike
VSPIKE
36
V
100ns
TC=25°C
Power Dissipation B
TC=100°C
Power Dissipation A
TA=70°C
PD
TA=25°C
Rev0: Sep 2012
5.7
Steady-State
Steady-State
RθJA
RθJC
W
3.6
TJ, TSTG
Symbol
t ≤ 10s
W
14
PDSM
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
35.5
-55 to 150
Typ
18
40
2.9
www.aosmd.com
°C
Max
22
55
3.5
Units
°C/W
°C/W
°C/W
Page 1 of 6
AON6524
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
Drain-Source Breakdown Voltage
BVDSS
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=250µA, VGS=0V
Gate-Body leakage current
VDS=0V, VGS= ±20V
Gate Threshold Voltage
VDS=VGS,ID=250µA
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=20A
TJ=125°C
VGS=4.5V, ID=20A
gFS
Forward Transconductance
VDS=5V, ID=20A
VSD
Diode Forward Voltage
IS=1A,VGS=0V
IS
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
VGS=0V, VDS=15V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qg(4.5V) Total Gate Charge
Qgs
Gate Source Charge
Qgd
VGS=10V, VDS=15V, ID=20A
µA
5
1.3
0.7
Units
V
1
TJ=55°C
IGSS
Max
30
VDS=30V, VGS=0V
VGS(th)
Coss
Typ
1.8
100
nA
2.3
V
3.9
5
5.5
7
6.6
8.5
72
0.7
mΩ
mΩ
S
1
V
40
A
1080
pF
427
pF
92
pF
1.5
2.3
Ω
17
23
nC
8.1
12
nC
4.2
nC
Gate Drain Charge
4
nC
tD(on)
Turn-On DelayTime
6.5
ns
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
Qrr
Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs
VGS=10V, VDS=15V, RL=0.75Ω,
RGEN=3Ω
IF=20A, dI/dt=500A/µs
4.5
ns
20
ns
4.5
ns
12
ns
nC
16.8
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA t≤ 10s and the maximum allowed junction temperature of 150°C. The value in any given application
depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Single pulse width limited by junction temperature TJ(MAX)=150°C.
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using
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