AON6812

AON6812 AlphaMOS 30V Common Drain N-Channel General Description Product Summary VDS • Latest Trench Power AlphaMOS (αMOS LV) technology • Very Low RDS(ON) at 4.5V VGS • Low Gate Charge • ESD protection • RoHS and Halogen-Free Compliant • Common Drain 30V 28A ID (at VGS=10V) Application RDS(ON) (at VGS=10V) < 4mΩ RDS(ON) (at VGS=4.5V) < 6mΩ Typical ESD protection HBM Class 3A 100% UIS Tested 100% Rg Tested • Battery Management DFN5X6B Top View Bottom View S2 S2 S2 D1 G2 D2 D1/D2 S1 S1 S1 G1 G1 G2 S1 PIN1 S2 PIN1 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage VGS TC=25°C Continuous Drain Current G Pulsed Drain Current C Avalanche Current C V A 112 27 IDSM TA=70°C ±20 22 IDM TA=25°C Continuous Drain Current Units V 28 ID TC=100°C Maximum 30 A 21 IAS 40 A Avalanche energy L=0.05mH C EAS 40 mJ VDS Spike VSPIKE 36 V Power Dissipation B 100ns TC=25°C PD TC=100°C TA=25°C Power Dissipation A Junction and Storage Temperature Range Rev.2.0: January 2016 4.1 Steady-State Steady-State RθJA RθJC W 2.6 TJ, TSTG Symbol t ≤ 10s W 12.5 PDSM TA=70°C Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Case 31 -55 to 150 Typ 24 53 3 www.aosmd.com °C Max 30 64 4 Units °C/W °C/W °C/W Page 1 of 6 AON6812 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=250µA, VGS=0V Zero Gate Voltage Drain Current IGSS Gate-Body leakage current VDS=0V, VGS=±16V VGS(th) Gate Threshold Voltage VDS=VGS, ID=250µA RDS(ON) Static Drain-Source On-Resistance VGS=10V, ID=20A TJ=125°C VGS=4.5V, ID=20A gFS Forward Transconductance VSD Diode Forward Voltage IS=1A,VGS=0V IS Maximum Body-Diode Continuous Current G DYNAMIC PARAMETERS Ciss Input Capacitance Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance VGS=0V, VDS=15V, f=1MHz VGS=0V, VDS=0V, f=1MHz SWITCHING PARAMETERS Qg(10V) Total Gate Charge Qg(4.5V) Total Gate Charge Qgs Gate Source Charge Qgd tD(on) VGS=10V, VDS=15V, ID=20A µA 5 1.4 2.6 Units V 1 TJ=125°C VDS=5V, ID=20A Max 30 VDS=30V, VGS=0V IDSS Coss Typ 1.8 ±10 µA 2.2 V 3.3 4 4.5 5.4 4.8 6 mΩ 1 V 28 A 83 0.7 mΩ S 1720 pF 746 pF 61 pF 5.2 7.8 Ω 24 34 nC 11 20 nC 5.9 nC Gate Drain Charge 3.2 nC Turn-On DelayTime 5.8 ns tr Turn-On Rise Time tD(off) Turn-Off DelayTime 3.5 ns 57.5 ns tf Turn-Off Fall Time 70 ns trr Body Diode Reverse Recovery Time Qrr IF=20A, dI/dt=500A/µs 20 Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs 30 ns nC VGS=10V, VDS=15V, RL=0.75Ω, RGEN=3Ω A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power dissipation PDSM is based on R θJA t≤ 10s and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Single pulse width limited by junction temperature TJ(MAX)=150°C. D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using or equal to 4.5V Figure 9: Maximum Forward Biased Safe Operating Area (Note F) ZθJC Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJC=4°C/W 1 PD 0.1 Single Pulse Ton T 0.01 1E-05 0.0001 0.001 0.01 0.1 1 10 100 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev.2.0: January 2016 www.aosmd.com Page 4 of 6 AON6812 40 40 30 30 Current rating ID(A) Power Dissipation (W) TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 20 10 20 10 0 0 0 25 50 75 100 125 150 0 25 TCASE (°C) Figure 12: Power De-rating (Note F) 50 75 100 125 150 TCASE (°C) Figure 13: Current De-rating (Note F) 10000 TA=25°C Power (W) 1000 100 10 1 1E-05 0.001 0.1 10 1000 Pulse Width (s) Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H) ZθJA Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA 1 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJA=64°C/W 0.1 PD 0.01 Single Pulse Ton 0.001 0.0001 0.001 0.01 0.1 1 T 10 100 1000 Pulse Width (s) Figure 15: Normalized Maximum Transient Thermal Impedance (Note H) Rev.2.0: January 2016 www.aosmd.com Page 5 of 6 AON6812 Gate Charge Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC - DUT Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds Vds 90% + Vdd DUT Vgs VDC - Rg 10% Vgs Vgs t d(on) tr t d(off) t on tf toff Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L 2 E AR = 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vds - Isd Vgs Ig Rev.2.0: January 2016 Vgs L Isd + Vdd t rr dI/dt I RM Vdd VDC - IF Vds www.aosmd.com Page 6 of 6