AON6992

AON6992 30V Dual Asymmetric N-Channel MOSFET General Description Product Summary • Trench Power αMOS Technology • Low RDS(ON) • Low Gate Charge • High Current Capability • RoHS and Halogen-Free Compliant Applications VDS Q1 30V Q2 30V ID (at VGS=10V) 50A 85A RDS(ON) (at VGS=10V) < 5.2mΩ < 2mΩ RDS(ON) (at VGS=4.5V) < 8.6mΩ < 2.5mΩ 100% UIS Tested 100% Rg Tested • DC/DC Converters in Computing • Isolated DC/DC Converters in Telecom and Industrial S2 S2 Bottom View Top View DFN5X6D Top View S2 Bottom View G2 PHASE PHASE (S1/D2) D1 D1 D1 D1 D1 S1/D2 PIN1 S1/D2 G1 Q2: SRFETTM Soft Recovery MOSFET: Integrated Schottky Diode PIN1 Orderable Part Number Package Type Form Minimum Order Quantity AON6992 DFN 5x6D Tape & Reel 3000 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Drain-Source Voltage Symbol VDS Gate-Source Voltage C ±12 V 50 85 C L=0.01mH C 10µs TC=25°C Power Dissipation B TA=25°C A 19 31 15 25 IAS 38 80 A EAS 7 32 mJ VSPIKE 36 36 V 21 45 8 18 3.1 3.1 2 2 PDSM TA=70°C Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Case Rev.1.0: October 2014 67 260 PD TC=100°C TJ, TSTG Symbol t ≤ 10s Steady-State Steady-State A 31 100 IDSM TA=70°C VDS Spike Power Dissipation ±20 IDM TA=25°C Continuous Drain Current Avalanche Current Units V ID TC=100°C Avalanche energy Max Q2 30 VGS TC=25°C Continuous Drain G Current Pulsed Drain Current Max Q1 30 RθJA RθJC A W W -55 to 150 Typ Q1 30 50 4.6 www.aosmd.com Typ Q2 30 50 2.2 Max Q1 40 65 6 °C Max Q2 40 65 2.8 Units °C/W °C/W °C/W Page 1 of 10 Q1 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS Drain-Source Breakdown Voltage BVDSS Conditions Min ID=250µA, VGS=0V Zero Gate Voltage Drain Current IGSS VGS(th) Gate-Body leakage current VDS=0V, VGS=±20V Gate Threshold Voltage VDS=VGS, ID=250µA 1.4 TJ=125°C VGS=4.5V, ID=20A gFS Forward Transconductance VSD Diode Forward Voltage IS=1A,VGS=0V IS Maximum Body-Diode Continuous Current Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance f=1MHz ±100 nA 2.2 V 4.3 5.2 6.3 7.6 6.8 8.6 mΩ 1 V 20 A 67 VGS=0V, VDS=15V, f=1MHz 0.6 µA 1.8 0.71 DYNAMIC PARAMETERS Ciss Input Capacitance Coss V 5 VGS=10V, ID=20A VDS=5V, ID=20A Units 1 TJ=55°C Static Drain-Source On-Resistance Max 30 VDS=30V, VGS=0V IDSS RDS(ON) Typ mΩ S 820 pF 340 pF 40 pF 1.2 1.8 Ω SWITCHING PARAMETERS Qg(10V) Total Gate Charge 13 Qg(4.5V) Total Gate Charge 6.1 nC 2 nC Qgs Gate Source Charge VGS=10V, VDS=15V, ID=20A nC Qgd Gate Drain Charge 2.4 nC tD(on) Turn-On DelayTime 6.5 ns VGS=10V, VDS=15V, RL=0.75Ω, RGEN=3Ω 16.5 ns 17 ns tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Turn-Off Fall Time 2.5 ns IF=20A, dI/dt=500A/µs 11 Qrr Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs 19 ns nC Body Diode Reverse Recovery Time A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power dissipation PDSM is based on R θJA t≤ 10s and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Single pulse width limited by junction temperature TJ(MAX)=150°C. D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using or equal to 4.5V Figure 9: Maximum Forward Biased Safe Operating Area (Note F) 0 0.00001 0.0001 0.001 100 0.01 0.1 1 10 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toCase (Note F) D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJC=6°C/W 1 0.1 PD Single Pulse Ton T 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev.1.0: October 2014 www.aosmd.com Page 4 of 10 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 25 60 50 Current rating ID(A) Power Dissipation (W) 20 15 10 5 40 30 20 10 0 0 0 25 50 75 100 125 0 150 25 TCASE (°C) Figure 12: Power De-rating (Note F) 50 75 100 125 150 TCASE (°C) Figure 13: Current De-rating (Note F) 10000 TA=25°C Power (W) 1000 100 10 1 0.00001 0.001 0.1 10 1000 ZθJA Normalized Transient Thermal Resistance Pulse Width (s) Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H) 10 1 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJA=65°C/W 0.1 0.01 PD Single Pulse Ton 0.001 0.0001 T 0.001 0.01 0.1 1 10 100 1000 Pulse Width (s) Figure 15: Normalized Maximum Transient Thermal Impedance (Note H) Rev.1.0: October 2014 www.aosmd.com Page 5 of 10 Q2 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=10mA, VGS=0V Zero Gate Voltage Drain Current IGSS VGS(th) Gate-Body leakage current VDS=0V, VGS=±12V Gate Threshold Voltage VDS=VGS, ID=250µA 1.1 TJ=125°C VGS=4.5V, ID=20A gFS Forward Transconductance VSD Diode Forward Voltage IS=1A,VGS=0V IS Maximum Body-Diode Continuous Current DYNAMIC PARAMETERS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance V 100 VGS=10V, ID=20A VDS=5V, ID=20A Units 0.5 TJ=55°C Static Drain-Source On-Resistance Max 30 VDS=30V, VGS=0V IDSS RDS(ON) Typ VGS=0V, VDS=15V, f=1MHz f=1MHz 0.9 mA ±100 nA 1.5 1.9 V 1.6 2 2.4 3 2 2.5 mΩ 0.7 V 50 A 100 0.45 mΩ S 3110 pF 930 pF 100 pF 1.9 2.9 Ω SWITCHING PARAMETERS Qg(10V) Total Gate Charge 49 Qg(4.5V) Total Gate Charge 21 nC 8 nC VGS=10V, VDS=15V, ID=20A nC Qgs Gate Source Charge Qgd Gate Drain Charge 5.6 nC tD(on) Turn-On DelayTime 9 ns tr Turn-On Rise Time 4 ns tD(off) Turn-Off DelayTime 44 ns tf trr Turn-Off Fall Time Qrr Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs Body Diode Reverse Recovery Time VGS=10V, VDS=15V, RL=0.75Ω, RGEN=3Ω IF=20A, dI/dt=500A/µs 7 ns 17.5 ns nC 43 A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power dissipation PDSM is based on R θJA t≤ 10s and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Single pulse width limited by junction temperature TJ(MAX)=150°C. D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using or equal to 4.5V Figure 9: Maximum Forward Biased Safe Operating Area (Note F) 0 0.0001 100 0.001 0.01 0.1 1 10 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toCase (Note F) D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJC=2.8°C/W 1 0.1 PD Single Pulse Ton T 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev.1.0: October 2014 www.aosmd.com Page 8 of 10 50 100 40 80 Current rating ID(A) Power Dissipation (W) TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 30 20 10 60 40 20 0 0 0 25 50 75 100 125 0 150 25 TCASE (°C) Figure 12: Power De-rating (Note F) 50 75 100 125 150 TCASE (°C) Figure 13: Current De-rating (Note F) 10000 TA=25°C Power (W) 1000 100 10 1 0.00001 0.001 0.1 10 1000 ZθJA Normalized Transient Thermal Resistance Pulse Width (s) Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H) 10 1 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJA=65°C/W 0.1 PD 0.01 Single Pulse Ton T 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 Pulse Width (s) Figure 15: Normalized Maximum Transient Thermal Impedance (Note H) Rev.1.0: October 2014 www.aosmd.com Page 9 of 10 Gate Charge Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC - DUT Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds Vds DUT Vgs 90% + Vdd VDC - Rg 10% Vgs Vgs td(on) tr td(off) ton tf toff Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L 2 EAR= 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vds - Isd Vgs Ig Rev.1.0: October 2014 Vgs L Isd + Vdd t rr dI/dt I RM Vdd VDC - IF Vds www.aosmd.com Page 10 of 10