AON7292
100V N-Channel AlphaMOS
General Description
Product Summary
• Latest Trench Power AlphaMOS (αMOS MV) technology
• Very Low RDS(ON)
• Low Gate Charge
• Optimized for fast-switching applications
• RoHS and Halogen-Free Compliant
Application
VDS
ID (at VGS=10V)
100V
23A
RDS(ON) (at VGS=10V)
< 24mΩ
RDS(ON) (at VGS=4.5V)
< 32mΩ
100% UIS Tested
100% Rg Tested
• Synchronous rectification in DC/DC and AC/DC converters
• Isolated DC/DC Converters in Telecom and Industrial
DFN 3.3x3.3
Bottom View
Top View
D
Top View
Pin 1
1
8
2
7
3
6
4
5
G
S
Pin 1
Orderable Part Number
Package Type
Form
Minimum Order Quantity
AON7292
DFN 3.3x3.3
Tape & Reel
3000
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Drain-Source Voltage
Symbol
VDS
Gate-Source Voltage
VGS
TC=25°C
Continuous Drain
Current
Pulsed Drain Current
C
V
A
45
9
IDSM
TA=70°C
±20
15
IDM
TA=25°C
Continuous Drain
Current
Units
V
23
ID
TC=100°C
C
Maximum
100
A
7
IAS
14
A
Avalanche energy L=0.1mH C
EAS
10
mJ
VDS Spike
VSPIKE
120
V
Avalanche Current
Power Dissipation
10µs
TC=25°C
B
PD
TC=100°C
TA=25°C
Power Dissipation A
Junction and Storage Temperature Range
Rev.1.0: November 2013
4.1
Steady-State
Steady-State
W
2.6
TJ, TSTG
Symbol
t ≤ 10s
W
11
PDSM
TA=70°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
28
RθJA
RθJC
-55 to 150
Typ
25
50
3.7
www.aosmd.com
°C
Max
30
60
4.5
Units
°C/W
°C/W
°C/W
Page 1 of 6
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=250µA, VGS=0V
100
Typ
Zero Gate Voltage Drain Current
IGSS
VGS(th)
Gate-Body leakage current
VDS=0V, VGS=±20V
Gate Threshold Voltage
VDS=VGS, ID=250µA
1
TJ=55°C
1.6
±100
nA
2.1
2.6
V
20
24
38
46
25.5
32
RDS(ON)
Static Drain-Source On-Resistance
gFS
Forward Transconductance
VDS=5V, ID=9A
32
VSD
Diode Forward Voltage
IS=1A,VGS=0V
0.72
IS
Maximum Body-Diode Continuous Current
TJ=125°C
VGS=4.5V, ID=7A
DYNAMIC PARAMETERS
Input Capacitance
Ciss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
µA
5
VGS=10V, ID=9A
Coss
Units
V
VDS=100V, VGS=0V
IDSS
Max
VGS=0V, VDS=50V, f=1MHz
mΩ
mΩ
S
1
V
23
A
1170
pF
90
pF
8
pF
0.65
1.0
Ω
SWITCHING PARAMETERS
Total Gate Charge
Qg(10V)
17
25
nC
Qg(4.5V)
Total Gate Charge
8
15
Qgs
Gate Source Charge
Qgd
tD(on)
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
trr
Turn-Off Fall Time
Qrr
f=1MHz
VGS=10V, VDS=50V, ID=9A
0.3
nC
3
nC
Gate Drain Charge
3.5
nC
Turn-On DelayTime
5
ns
VGS=10V, VDS=50V, RL=5.55Ω,
RGEN=3Ω
3
ns
21
ns
3
ns
IF=9A, dI/dt=500A/µs
24
Body Diode Reverse Recovery Charge IF=9A, dI/dt=500A/µs
110
ns
nC
Body Diode Reverse Recovery Time
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power
dissipation PDSM is based on R θJA t≤ 10s and the maximum allowed junction temperature of 150°C. The value in any given application depends on
the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Single pulse width limited by junction temperature TJ(MAX)=150°C.
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using or equal to 4.5V
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
Zθ JC Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJC=4.5°C/W
1
0.1
PD
Single Pulse
Ton
T
0.01
1E-05
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev.1.0: November 2013
www.aosmd.com
Page 4 of 6
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
Power Dissipation (W)
30
30
Current rating ID(A)
20
10
0
20
10
0
0
25
50
75
100
125
150
0
TCASE (°
°C)
Figure 12: Power De-rating (Note F)
25
50
75
100
125
150
TCASE (°
°C)
Figure 13: Current De-rating (Note F)
10000
TA=25°C
Power (W)
1000
100
10
1
1E-05
0.001
0.1
10
1000
Zθ JA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H)
10
1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=60°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
PD
0.01
Single Pulse
Ton
T
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)
Rev.1.0: November 2013
www.aosmd.com
Page 5 of 6
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
90%
+ Vdd
VDC
-
Rg
10%
Vgs
Vgs
td(on)
tr
td(off)
ton
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
EAR= 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
Vgs
Ig
Rev.1.0: November 2013
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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Page 6 of 6
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