AON7556
30V N-Channel AlphaMOS
General Description
Product Summary
VDS
• Trench Power AlphaMOS (αMOS LV) technology
• Low RDS(ON)
• Low Gate Charge
• High Current Capability
• RoHS and Halogen-Free Compliant
30V
12A
ID (at VGS=10V)
Applications
RDS(ON) (at VGS=10V)
< 10.5mΩ
RDS(ON) (at VGS=4.5V)
< 16.5mΩ
100% UIS Tested
100% Rg Tested
• DC/DC Converters in Computing, Servers, and POL
• Isolated DC/DC Converters in Telecom and Industrial
DFN 3x3 EP
Bottom View
Top View
D
Top View
Pin 1
1
8
2
7
3
6
4
5
G
Pin 1
S
Orderable Part Number
Package Type
Form
Minimum Order Quantity
AON7556
DFN 3x3 EP
Tape & Reel
5000
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Drain-Source Voltage
Symbol
VDS
Gate-Source Voltage
VGS
TC=25°C
Continuous Drain
Current G
Pulsed Drain Current
Continuous Drain
Current G
Avalanche Current C
Avalanche energy
L=0.05mH
VDS Spike
C
10µs
Power Dissipation B
TA=25°C
Power Dissipation A
Junction and Storage Temperature Range
Rev.1.0: February 2014
18
A
EAS
8
mJ
36
V
12.5
Steady-State
Steady-State
W
5
4.1
RθJA
RθJC
W
2.6
TJ, TSTG
Symbol
t ≤ 10s
A
IAS
PDSM
TA=70°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
12
PD
TC=100°C
A
10.5
VSPIKE
TC=25°C
V
48
IDSM
TA=70°C
±20
9.4
IDM
TA=25°C
Units
V
12
ID
TC=100°C
C
Maximum
30
-55 to 150
Typ
24
47
8
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°C
Max
30
60
10
Units
°C/W
°C/W
°C/W
Page 1 of 6
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=250µA, VGS=0V
Typ
Zero Gate Voltage Drain Current
IGSS
VGS(th)
Gate-Body leakage current
VDS=0V, VGS=±20V
Gate Threshold Voltage
VDS=VGS, ID=250µA
V
1
TJ=55°C
1.4
±100
nA
1.8
2.2
V
8.5
10.5
12
14.8
16.5
RDS(ON)
Static Drain-Source On-Resistance
VGS=4.5V, ID=10A
13
gFS
Forward Transconductance
VDS=5V, ID=12A
40
VSD
Diode Forward Voltage
IS=1A,VGS=0V
IS
Maximum Body-Diode Continuous Current
TJ=125°C
0.73
DYNAMIC PARAMETERS
Input Capacitance
Ciss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
µA
5
VGS=10V, ID=12A
Coss
Units
30
VDS=30V, VGS=0V
IDSS
Max
VGS=0V, VDS=15V, f=1MHz
mΩ
mΩ
S
1
V
10
A
600
pF
230
pF
30
pF
1.5
2.3
Ω
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
9
15
nC
Qg(4.5V) Total Gate Charge
4.4
10
nC
Qgs
Gate Source Charge
Qgd
f=1MHz
VGS=10V, VDS=15V, ID=12A
0.7
1.4
nC
Gate Drain Charge
1.9
nC
tD(on)
Turn-On DelayTime
5
ns
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
trr
Turn-Off Fall Time
IF=12A, dI/dt=500A/µs
Qrr
Body Diode Reverse Recovery Charge IF=12A, dI/dt=500A/µs
10.5
Body Diode Reverse Recovery Time
VGS=10V, VDS=15V, RL=1.25Ω,
RGEN=3Ω
2.5
ns
17.5
ns
2.5
ns
8.6
ns
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power
dissipation PDSM is based on R θJA t≤ 10s and the maximum allowed junction temperature of 150°C. The value in any given application depends on
the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Single pulse width limited by junction temperature TJ(MAX)=150°C.
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using or equal to 4.5V
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
0
0.001
100
0.01
0.1
1
10
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
Zθ JC Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJC=10°C/W
1
0.1
PD
Single Pulse
Ton
T
0.01
1E-05
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev.1.0: February 2014
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Page 4 of 6
16
16
12
12
Current rating ID(A)
Power Dissipation (W)
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
8
4
0
8
4
0
0
25
50
75
100
125
150
0
TCASE (°
°C)
Figure 12: Power De-rating (Note F)
25
50
75
100
125
150
TCASE (°
°C)
Figure 13: Current De-rating (Note F)
10000
TA=25°C
Power (W)
1000
100
10
1
1E-05
0.001
0.1
10
1000
Zθ JA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H)
10
1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=60°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
0.01
PD
Single Pulse
Ton
0.001
1E-05
T
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)
Rev.1.0: February 2014
www.aosmd.com
Page 5 of 6
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
90%
+ Vdd
VDC
-
Rg
10%
Vgs
Vgs
td(on)
tr
td(off)
ton
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
EAR= 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
Vgs
Ig
Rev.1.0: February 2014
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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Page 6 of 6
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