AOSD21311C
30V Dual P-Channel MOSFET
General Description
Product Summary
• Latest Advanced Trench Technology
• Low RDS(ON)
• High Current Capability
• RoHS and Halogen-Free Compliant
ID (at VGS=-10V)
-30V
-5A
RDS(ON) (at VGS=-10V)
< 42mΩ
RDS(ON) (at VGS=-4.5V)
< 64mΩ
Typical ESD protection
HBM Class 1C
VDS
Applications
100% UIS Tested
100% Rg Tested
• Notebook AC-in Load Switch
• Battery Protection Charge/Discharge
SOIC-8
Top View
D
Bottom View
D
Top View
S2
G2
S1
G1
1
2
3
4
8
7
6
5
D2
D2
D1
D1
G
G
S
Pin1
S
Pin1
Orderable Part Number
Package Type
Form
Minimum Order Quantity
AOSD21311C
SO-8
Tape & Reel
3000
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Drain-Source Voltage
Symbol
VDS
Gate-Source Voltage
VGS
TA=25°C
Continuous Drain
Current
Pulsed Drain Current C
Avalanche Current C
Avalanche energy
Power Dissipation B
L=0.1mH
TA=25°C
C
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Lead
Rev.1.0: May 2019
Steady-State
Steady-State
V
A
IDM
-20
IAS
13
A
EAS
8
mJ
1.7
W
1.1
TJ, TSTG
Symbol
t ≤ 10s
±20
-3.9
PD
TA=70°C
Units
V
-5
ID
TA=70°C
Maximum
-30
RqJA
RqJL
-55 to 150
Typ
52
80
35
www.aosmd.com
°C
Max
70
100
45
Units
°C/W
°C/W
°C/W
Page 1 of 5
AOSD21311C
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=-250mA, VGS=0V
-30
Typ
Zero Gate Voltage Drain Current
IGSS
VGS(th)
Gate-Body leakage current
VDS=0V, VGS=±20V
Gate Threshold Voltage
VDS=VGS, ID=-250mA
-1
TJ=55°C
±10
μA
-1.7
-2.2
V
35
42
50
60
64
mΩ
S
-1
V
-2
A
RDS(ON)
Static Drain-Source On-Resistance
VGS=-4.5V, ID=-4.1A
51
gFS
Forward Transconductance
VDS=-5V, ID=-5A
14
VSD
Diode Forward Voltage
IS=-1A, VGS=0V
-0.8
IS
Maximum Body-Diode Continuous Current
TJ=125°C
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
VGS=0V, VDS=-15V, f=1MHz
f=1MHz
SWITCHING PARAMETERS
Qg(10V)
Total Gate Charge
Qg(4.5V)
Total Gate Charge
Qgs
Gate Source Charge
Qgd
VGS=-10V, VDS=-15V, ID=-5A
μA
-5
-1.2
VGS=-10V, ID=-5A
Coss
Units
V
VDS=-30V, VGS=0V
IDSS
Max
mΩ
720
pF
80
pF
70
pF
15
25
Ω
12.5
23
nC
6
12
nC
1.6
nC
Gate Drain Charge
3
nC
tD(on)
Turn-On DelayTime
8.5
ns
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
trr
Turn-Off Fall Time
Qrr
5
ns
39
ns
14.5
ns
IF=-5A, di/dt=500A/ms
10
Body Diode Reverse Recovery Charge IF=-5A, di/dt=500A/ms
13
ns
nC
Body Diode Reverse Recovery Time
VGS=-10V, VDS=-15V, RL=3W,
RGEN=3W
A. The value of RqJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RqJA is the sum of the thermal impedance from junction to lead RqJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using or equal to -4.5V
Figure 9: Maximum Forward Biased
Safe Operating Area (Note F)
1
1E-05
100
0.001
0.1
10
1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
D=Ton/T
TJ,PK=TA+PDM.ZqJA.RqJA
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RqJA=100°C/W
0.1
PDM
0.01
0.001
1E-05
Single Pulse
Ton
0.0001
0.001
0.01
0.1
1
10
T
100
1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev.1.0: May 2019
www.aosmd.com
Page 4 of 5
AOSD21311C
Gate Charge Test Circuit & Waveform
Vgs
Qg
-10V
-
-
VDC
+
VDC
Qgd
+
DUT
Qgs
Vds
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
toff
ton
td(on)
Vgs
-
DUT
Vgs
VDC
td(off)
tr
tf
90%
Vdd
+
Rg
Vgs
10%
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
2
L
EAR= 1/2 LIAR
Vds
Vds
Id
-
Vgs
Vgs
VDC
BVDSS
Vdd
+
Rg
Id
I AR
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
Vgs
Ig
Rev.1.0: May 2019
L
-Isd
+ Vdd
t rr
dI/dt
-I RM
Vdd
VDC
-
-I F
-Vds
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Page 5 of 5
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